Ping? This warning is now in 6.3-rc1.
On Thu, Feb 23, 2023 at 09:28:28AM -0700, Nathan Chancellor wrote:
> Hi Thierry, Daniel, and David,
>
> On Fri, Jan 27, 2023 at 11:14:00PM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > The error handling for platform_get_irq() failing no
On Wed, 8 Mar 2023 at 15:19, Jani Nikula wrote:
>
> On Wed, 08 Mar 2023, Dmitry Baryshkov wrote:
> > On Wed, 8 Mar 2023 at 12:14, Jani Nikula
> > wrote:
> >>
> >> On Tue, 07 Mar 2023, Dmitry Baryshkov wrote:
> >> > The array of rc_parameters contains a mixture of parameters from DSC 1.1
> >>
On 09/03/2023 00.30, Christian König wrote:
> Am 08.03.23 um 15:53 schrieb Asahi Lina:
>> [SNIP]
>>> The background is that core memory management requires that signaling a
>>> fence only depends on signaling other fences and hardware progress and
>>> nothing else. Otherwise you immediately run
[AMD Official Use Only - General]
On Wed, Mar 8, 2023 at 11:32 AM Maxime Ripard wrote:
>
> On Wed, Mar 08, 2023 at 04:27:01PM +, Zhuo, Qingqing (Lillian) wrote:
> > [AMD Official Use Only - General]
> >
> > > Hi,
> >
> > On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
> > > +
On 3/8/23 11:39, Alex Deucher wrote:
On Wed, Mar 8, 2023 at 11:32 AM Maxime Ripard wrote:
On Wed, Mar 08, 2023 at 04:27:01PM +, Zhuo, Qingqing (Lillian) wrote:
[AMD Official Use Only - General]
Hi,
On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
+ vc4 maintainers
From: Marek Vasut
Add extras to support i.MX8M Plus. The main change is the removal of
HS/VS/DE signal inversion in the LCDIFv3-DSIM glue logic, otherwise
the implementation of this IP in i.MX8M Plus is very much compatible
with the i.MX8M Mini/Nano one.
Reviewed-by: Marek Vasut
Reviewed-by:
Samsung MIPI DSIM bridge can also be found in i.MX8M Plus SoC.
Add dt-bingings for it.
Reviewed-by: Marek Vasut
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11:
- collect ACK from Rob
Changes for
Samsung MIPI DSIM master can also be found in i.MX8M Mini/Nano SoC.
Add compatible and associated driver_data for it.
Reviewed-by: Marek Vasut
Reviewed-by: Frieder Schrempf
Acked-by: Robert Foss
Reviewed-by: Laurent Pinchart
Signed-off-by: Marek Szyprowski
Signed-off-by: Jagan Teki
---
Samsung MIPI DSIM bridge can also be found in i.MX8M Mini/Nano SoC.
Add dt-bingings for it.
Reviewed-by: Marek Vasut
Acked-by: Rob Herring
Signed-off-by: Jagan Teki
---
Changes for v16, v15, v13:
- none
Changes for v12:
- collect RB from Marek
Changes for v11, v10, v9:
- none
Changes for v8:
Samsung MIPI DSIM controller is common DSI IP that can be used in various
SoCs like Exynos, i.MX8M Mini/Nano.
In order to access this DSI controller between various platform SoCs,
the ideal way to incorporate this in the drm stack is via the drm bridge
driver.
We already have a consolidated code
IRQ handler for te-gpio seems to be common across DSIM host.
However, Exynos is handling this via CRTC drivers but there is no clear
evidence on how the same has been handled in i.MX8MM. Keeping the handler
as-it-is can be a viable option but adding DSIM bridge core in upcoming
patches is not
DSI host registration, attach and detach operations are quite
different for the component and bridge-based DRM drivers.
Supporting generic bridge driver to use both component and bridge
based DRM drivers can be tricky and would require additional host
related operation hooks.
Add host operation
Finding the right input bus format throughout the pipeline is hard
so add atomic_get_input_bus_fmts callback and initialize with the
proper input format from list of supported output formats.
This format can be used in pipeline for negotiating bus format between
the DSI-end of this bridge and the
LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting
the i.MX8M Mini/Nano DSI host to add additional Data Enable signal
active low (DE_LOW). This makes the valid data transfer on each
horizontal line.
So, add additional bus flags DE_LOW setting via input_bus_flags
for i.MX8M Mini/Nano
Look like an explicit fixing up of mode_flags is required for DSIM IP
present in i.MX8M Mini/Nano SoCs.
At least the LCDIF + DSIM needs active low sync polarities in order
to correlate the correct sync flags of the surrounding components in
the chain to make sure the whole pipeline can work
From: Marek Szyprowski
Host transfer() in the DSI master will invoke only when the DSI commands
are sent from DSI devices like DSI Panel or DSI bridges and this host
the transfer wouldn't invoke for I2C-based-DSI bridge drivers.
Handling DSI host initialization in transfer calls misses the
Samsung MIPI DSIM controller is common DSI IP that can be used
in various SoCs like Exynos, i.MX8M Mini/Nano/Plus.
Add hw_type enum via platform_data so that accessing the different
controller data between various platforms becomes easy and meaningful.
Tested-by: Marek Szyprowski
Reviewed-by:
Look like PLL PMS_P offset value varies between platforms that have
Samsung DSIM IP.
However, there is no clear evidence for it as both Exynos and i.MX
8M Mini Application Processor Reference Manual is still referring
the PMS_P offset as 13.
The offset 13 is not working for i.MX8M Mini SoCs but
The same Samsung MIPI DSIM master can also be used in NXP's
i.MX8M Mini/Nano/Plus SoC.
In i.MX8M Mini/Nano/Plus SoC the DSI Phy requires a MIPI DPHY
bit to reset in order to activate the PHY and that can be done
via upstream i.MX8M blk-ctrl driver.
So, mark the phy get as optional.
Tested-by:
In general, for MIPI DSI there are three ways to represent the
pipeline for an upstream bridge to find the connected downstream
panel or bridge.
1. Child panel or bridge as a conventional device tree child node.
2. Child panel or bridge as an OF-graph port node.
3. Child panel or bridge as an
Exynos DSI already converted into a bridge driver, so bridge
detach will suppose happened during bridge chain removal done
by the bridge core.
Drop the explicit call chain to detach the bridge.
Tested-by: Marek Szyprowski
Reviewed-by: Marek Vasut
Signed-off-by: Jagan Teki
---
Changes for v16:
This series supports common bridge support for Samsung MIPI DSIM
which is used in Exynos and i.MX8MM SoC's.
The final bridge supports both the Exynos and i.MX8M Mini/Nano/Plus.
Inki Dae: please note that this series added on top of exynos-drm-next
since few exynos dsi changes are not been part
On Wed, Mar 8, 2023 at 11:32 AM Maxime Ripard wrote:
>
> On Wed, Mar 08, 2023 at 04:27:01PM +, Zhuo, Qingqing (Lillian) wrote:
> > [AMD Official Use Only - General]
> >
> > > Hi,
> >
> > On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
> > > + vc4 maintainers
> > >
> > > On
On Wed, Mar 08, 2023 at 04:27:01PM +, Zhuo, Qingqing (Lillian) wrote:
> [AMD Official Use Only - General]
>
> > Hi,
>
> On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
> > + vc4 maintainers
> >
> > On 3/8/23 04:34, Qingqing Zhuo wrote:
> > > [Why]
> > >
On 02/03/23 17:01, Arthur Grillo wrote:
> Extend the existing test cases to test the conversion from XRGB to
> monochromatic.
>
> Signed-off-by: Arthur Grillo
> ---
> .../gpu/drm/tests/drm_format_helper_test.c| 73 +++
> 1 file changed, 73 insertions(+)
>
> diff
On Wed, Mar 8, 2023 at 7:17 AM Guchun Chen wrote:
>
> Some amd asics having reliable hotplug support don't call
> drm_kms_helper_poll_init in driver init sequence. However,
> due to the unified suspend/resume path for all asics, because
> the output_poll_work->func is not set for these asics, a
On Tue, Mar 7, 2023 at 2:28 AM Thomas Zimmermann wrote:
> > So after module_init is finished, mode_option_buf[] no longer exists?
>
> Does the __init attribute on a function affect the static variables in
> that function?
That is an excellent question.
[AMD Official Use Only - General]
> Hi,
On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
> + vc4 maintainers
>
> On 3/8/23 04:34, Qingqing Zhuo wrote:
> > [Why]
> > drivers/gpu/drm/vc4/vc4_hdmi.c: In function ‘vc4_hdmi_bind’:
> > drivers/gpu/drm/vc4/vc4_hdmi.c:3448:17: error:
Arthur Grillo Queiroz Cabral writes:
> On 07/03/23 18:55, Javier Martinez Canillas wrote:
[...]
>
> Hi Javier. Thank you for your review :)
>
You are welcome!
> Thank you for your patch! I too think that a new helper is not needed.
> I will send the v2 when your patch is applied.
>
Great.
Hi,
On Wed, Mar 08, 2023 at 11:11:22AM -0500, Hamza Mahfooz wrote:
> + vc4 maintainers
>
> On 3/8/23 04:34, Qingqing Zhuo wrote:
> > [Why]
> > drivers/gpu/drm/vc4/vc4_hdmi.c: In function ‘vc4_hdmi_bind’:
> > drivers/gpu/drm/vc4/vc4_hdmi.c:3448:17: error: label
> > ‘err_disable_runtime_pm’ used
+ vc4 maintainers
On 3/8/23 04:34, Qingqing Zhuo wrote:
[Why]
drivers/gpu/drm/vc4/vc4_hdmi.c: In function ‘vc4_hdmi_bind’:
drivers/gpu/drm/vc4/vc4_hdmi.c:3448:17: error: label ‘err_disable_runtime_pm’
used but not defined
[How]
update err_disable_runtime_pm to err_put_runtime_pm.
On 07/03/23 18:55, Javier Martinez Canillas wrote:
> Javier Martinez Canillas writes:
>
> [...]
>
>>
>>> +static size_t conversion_buf_size_mono(unsigned int dst_pitch, const
>>> struct drm_rect *clip)
>>> +{
>>> + if (!dst_pitch) {
>>> + unsigned int linepixels =
From: Rob Clark
I expect this patch to be replaced by someone who knows i915 better.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/i915/i915_request.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_request.c
From: Rob Clark
Drop our custom thing and switch to drm_crtc_next_vblank_start() for
calculating the time of the start of the next vblank period.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 15 ---
drivers/gpu/drm/msm/msm_atomic.c| 8 +---
From: Rob Clark
Will be used in the next commit to set a deadline on fences that an
atomic update is waiting on.
v2: Calculate time at *start* of vblank period, not end
v3: Fix kbuild complaints
Signed-off-by: Rob Clark
Reviewed-by: Mario Kleiner
---
drivers/gpu/drm/drm_vblank.c | 53
From: Rob Clark
Add a way for various userspace waits to signal urgency.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 12
drivers/gpu/drm/msm/msm_gem.c | 5 +
include/uapi/drm/msm_drm.h| 14 --
3 files changed, 25 insertions(+), 6 deletions(-)
As the finished fence is the one that is exposed to userspace, and
therefore the one that other operations, like atomic update, would
block on, we need to propagate the deadline from from the finished
fence to the actual hw fence.
v2: Split into drm_sched_fence_set_parent() (ckoenig)
v3: Ensure a
From: Rob Clark
Track the nearest deadline on a fence timeline and set a timer to expire
shortly before to trigger boost if the fence has not yet been signaled.
v2: rebase
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_fence.c | 74 +
From: Rob Clark
For an atomic commit updating a single CRTC (ie. a pageflip) calculate
the next vblank time, and inform the fence(s) of that deadline.
v2: Comment typo fix (danvet)
v3: If there are multiple CRTCs, consider the time of the soonest vblank
Signed-off-by: Rob Clark
Reviewed-by:
From: Rob Clark
Add a new flag to let userspace provide a deadline as a hint for syncobj
and timeline waits. This gives a hint to the driver signaling the
backing fences about how soon userspace needs it to compete work, so it
can addjust GPU frequency accordingly. An immediate deadline can be
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them into a fence-array, set deadline on the
From: Rob Clark
We had all of the internal driver APIs, but not the all important
userspace uABI, in the dma-buf doc. Fix that. And re-arrange the
comments slightly as otherwise the comments for the ioctl nr defines
would not show up.
v2: Fix docs build warning coming from newly including the
From: Rob Clark
The initial purpose is for igt tests, but this would also be useful for
compositors that wait until close to vblank deadline to make decisions
about which frame to show.
The igt tests can be found at:
From: Rob Clark
Add a way to set a deadline on remaining resv fences according to the
requested usage.
Signed-off-by: Rob Clark
Reviewed-by: Christian König
---
drivers/dma-buf/dma-resv.c | 22 ++
include/linux/dma-resv.h | 2 ++
2 files changed, 24 insertions(+)
diff
From: Rob Clark
Propagate the deadline to all the fences in the chain.
v2: Use dma_fence_chain_contained [Tvrtko]
Signed-off-by: Rob Clark
Reviewed-by: Christian König for this one.
---
drivers/dma-buf/dma-fence-chain.c | 12
1 file changed, 12 insertions(+)
diff --git
From: Rob Clark
Propagate the deadline to all the fences in the array.
Signed-off-by: Rob Clark
Reviewed-by: Christian König
---
drivers/dma-buf/dma-fence-array.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/dma-buf/dma-fence-array.c
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management decisions, like boosting
frequency as the deadline approaches and awareness of missing
From: Rob Clark
This series adds a deadline hint to fences, so realtime deadlines
such as vblank can be communicated to the fence signaller for power/
frequency management decisions.
This is partially inspired by a trick i915 does, but implemented
via dma-fence for a couple of reasons:
1) To
Am 08.03.23 um 16:18 schrieb Asahi Lina:
On 08/03/2023 19.03, Christian König wrote:
Am 08.03.23 um 10:57 schrieb Maarten Lankhorst:
On 2023-03-07 15:25, Asahi Lina wrote:
drm_sched_fini() currently leaves any pending jobs dangling, which
causes segfaults and other badness when job completion
Applied. Thanks!
On Wed, Mar 8, 2023 at 9:11 AM Tom Rix wrote:
>
> With gcc and W=1, there is this error
> drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c:297:13:
> error:
> variable ‘available’ set but not used [-Werror=unused-but-set-variable]
> 297 |
Applied. Thanks!
On Wed, Mar 8, 2023 at 9:10 AM Tom Rix wrote:
>
> With gcc and W=1, there is this error
> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:1214:31:
> error: variable ‘res_pool’ set but not used
> [-Werror=unused-but-set-variable]
> 1214 | struct
Since nop_clear_range is visible it can be used here.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/selftests/mock_gtt.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c
b/drivers/gpu/drm/i915/selftests/mock_gtt.c
Write-combining memory allows speculative reads by CPU.
ggtt->error_capture is WC mapped to CPU, so CPU/MMU can try
to prefetch memory beyond the error_capture, ie it tries
to read memory pointed by next PTE in GGTT.
If this PTE points to invalid address DMAR errors will occur.
This behaviour was
Since nop_clear_range is visible it can be used here.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/display/intel_dpt.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c
b/drivers/gpu/drm/i915/display/intel_dpt.c
index
Function nop_clear_range can be used instead of local implementations.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 3 +--
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
u/drm/i915/gt/intel_ggtt.c | 38 ++-
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++
drivers/gpu/drm/i915/selftests/mock_gtt.c | 9 ++--
4 files changed, 37 insertions(+), 19 deletions(-)
---
base-commit: 3cd6c251f39c14df9ab711e3eb56e703b359ff54
change
Tested using "modetest -P" on an MT8195 device.
Signed-off-by: Justin Green
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 21 +++--
1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
Tested using "modetest -P" on an MT8195 device.
Signed-off-by: Justin Green
---
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
index
Add an DDP component interface for querying pixel format support and move list
of supported pixel formats into DDP components instead of mtk_drm_plane.c
Tested by running Chrome on an MT8195.
Signed-off-by: Justin Green
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 4 ++
This patch series adds support for 10-bit overlays to the Mediatek DRM driver.
Specifically, we add support for AR30 and BA30 overlays on MT8195 devices and
lay the groundwork for supporting more 10-bit formats on more devices.
1. Refactor plane initialization logic to allow individual DDP
On Wed, Mar 08, 2023 at 09:51:19PM +0800, Pin-yen Lin wrote:
> On Mon, Mar 6, 2023 at 8:03 PM Andy Shevchenko
> wrote:
> > On Fri, Mar 03, 2023 at 10:33:50PM +0800, Pin-yen Lin wrote:
...
> > > + it6505->port_data[i].lane_swap = (dp_lanes[0] / 2 == 1);
> >
> > ' % 2 == 0' ?
> >
>
Am 08.03.23 um 15:53 schrieb Asahi Lina:
[SNIP]
The background is that core memory management requires that signaling a
fence only depends on signaling other fences and hardware progress and
nothing else. Otherwise you immediately run into problems because of
circle dependencies or what we call
On Wed, Mar 08, 2023 at 06:20:14PM +0800, Pin-yen Lin wrote:
> On Mon, Mar 6, 2023 at 7:49 PM Andy Shevchenko
> > On Fri, Mar 03, 2023 at 10:33:43PM +0800, Pin-yen Lin wrote:
...
> > > + switch_desc->typec_ports = devm_kcalloc(dev,
> > > switch_desc->num_typec_switches,
> > > +
On Wed, Mar 8, 2023 at 4:09 PM Christian König wrote:
>
> Am 08.03.23 um 15:43 schrieb Karol Herbst:
> > [SNIP]
> > "further"? There was no discussion at all,
>
> Yeah, well that is exactly what I wanted to archive.
>
> > you just started off like
> > that. If you think somebody misses that
On 08/03/2023 19.03, Christian König wrote:
> Am 08.03.23 um 10:57 schrieb Maarten Lankhorst:
>>
>> On 2023-03-07 15:25, Asahi Lina wrote:
>>> drm_sched_fini() currently leaves any pending jobs dangling, which
>>> causes segfaults and other badness when job completion fences are
>>> signaled after
Am 08.03.23 um 15:43 schrieb Karol Herbst:
[SNIP]
"further"? There was no discussion at all,
Yeah, well that is exactly what I wanted to archive.
you just started off like
that. If you think somebody misses that connection, you can point out
to documentation/videos whatever so the
On 08/03/2023 19.00, Christian König wrote:
> Am 08.03.23 um 10:41 schrieb Asahi Lina:
>> On 08/03/2023 17.46, Christian König wrote:
>>> Am 07.03.23 um 15:25 schrieb Asahi Lina:
Some hardware may require more complex resource utilization accounting
than the simple job count supported by
Applied. Thanks!
Alex
On Tue, Mar 7, 2023 at 3:22 PM Bjorn Helgaas wrote:
>
> From: Bjorn Helgaas
>
> pci_enable_pcie_error_reporting() enables the device to send ERR_*
> Messages. Since f26e58bf6f54 ("PCI/AER: Enable error reporting when AER is
> native"), the PCI core does this for all
Applied. Thanks!
On Tue, Mar 7, 2023 at 2:34 PM David Tadokoro wrote:
>
> Some amdgpu_dm_crtc.h functions didn't have names that indicated where
> they were declared.
>
> To better filter results in debug tools like ftrace, prefix these
> functions with 'amdgpu_dm_crtc_'.
>
> Signed-off-by:
On Wed, Mar 8, 2023 at 7:02 AM Mikhail Gavrilov
wrote:
>
> Hi,
> I didn't faced to issue drm_bridge_hpd_enable+0x94/0x9c [drm] but
> fixing this issue leads to warning messages on my laptop ASUS ROG
> Strix G15 Advantage Edition G513QY-HQ007 which has two AMD GPU.
> Discrete Radeon 6800M and
On Wed, Mar 8, 2023 at 2:47 PM Christian König wrote:
>
> Am 08.03.23 um 13:39 schrieb Karol Herbst:
> > On Wed, Mar 8, 2023 at 9:46 AM Christian König
> > wrote:
> >> Am 07.03.23 um 15:25 schrieb Asahi Lina:
> >>> Some hardware may require more complex resource utilization accounting
> >>>
On Wed, Mar 08, 2023 at 03:29:45PM +0100, Maarten Lankhorst wrote:
> Hey,
>
>
> On 2023-03-08 14:36, Ville Syrjälä wrote:
> > On Wed, Mar 08, 2023 at 01:47:12PM +0100, Maarten Lankhorst wrote:
> >> On 2023-03-06 21:58, Ville Syrjälä wrote:
> >>> On Mon, Mar 06, 2023 at 09:23:50PM +0100, Maarten
Hey,
On 2023-03-08 14:36, Ville Syrjälä wrote:
On Wed, Mar 08, 2023 at 01:47:12PM +0100, Maarten Lankhorst wrote:
On 2023-03-06 21:58, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 09:23:50PM +0100, Maarten Lankhorst wrote:
Hey,
On 2023-03-06 16:23, Souza, Jose wrote:
On Mon, 2023-03-06 at
With gcc and W=1, there is this error
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c:297:13:
error:
variable ‘available’ set but not used [-Werror=unused-but-set-variable]
297 | int available = 0;
| ^
Since available is unused,
On Tue, 28 Feb 2023 15:54:33 -0600, Rob Herring wrote:
> SPI and I2C bus node names are expected to be "spi" or "i2c",
> respectively, with nothing else, a unit-address, or a '-N' index. A
> pattern of 'spi0' or 'i2c0' or similar has crept in. Fix all these
> cases. Mostly scripted with the
With gcc and W=1, there is this error
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_mst_types.c:1214:31:
error: variable ‘res_pool’ set but not used [-Werror=unused-but-set-variable]
1214 | struct resource_pool *res_pool;
| ^~~~
Since
Hi Andy,
Thanks for the review.
On Mon, Mar 6, 2023 at 8:03 PM Andy Shevchenko
wrote:
>
> On Fri, Mar 03, 2023 at 10:33:50PM +0800, Pin-yen Lin wrote:
> > Register USB Type-C mode switches when the "mode-switch" property and
> > relevant port are available in Device Tree. Configure the
Am 08.03.23 um 13:39 schrieb Karol Herbst:
On Wed, Mar 8, 2023 at 9:46 AM Christian König wrote:
Am 07.03.23 um 15:25 schrieb Asahi Lina:
Some hardware may require more complex resource utilization accounting
than the simple job count supported by drm_sched internally. Add a
can_run_job
Hi Andy,
Thanks for the review.
On Mon, Mar 6, 2023 at 7:55 PM Andy Shevchenko
wrote:
>
> On Fri, Mar 03, 2023 at 10:33:47PM +0800, Pin-yen Lin wrote:
> > Register USB Type-C mode switches when the "mode-switch" property and
> > relevant ports are available in Device Tree. Configure the
On 3/7/23 11:25, Asahi Lina wrote:
The DRM shmem helper includes common code useful for drivers which
allocate GEM objects as anonymous shmem. Add a Rust abstraction for
this. Drivers can choose the raw GEM implementation or the shmem layer,
depending on their needs.
Signed-off-by: Asahi Lina
On Wed, Mar 08, 2023 at 01:33:39PM +0100, Konrad Dybcio wrote:
>
> phy-type:
> description: D-PHY (default) or C-PHY mode
> enum: [ 10, 11 ]
> default: 10
>
> try setting that to 11 under your DSI PHYs (or one? not sure).
I already used phy-type = before, this equate to
On Wed, Mar 08, 2023 at 01:47:12PM +0100, Maarten Lankhorst wrote:
>
> On 2023-03-06 21:58, Ville Syrjälä wrote:
> > On Mon, Mar 06, 2023 at 09:23:50PM +0100, Maarten Lankhorst wrote:
> >> Hey,
> >>
> >> On 2023-03-06 16:23, Souza, Jose wrote:
> >>> On Mon, 2023-03-06 at 15:16 +0100, Maarten
On Tue, Mar 07, 2023 at 05:00:01PM -0500, Rodrigo Vivi wrote:
> Hi Dave and Daniel,
>
> Here goes our first pull request towards 6.3.
You know, I meant 6.4. :)
Thank you Joonas for noticing that.
>
> drm-intel-next-2023-03-07:
>
> Cross-subsystem Changes:
> - MEI patches to fix
On Wed, 08 Mar 2023, Dmitry Baryshkov wrote:
> On Wed, 8 Mar 2023 at 12:14, Jani Nikula wrote:
>>
>> On Tue, 07 Mar 2023, Dmitry Baryshkov wrote:
>> > The array of rc_parameters contains a mixture of parameters from DSC 1.1
>> > and DSC 1.2 standards. Split these tow configuration arrays in
>>
From: Arnd Bergmann
ioremap_uc() is only meaningful on old x86-32 systems with the PAT
extension, and on ia64 with its slightly unconventional ioremap()
behavior, everywhere else this is the same as ioremap() anyway.
Change the only driver that still references ioremap_uc() to only do so
on
On Wed, 08 Mar 2023, Guchun Chen wrote:
> In order to catch issues in other drivers to ensure proper call
> sequence of polling function.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2411
> Fixes: a4e771729a51("drm/probe_helper: sort out poll_running vs poll_enabled")
How does an
On Wed, 8 Mar 2023 at 12:14, Jani Nikula wrote:
>
> On Tue, 07 Mar 2023, Dmitry Baryshkov wrote:
> > The array of rc_parameters contains a mixture of parameters from DSC 1.1
> > and DSC 1.2 standards. Split these tow configuration arrays in
> > preparation to adding more configuration data.
> >
On 2023-03-06 21:58, Ville Syrjälä wrote:
On Mon, Mar 06, 2023 at 09:23:50PM +0100, Maarten Lankhorst wrote:
Hey,
On 2023-03-06 16:23, Souza, Jose wrote:
On Mon, 2023-03-06 at 15:16 +0100, Maarten Lankhorst wrote:
As a fallback if we decide not to merge the frontbuffer tracking, allow
i915
On Wed, 08 Mar 2023, Dmitry Baryshkov wrote:
> On 08/03/2023 13:30, Jani Nikula wrote:
>> On Wed, 22 Feb 2023, Suraj Kandpal wrote:
>>> This patch series aims to enable the YCbCr420 format
>>> for DSC. Changes are mostly compute params related for
>>> hdmi,dp and dsi along with the addition of
On Wed, Mar 8, 2023 at 9:46 AM Christian König wrote:
>
> Am 07.03.23 um 15:25 schrieb Asahi Lina:
> > Some hardware may require more complex resource utilization accounting
> > than the simple job count supported by drm_sched internally. Add a
> > can_run_job callback to allow drivers to
On Tue, Mar 7, 2023 at 10:27 PM Bjorn Helgaas wrote:
>
> From: Bjorn Helgaas
>
> pci_enable_pcie_error_reporting() enables the device to send ERR_*
> Messages. Since f26e58bf6f54 ("PCI/AER: Enable error reporting when AER is
> native"), the PCI core does this for all devices during enumeration,
Hi,
On Tue, Mar 07, 2023 at 05:10:16PM +, Dave Stevenson wrote:
> On Tue, 7 Mar 2023 at 16:25, AL13N wrote:
> > AL13N schreef op 2023-03-06 17:34:
> > > I have a RPI4B connected on 2nd HDMI port (furthest away from power)
> > > to a 4K TV, which works until 5.16, from 5.17 there is no X (or
On Wed, 8 Mar 2023 at 12:20, Johan Hovold wrote:
>
> On Wed, Nov 02, 2022 at 09:07:03PM +0300, Dmitry Baryshkov wrote:
> > The functionality of drm_bridge_connector_enable_hpd() and
> > drm_bridge_connector_disable_hpd() is provided automatically by the
> > drm_kms_poll helpers. Stop calling
On 8.03.2023 12:53, Jianhua Lu wrote:
> On Wed, Mar 08, 2023 at 12:13:53PM +0100, Konrad Dybcio wrote:
>>
>>
>> On 8.03.2023 05:37, Jianhua Lu wrote:
>>> Add a driver for panels using the Novatek NT36523 display driver IC.
>>>
>>> Signed-off-by: Jianhua Lu
>>> ---
>>> Changes in v3:
>>> -
On 08/03/2023 13:30, Jani Nikula wrote:
On Wed, 22 Feb 2023, Suraj Kandpal wrote:
This patch series aims to enable the YCbCr420 format
for DSC. Changes are mostly compute params related for
hdmi,dp and dsi along with the addition of new rc_tables
for native_420 and corresponding changes to
In order to catch issues in other drivers to ensure proper call
sequence of polling function.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2411
Fixes: a4e771729a51("drm/probe_helper: sort out poll_running vs poll_enabled")
Reported-by: Bert Karwatzki
Suggested-by: Dmitry Baryshkov
Some amd asics having reliable hotplug support don't call
drm_kms_helper_poll_init in driver init sequence. However,
due to the unified suspend/resume path for all asics, because
the output_poll_work->func is not set for these asics, a warning
arrives when suspending.
[ 90.656049]
[
On Wed, Mar 08, 2023 at 08:39:32AM +0100, Uwe Kleine-König wrote:
> Uwe Kleine-König (13):
> backlight: aat2870_bl: Convert to platform remove callback returning
> void
> backlight: adp5520_bl: Convert to platform remove callback returning
> void
> backlight: cr_bllcd: Convert to
Hi,
I didn't faced to issue drm_bridge_hpd_enable+0x94/0x9c [drm] but
fixing this issue leads to warning messages on my laptop ASUS ROG
Strix G15 Advantage Edition G513QY-HQ007 which has two AMD GPU.
Discrete Radeon 6800M and integrated in CPU Cezanne Vega 8.
I found bad commit by bisecting:
❯
On Wed, Mar 08, 2023 at 12:13:53PM +0100, Konrad Dybcio wrote:
>
>
> On 8.03.2023 05:37, Jianhua Lu wrote:
> > Add a driver for panels using the Novatek NT36523 display driver IC.
> >
> > Signed-off-by: Jianhua Lu
> > ---
> > Changes in v3:
> > - Refactor source code
> >
> > Changes in v2:
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