Platform order is important when looping through the list of guc
firmware blobs since we use it to prevent loading a blob for a newer
platform onto an older one. Move PVC after ADL.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/xe/xe_platform_types.h | 3 +--
drivers/gpu/drm/xe/xe_uc_fw.c
Update the logic to autoselect GuC/HuC for the platforms with the
following improvements:
- Document what is the firmware file that is expected to be
loaded and what is checked from blob headers
- When the platform is under force-probe it's desired to enforce
the full-version requirement so
The rev field is always 0 so it ends up never used. In i915 it was
introduced because of CML: up to rev 5 it reuses the guc and huc
firmware blobs from KBL. After that there is a specific firmware for
that platform. This can be reintroduced later if ever needed.
With the removal of revid the
This re-aligns the xe driver with the upstream guidelines
(https://docs.kernel.org/driver-api/firmware/firmware-usage-guidelines.html?highlight=firmware+guideline)
and document the table used for it so it's easier to understand the
policy in place. Justification for the changes, including the
drm_edid_read returns NULL on error, so feeding it directly into
drm_edid_duplicate may lead to NULL pointer dereference. Add a check to
guard this.
Fixes: 6a17b4d1b52f ("drm/bridge: ps8640: Add a cache for EDID")
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/parade-ps8640.c | 6 ++
Hi Daniele - thanks for reviewing this - i will fix all of code in accordance
to the review
comments you provided with some exceptions / alternatives:
On Fri, 2023-03-03 at 17:07 -0800, Ceraolo Spurio, Daniele wrote:
>
> On 2/27/2023 6:21 PM, Alan Previn wrote:
> > Add GSC engine based method
On 3/23/2023 11:41 AM, Alan Previn wrote:
MESA driver is creating protected context on every driver handle
creation to query caps bits for app. So when running CI tests,
they are observing hundreds of drm_errors when enabling PXP
in .config but using SOC fusing or BIOS configuration that
Hi, Angelo:
AngeloGioacchino Del Regno 於
2023年3月23日 週四 下午4:58寫道：
>
> Il 21/03/23 13:18, Nancy.Lin ha scritto:
> > The hardware path of vdosys1 with DPTx output need to go through by several
> > modules, such as, OVL_ADAPTOR and MERGE.
> >
> > Add DRM and these modules support by the patches
Move virtio_gpu_execbuffer_ioctl() into separate virtgpu_submit.c file
and refactor the code along the way to ease addition of new features to
the ioctl.
Reviewed-by: Rob Clark
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/Makefile | 2 +-
Add sync object DRM UAPI support to VirtIO-GPU driver. It's required
for enabling a full-featured Vulkan fencing by Venus and native context
VirtIO-GPU Mesa drivers.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/virtgpu_drv.c| 3 +-
drivers/gpu/drm/virtio/virtgpu_submit.c |
We have multiple Vulkan context types that are awaiting for the addition
of the sync object DRM UAPI support to the VirtIO-GPU kernel driver:
1. Venus context
2. Native contexts (virtio-freedreno, virtio-intel, virtio-amdgpu)
Mesa core supports DRM sync object UAPI, providing Vulkan drivers
On 3/24/23 00:51, Dmitry Osipenko wrote:
> On 3/24/23 00:18, Rob Clark wrote:
> ...
>>> +static int
>>> +virtio_gpu_parse_deps(struct virtio_gpu_submit *submit)
>>> +{
>>> + struct drm_virtgpu_execbuffer *exbuf = submit->exbuf;
>>> + struct drm_virtgpu_execbuffer_syncobj syncobj_desc;
On 3/23/23 22:03, Dmitry Osipenko wrote:
> struct virtio_gpu_submit {
> + struct virtio_gpu_submit_post_dep *post_deps;
> + unsigned int num_out_syncobjs;
> +
> + struct drm_syncobj **in_syncobjs;
> + unsigned int num_in_syncobjs;
> + uint64_t *in_fence_ids;
> + unsigned
On 3/24/23 00:18, Rob Clark wrote:
...
>> +static int
>> +virtio_gpu_parse_deps(struct virtio_gpu_submit *submit)
>> +{
>> + struct drm_virtgpu_execbuffer *exbuf = submit->exbuf;
>> + struct drm_virtgpu_execbuffer_syncobj syncobj_desc;
>> + size_t syncobj_stride =
https://bugzilla.kernel.org/show_bug.cgi?id=217237
Bug ID: 217237
Summary: Fail to read EDID after resuming from suspend since
kernel 6.2
Product: Drivers
Version: 2.5
Kernel Version: 6.3.0-rc3
Hardware: All
On Thu, Mar 23, 2023 at 7:03 AM Christian König
wrote:
>
> Am 23.03.23 um 14:54 schrieb Rob Clark:
> > On Thu, Mar 23, 2023 at 12:35 AM Christian König
> > wrote:
> >> Am 22.03.23 um 23:44 schrieb Rob Clark:
> >>> From: Rob Clark
> >>>
> >>> Container fences have burner contexts, which makes
On Thu, Mar 23, 2023 at 12:05 PM Dmitry Osipenko
wrote:
>
> Add sync object DRM UAPI support to VirtIO-GPU driver. It's required
> for enabling a full-featured Vulkan fencing by Venus and native context
> VirtIO-GPU Mesa drivers.
>
> Signed-off-by: Dmitry Osipenko
> ---
>
Hi,
On Tue, Mar 14, 2023 at 8:55 PM Pin-yen Lin wrote:
>
> When there are multiple EDID reads, the bridge will be repeatedly
> enabled and disabled. Add a cache for EDID to speed this up.
>
> Signed-off-by: Pin-yen Lin
> Reviewed-by: Robert Foss
> Reviewed-by: Douglas Anderson
> ---
>
>
Hi,
On Tue, Mar 14, 2023 at 8:55 PM Pin-yen Lin wrote:
>
> Skip the drm_bridge_chain_pre_enable call when the bridge is already
> pre_enabled. This make pre_enable and post_disable (thus
> pm_runtime_get/put) symmetric.
>
> Fixes: 46f206304db0 ("drm/bridge: ps8640: Rework power state handling")
On Thu, Mar 23, 2023 at 12:05 PM Dmitry Osipenko
wrote:
>
> Move virtio_gpu_execbuffer_ioctl() into separate virtgpu_submit.c file
> and refactor the code along the way to ease addition of new features to
> the ioctl.
>
> Signed-off-by: Dmitry Osipenko
Reviewed-by: Rob Clark
> ---
>
Hi Daniel,
Here goes drm-intel-next-2023-03-23:
Core Changes:
- drm: Add SDP Error Detection Configuration Register (Arun)
Driver Changes:
- Meteor Lake enabling and fixes (RK, Jose, Madhumitha)
- Lock the fbdev obj before vma pin (Tejas)
- DSC fixes (Stanislav)
- Fixes and clean-up on opregion
Sorry, I think that was just a stray comment that I messed up while
editing my response. You can ignore it.
Regards,
Felix
Am 2023-03-23 um 15:12 schrieb Kim, Jonathan:
index c06ada0844ba..a2ac98d06e71 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++
[AMD Official Use Only - General]
> -Original Message-
> From: Kuehling, Felix
> Sent: Monday, March 20, 2023 8:31 PM
> To: Kim, Jonathan ; amd-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Subject: Re: [PATCH 19/32] drm/amdkfd: add runtime enable operation
>
>
> On
[AMD Official Use Only - General]
Hello Rodrigo and Harry,
I would like to propose some changes to keep this patch consistent with the
naming scheme and general organization of the drm_dp.h file.
#define DP_EDP_OLED_VESA_BRIGHTNESS_ON 0x80
It would be better to use the (1<<7)
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: Thursday, February 16, 2023 6:44 PM
> To: Kim, Jonathan ; amd-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Subject: Re: [PATCH 03/32] drm/amdkfd: prepare per-process debug enable
> and disable
>
>
> On
On Tue, Mar 21, 2023 at 11:47 PM Christian König
wrote:
>
> Hi Mikhail,
>
> That looks like a reference counting issue to me.
>
> I'm going to take a look, but we have already fixed one of those recently.
>
> Probably best that you try this on drm-fixes, just to double check that
> this isn't the
Add sync object DRM UAPI support to VirtIO-GPU driver. It's required
for enabling a full-featured Vulkan fencing by Venus and native context
VirtIO-GPU Mesa drivers.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/virtgpu_drv.c| 3 +-
drivers/gpu/drm/virtio/virtgpu_submit.c |
Move virtio_gpu_execbuffer_ioctl() into separate virtgpu_submit.c file
and refactor the code along the way to ease addition of new features to
the ioctl.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/virtio/Makefile | 2 +-
drivers/gpu/drm/virtio/virtgpu_drv.h| 4 +
We have multiple Vulkan context types that are awaiting for the addition
of the sync object DRM UAPI support to the VirtIO-GPU kernel driver:
1. Venus context
2. Native contexts (virtio-freedreno, virtio-intel, virtio-amdgpu)
Mesa core supports DRM sync object UAPI, providing Vulkan drivers
MESA driver is creating protected context on every driver handle
creation to query caps bits for app. So when running CI tests,
they are observing hundreds of drm_errors when enabling PXP
in .config but using SOC fusing or BIOS configuration that cannot
support PXP sessions.
The fixes tag
On Thu, 2023-03-23 at 08:35 +, Tvrtko Ursulin wrote:
On 23/03/2023 00:27, Teres Alexis, Alan Previn wrote:
On Fri, 2023-03-17 at 13:37 +0200, Tamminen, Eero T wrote:
Hi,
On 16.3.2023 10.50, Tvrtko Ursulin wrote:
[ 11.674183] i915 :00:02.0: PXP init-arb-session-15 failed due
to
Hi Dave, Daniel,
Fixes for 6.3.
The following changes since commit e8d018dd0257f744ca50a729e3d042cf2ec9da65:
Linux 6.3-rc3 (2023-03-19 13:27:55 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.3-2023-03-23
for you to
On Thu, Mar 23, 2023 at 03:17:38PM +0100, Niklas Schnelle wrote:
> On Wed, 2023-03-15 at 12:19 +0200, Ville Syrjälä wrote:
> > On Wed, Mar 15, 2023 at 09:16:50AM +0100, Geert Uytterhoeven wrote:
> > > Hi Niklas,
> > >
> > > On Tue, Mar 14, 2023 at 1:13 PM Niklas Schnelle
> > > wrote:
> > > > In
Hi Inki,
On Mon, Mar 13, 2023 at 9:51 PM Inki Dae wrote:
>> Could you please apply v16?
>
>
> I am planning to merge this patch series soon, but I will be proceeding with
> the pull-request next week. As the DSIM driver is being moved to the bridge
> folder, I would like to wait for
On Wed, 2023-03-15 at 13:54 +0200, Jani Nikula wrote:
> On Tue, 14 Mar 2023, Niklas Schnelle wrote:
> > In a future patch HAS_IOPORT=n will result in inb()/outb() and friends
> > not being declared. We thus need to add HAS_IOPORT as dependency for
> > those drivers using them. In the bochs driver
On 3/23/2023 6:55 AM, Stanislaw Gruszka wrote:
From: Andrzej Kacprowski
IPC messages transmitted to the device must be marked as
allocated - status field must be set to 1. The VPU driver
has IVPU_IPC_HDR_ALLOCATED incorrectly defined. Future VPU
firmware versions will reject all IPC messages
On 3/23/2023 6:55 AM, Stanislaw Gruszka wrote:
The driver calculates the wrong frequency because it ignores
the workpoint config and this cause undesired power/performance
characteristics. Fix this by using the workpoint config in
the freq calculations.
Fixes: 35b137630f08 ("accel/ivpu:
On 3/23/2023 6:54 AM, Stanislaw Gruszka wrote:
The SSID=1 is used by the firmware as default value in
case SSID mapping is not initialized. This allows
detecting use of miss-configured memory contexts.
The future FW versions may not allow using SSID=1.
SSID=65 is valid value, number of contexts
On 3/23/2023 6:54 AM, Stanislaw Gruszka wrote:
Prevent running recovery_work after device is removed.
Fixes: 852be13f3bd3 ("accel/ivpu: Add PM support")
Signed-off-by: Stanislaw Gruszka
Reviewed-by: Jeffrey Hugo
ozlabs.org/project/devicetree-bindings/patch/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-3-3ead1e418...@linaro.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the abo
rors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-1-3ead1e418...@linaro.org
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already
Hi,
On 23/03/2023 15:38, Bjorn Andersson wrote:
On Tue, Mar 21, 2023 at 09:51:34PM +0100, Konrad Dybcio wrote:
On 17.03.2023 16:06, Neil Armstrong wrote:
@@ -2783,6 +2790,78 @@ opp-5 {
};
};
+ mdss_dp0:
On Tue, Mar 21, 2023 at 09:51:34PM +0100, Konrad Dybcio wrote:
> On 17.03.2023 16:06, Neil Armstrong wrote:
> > @@ -2783,6 +2790,78 @@ opp-5 {
> > };
> > };
> >
> > + mdss_dp0: displayport-controller@ae9 {
> > +
On Wed, 2023-03-15 at 12:19 +0200, Ville Syrjälä wrote:
> On Wed, Mar 15, 2023 at 09:16:50AM +0100, Geert Uytterhoeven wrote:
> > Hi Niklas,
> >
> > On Tue, Mar 14, 2023 at 1:13 PM Niklas Schnelle
> > wrote:
> > > In a future patch HAS_IOPORT=n will result in inb()/outb() and friends
> > > not
Am 23.03.23 um 14:54 schrieb Rob Clark:
On Thu, Mar 23, 2023 at 12:35 AM Christian König
wrote:
Am 22.03.23 um 23:44 schrieb Rob Clark:
From: Rob Clark
Container fences have burner contexts, which makes the trick to store at
most one fence per context somewhat useless if we don't unwrap
Am 2023-03-23 um 09:50 schrieb Kim, Jonathan:
[Public]
-Original Message-
From: Kuehling, Felix
Sent: Monday, March 20, 2023 5:50 PM
To: Kim, Jonathan ; amd-
g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 15/32] drm/amdkfd: prepare trap workaround
vailable here:
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230323-topic-sm8450-upstream-dt-bindings-fixes-v1-2-3ead1e418...@linaro.org
pm8941@0: gpio@c000: 'otg' does not match any of the regexes: '-state$',
'pinctrl-[0-9]+'
arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dtb
:
ufs@1d84000: reg: [[0, 30949376, 0, 12288]] is too short
From schema:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230323-topic-s
['qcom,dsi-phy-5nm-8450']
Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.example.dtb:
/example-0/display-subsystem@ae0/phy@ae96400: failed to match any schema
with compatible: ['qcom,dsi-phy-5nm-8450']
doc reference errors (make refcheckdocs):
See
https://patchwork.ozlabs.org/pr
On Thu, Mar 23, 2023 at 12:35 AM Christian König
wrote:
>
> Am 22.03.23 um 23:44 schrieb Rob Clark:
> > From: Rob Clark
> >
> > Container fences have burner contexts, which makes the trick to store at
> > most one fence per context somewhat useless if we don't unwrap array or
> > chain fences.
>
[Public]
> -Original Message-
> From: Kuehling, Felix
> Sent: Monday, March 20, 2023 5:50 PM
> To: Kim, Jonathan ; amd-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Subject: Re: [PATCH 15/32] drm/amdkfd: prepare trap workaround for gfx11
>
>
> On 2023-01-25 14:53,
Hi,
On Mon, Mar 20, 2023 at 08:21:17PM +0100, Andi Shyti wrote:
> From: Jonathan Cavitt
>
> The gt_tlb live selftest has the same code coverage as the
> igt_cs_tlb subtest of gtt, except it is better at detecting
> TLB bugs. Furthermore, while igt_cs_tlb is hitting some
> unforeseen issues,
From: Fabio Estevam
Marco's NXP email is no longer valid.
Change it to his Gmail account.
Signed-off-by: Fabio Estevam
---
Marco,
If you are no longer interested in being listed as the maintainer contact
for the seiko,43wvf1g.yaml, please let me know.
On 23/03/2023 11:51, Krzysztof Kozlowski wrote:
On 23/03/2023 11:25, Neil Armstrong wrote:
Fixes the following DT bindings check error:
domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do
not match any of the regexes:
'pinctrl-[0-9]+'
domain-idle-states:
On 23/03/2023 11:47, Krzysztof Kozlowski wrote:
On 23/03/2023 11:25, Neil Armstrong wrote:
Fixes the following DT bindings check error:
codec@33f: clocks: [[137, 57, 1], [137, 102, 1], [137, 103, 1], [137, 70,
1]] is too long
codec@33f: clock-names: 'oneOf' conditional failed, one must
Hi,
On 23/03/2023 11:49, Krzysztof Kozlowski wrote:
On 23/03/2023 11:25, Neil Armstrong wrote:
Fixes the following DT bindings check error:
ufshc@1d84000: Unevaluated properties are not allowed ('reg-names' was
unexpected)
Signed-off-by: Neil Armstrong
---
From: Andrzej Kacprowski
IPC messages transmitted to the device must be marked as
allocated - status field must be set to 1. The VPU driver
has IVPU_IPC_HDR_ALLOCATED incorrectly defined. Future VPU
firmware versions will reject all IPC messages with invalid
status and will not work with a VPU
The driver calculates the wrong frequency because it ignores
the workpoint config and this cause undesired power/performance
characteristics. Fix this by using the workpoint config in
the freq calculations.
Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver for Intel VPU")
Use pci_set_power_state() to disable buttress when device is removed.
This is workaround of hardware bug that hangs the system.
Additionally not disabling buttress prevents CPU enter deeper Pkg-C
states when the driver is unloaded or fail to probe.
Fixes: 35b137630f08 ("accel/ivpu: Introduce a
The support for single tile SKUs was dropped from MTL.
Note that we can still boot the VPU with 1-tile work point
config - this is independent from number of tiles present
in the VPU.
Co-developed-by: Andrzej Kacprowski
Signed-off-by: Andrzej Kacprowski
Signed-off-by: Stanislaw Gruszka
The SSID=1 is used by the firmware as default value in
case SSID mapping is not initialized. This allows
detecting use of miss-configured memory contexts.
The future FW versions may not allow using SSID=1.
SSID=65 is valid value, number of contexts are limited
by number of available command
Remove FPGA workaround on power_down to skip checking for noc
quiescent state.
Put VPU in reset before powering it down and skip manipulating
registers that are reset by the VPU reset.
This fixes power down errors where VPU is powered down just after VPU
is booted.
Fixes: 35b137630f08
Prevent running recovery_work after device is removed.
Fixes: 852be13f3bd3 ("accel/ivpu: Add PM support")
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_drv.c | 2 ++
drivers/accel/ivpu/ivpu_pm.c | 17 ++---
drivers/accel/ivpu/ivpu_pm.h | 1 +
3 files changed, 17
We should not access hardware after we unbind from the bus.
Use drm_dev_enter() / drm_dev_exit() to mark code sections where
hardware is accessed (and not already protected by other locks)
and drm_dev_unplug() to mark device is gone.
Fixes: 35b137630f08 ("accel/ivpu: Introduce a new DRM driver
Various fixes intended for linux 6.3 relase.
Patch 6 is dependency for patch 7.
v2:
- add Fixes tags
- fix printing error on unplug
- clarify that SSID=65 is valid in the commit message
- change commit messages for patch 4 and 7
- add patch 8 with new fix
Andrzej Kacprowski (1):
accel/ivpu:
On Thu, Mar 23, 2023 at 12:38:49AM +0200, Dmitry Baryshkov wrote:
> On Wed, 22 Mar 2023 at 12:47, Pin-yen Lin wrote:
...
> > +config DRM_DISPLAY_DP_TYPEC_HELPER
> > + bool
> > + default y
> > + depends on DRM_DISPLAY_HELPER
> > + depends on DRM_DISPLAY_HELPER=TYPEC ||
On Wed, Mar 22, 2023 at 06:27:56PM +0200, Jani Nikula wrote:
> On Wed, 22 Mar 2023, Andy Shevchenko
> wrote:
> > On Wed, Mar 22, 2023 at 06:46:32PM +0800, Pin-yen Lin wrote:
> >> +#ifdef CONFIG_DRM_DISPLAY_DP_TYPEC_HELPER
> >
> > Ah, maybe this should use IS_REACHABLE() ?
>
> Personally, I
On 21/03/23 20:47, Krzysztof Kozlowski wrote:
On 21/03/2023 15:28, Jayesh Choudhary wrote:
On 21/03/23 18:08, Krzysztof Kozlowski wrote:
On 21/03/2023 13:02, Jayesh Choudhary wrote:
+type: boolean
+description:
+ Set if the HPD line on the bridge isn't hooked up to
From: Tal Cohen
The disable pci message is sent in reset device. It informs the FW not
to raise more EQs. The Driver may ignore received EQs, when the device
is in disabled mode.
The duplication happens when hard reset is scheduled during compute
reset and also performs 'escalate_reset_flow'.
From: Tal Cohen
Fix an issue in hard reset flow in which the driver didn't send a
disable pci message if there was an active compute context.
In hard reset, disable pci message should be sent no matter if
a compute context exists or not.
Signed-off-by: Tal Cohen
Reviewed-by: Oded Gabbay
From: Koby Elbaz
COMMS protocol is used for LKD <--> FW communication, and any
communication failure between the two might turn out to be
destructive, hence, it should be well emphasized.
Signed-off-by: Koby Elbaz
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
From: Dafna Hirschfeld
since the function might fail and we should propagate the failure.
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/memory.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff
From: Tal Cohen
When the device is in disabled state, the driver isn't suppose to
receive any events from FW. Printing the event type, as part of the
message that was already printed, shall help to get more info if this
unexpected message is received.
Signed-off-by: Tal Cohen
Reviewed-by: Oded
From: Koby Elbaz
Once a memory mapping is added to the page tables, it's followed by
a TLB invalidation request which could potentially fail (HW failure).
Removing the mapping is simply a part of this failure handling routine.
TLB invalidation failure prints were updated to be more accurate.
On 3/16/2023 5:59 PM, Nirmoy Das wrote:
From: Chris Wilson
i915_gem_object_create_lmem_from_data() lacks the flush of the data
written to lmem to ensure the object is marked as dirty and the writes
flushed to the backing store. Once created, we can immediately release
the obj->mm.mapping
Hi Dave, Daniel,
Lots of small commits with cleanup and fixes this time around, nothing major
otherwise.
Cheers,
~Maarten
drm-misc-next-2023-03-23:
drm-misc-next for v6.4-rc1:
Core Changes:
- Add unit test for xrgb to mono.
- Assorted small fixes to format helper selftests.
- Assorted
On Wed, Mar 22, 2023 at 05:28:48PM +0100, Stanislaw Gruszka wrote:
> On Wed, Mar 22, 2023 at 08:52:56AM -0600, Jeffrey Hugo wrote:
> > On 3/22/2023 3:19 AM, Stanislaw Gruszka wrote:
> > > VPU cpu clock frequency depends on the workpoint configuration
> > > that was granted by the punit. Previously
On 23/03/2023 11:25, Neil Armstrong wrote:
> Fixes the following DT bindings check error:
> domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do
> not match any of the regexes:
> 'pinctrl-[0-9]+'
> domain-idle-states: cluster-sleep-1: 'idle-state-name', 'local-timer-stop'
On 23/03/2023 11:25, Neil Armstrong wrote:
> Fixes the following DT bindings check error:
> ufshc@1d84000: Unevaluated properties are not allowed ('reg-names' was
> unexpected)
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 -
> 1 file changed, 1 deletion(-)
On 23/03/2023 11:25, Neil Armstrong wrote:
> Fixes the following DT bindings check error:
> codec@33f: clocks: [[137, 57, 1], [137, 102, 1], [137, 103, 1], [137, 70,
> 1]] is too long
> codec@33f: clock-names: 'oneOf' conditional failed, one must be fixed:
> ['mclk',
Hi Dave & Daniel -
Otherwise a fairly regular fixes pull, except for two things:
First, I have not gotten CI results on this. I don't know what gives.
Second, I missed adding the hwmon revert to the tag. I accidentally
picked up the commit for the previous pull, and it shouldn't have been
On 23/03/2023 11:25, Neil Armstrong wrote:
> Add a compatible for PM8450, commonly found with SM8450.
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
> 1 file changed, 1 insertion(+)
Already sent:
On Thu, Mar 23, 2023 at 12:29 PM Stanislaw Gruszka
wrote:
>
> On Thu, Mar 23, 2023 at 04:35:49PM +0800, Cai Huoqing wrote:
> > Remove pci_clear_master to simplify the code,
> > the bus-mastering is also cleared in do_pci_disable_device,
> > like this:
> > ./drivers/pci/pci.c:2197
> > static void
On Thu, 23 Mar 2023 09:24:06 +0100
AngeloGioacchino Del Regno
wrote:
> Il 16/03/23 11:20, AngeloGioacchino Del Regno ha scritto:
> > Changes in v5:
> > - Changed minItems for power-domain-names in base schema as
> > suggested by Rob
> >
> > Changes in v4:
> > - Refactored power-domains
On Thu, Mar 23, 2023 at 04:35:49PM +0800, Cai Huoqing wrote:
> Remove pci_clear_master to simplify the code,
> the bus-mastering is also cleared in do_pci_disable_device,
> like this:
> ./drivers/pci/pci.c:2197
> static void do_pci_disable_device(struct pci_dev *dev)
> {
> u16 pci_command;
>
Fixes the following DT bindings check error:
codec@33f: clocks: [[137, 57, 1], [137, 102, 1], [137, 103, 1], [137, 70,
1]] is too long
codec@33f: clock-names: 'oneOf' conditional failed, one must be fixed:
['mclk', 'macro', 'dcodec', 'npl'] is too long
The implementation
Fixes the following DT bindings check error:
pci@1c0: Unevaluated properties are not allowed ('power-domain-names' were
unexpected)
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git
Add the final "s" to the pgio properties and fix the invalid "enable"
name to the correct "wake", checked against the HDK8450 schematics.
Fixes: bc6588bc25fb ("arm64: dts: qcom: sm8450: add PCIe1 root device")
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 4 ++--
1
Fixes the following DT bindings check error:
ufshc@1d84000: Unevaluated properties are not allowed ('reg-names' was
unexpected)
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi
Move the qcom,sm8450-ufshc to the right allOf:if allowing the ICE clocks
and registers to be specified.
Fixes: 462c5c0aa798 ("dt-bindings: ufs: qcom,ufs: convert to dtschema")
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 +-
1 file changed, 1
Fixes the following DT bindings check error:
domain-idle-states: cluster-sleep-0: 'idle-state-name', 'local-timer-stop' do
not match any of the regexes:
'pinctrl-[0-9]+'
domain-idle-states: cluster-sleep-1: 'idle-state-name', 'local-timer-stop' do
not match any of the regexes:
'pinctrl-[0-9]+'
Add a compatible for PM8450, commonly found with SM8450.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
The DSI compatible changed between patchset revisions, but that wasn't
reflected in the bindings. Fix it.
0eda3c6cb1c5 ("dt-bindings: display/msm: add support for the display on SM8450")
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/qcom,sm8450-mdss.yaml | 2 +-
tion/devicetree/bindings/ufs/qcom,ufs.yaml | 2 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi | 16
4 files changed, 7 insertions(+), 14 deletions(-)
---
base-commit: b9e9869138880e668fa8cb3b186d04cd13bd57a6
change-id: 20230323-topic-sm8450-upstream-dt-bindings-f
If stolen memory allocation fails for fbdev, the driver will
fallback to system memory. Calculation of smem_start is wrong
for such framebuffer objs if the platform comes with no gmadr or
no aperture. Solve this by adding fb_mmap callback which will
use GTT if aperture is available otherwise will
Add a helper function to retrieve struct intel_fbdev from
struct drm_fb_helper.
Cc: Matthew Auld
Cc: Andi Shyti
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by: Nirmoy Das
Reviewed-by: Jani Nikula
Reviewed-by: Andi Shyti
Reviewed-by: Andrzej Hajda
---
Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap()
callback for i915's framebuffer objects.
v2: add a comment why i915_gem_object_get() needed(Andi).
Cc: Matthew Auld
Cc: Andi Shyti
Cc: Ville Syrjälä
Cc: Jani Nikula
Cc: Imre Deak
Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
On Wed, Mar 22, 2023 at 12:59:33PM +0200, Matti Vaittinen wrote:
> > I agree with Maxime that a little bit of duplication (that can be cleaned
> > up by each subsystem at their own pace) is the path of least resistance.
>
> I'd say this depends. It probably is the path of least resistance for
Some SoCs implementing ARM Mali GPUs are subject to speed binning:
this means that some versions of the same SoC model may need to be
limited to a slower frequency compared to the other:
this is being addressed by reading nvmem (usually, an eFuse array)
containing a number that identifies the
Some SoCs implementing ARM Mali GPUs may be subject to speed binning
and the usable bin is read from nvmem: document the addition of nvmem
and nvmem-cells for 'speed-bin'.
Signed-off-by: AngeloGioacchino Del Regno
---
.../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 7 +++
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