Hi David,
> >
> >> On 05.12.23 06:35, Vivek Kasireddy wrote:
> >>> For drivers that would like to longterm-pin the pages associated
> >>> with a memfd, the pin_user_pages_fd() API provides an option to
> >>> not only pin the pages via FOLL_PIN but also to check and migrate
> >>> them if they
Hi, Rob
Thanks for review and comment.
On 2023/11/28 23:52, Rob Herring wrote:
> On Mon, Nov 27, 2023 at 07:34:35PM +0800, Shengyang Chen wrote:
>> From: Keith Zhao
>>
>> Add properties in CDNS DSI yaml file to match with
>> CDNS DSI module in StarFive JH7110 SoC.
>>
>> Signed-off-by: Keith
On 2023/11/27 20:23, Krzysztof Kozlowski wrote:
> On 27/11/2023 12:34, Shengyang Chen wrote:
>> From: Keith Zhao
>>
>> Add properties in CDNS DSI yaml file to match with
>> CDNS DSI module in StarFive JH7110 SoC.
>>
>> Signed-off-by: Keith Zhao
>> ---
>>
Hello,
On 21/07/23 9:44 pm, Ziqi Zhao wrote:
The connector_set contains uninitialized values when allocated with
kmalloc_array. However, in the "out" branch, the logic assumes that any
element in connector_set would be equal to NULL if failed to
initialize, which causes the bug reported by
Hi,Krzysztof
Thanks for review and comment.
On 2023/11/27 20:22, Krzysztof Kozlowski wrote:
> On 27/11/2023 12:34, Shengyang Chen wrote:
>> From: Keith Zhao
>>
>> Add properties in CDNS DSI yaml file to match with
>> CDNS DSI module in StarFive JH7110 SoC.
>>
>> Signed-off-by: Keith Zhao
>>
Now that CDM block support has been added to DPU lets also add its
entry to the DPU snapshot to help debugging.
Signed-off-by: Abhinav Kumar
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4
1 file changed, 4 insertions(+)
diff --git
Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
that it has only RGB formats and can be used on any chipset having a WB
block.
Introduce a new wb2_formats_rgb_yuv array to the catalog to
indicate support for YUV formats to writeback in addition to RGB.
Chipsets which have
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the reservation is done only for writeback
but can easily be extended by relaxing the checks once other
interfaces are ready to output YUV.
changes in v2:
- use needs_cdm from topology struct
-
To setup and enable CDM block for the writeback pipeline, lets
add the pieces together to set the active bits and the flush
bits for the CDM block.
changes in v2:
- passed the cdm idx to update_pending_flush_cdm()
(have retained the R-b as its a minor change)
Signed-off-by:
Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
the writeback encoder to setup the CDM block.
Currently, this is defined and used within the writeback's physical
encoder layer however, the function can be modified to be used to setup
the CDM block even for non-writeback
In preparation of setting up CDM block, add the logic to disable it
properly during encoder cleanup.
changes in v2:
- call update_pending_flush_cdm even when bind_pingpong_blk
is not present
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |
CDM block comes with its own set of registers and operations
which can be done. In-line with other hardware sub-blocks, this
change adds the dpu_hw_cdm abstraction for the CDM block.
changes in v2:
- replace bit magic with relevant defines
- use drmm_kzalloc instead of
Even though there is usually only one CDM block, it can be
used by either HDMI, DisplayPort OR Writeback interfaces.
Hence its allocation needs to be tracked properly by the
resource manager to ensure appropriate availability of the
block.
changes in v2:
- move needs_cdm to topology
Add the RM APIs necessary to initialize and allocate CDM
blocks to be used by the rest of the DPU pipeline.
changes in v2:
- treat cdm_init() failure as fatal
- fixed the commit text
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 13 +
Add CDM blocks to the sm8250 dpu_hw_catalog to support
YUV format output from writeback block.
changes in v2:
- re-use the cdm definition from sc7280
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 1 +
1 file changed, 1 insertion(+)
diff
CDM block will need its own logic to program the flush and active
bits in the dpu_hw_ctl layer.
Make necessary changes in dpu_hw_ctl to support CDM programming.
changes in v2:
- remove unused empty line
- pass in cdm_num to update_pending_flush_cdm()
Signed-off-by: Abhinav Kumar
Add CDM blocks to the sc7280 dpu_hw_catalog to support
YUV format output from writeback block.
changes in v2:
- remove explicit zero assignment for features
- move sc7280_cdm to dpu_hw_catalog from the sc7280
catalog file as its definition can be re-used
Signed-off-by:
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to the dpu_hw_util to return the CSC
corresponding to the request type. This will help to add more
supported CSC types such as the RGB to YUV one which is used in
the case of CDM.
Signed-off-by: Abhinav Kumar
dpu_encoder_phys_wb_setup_cdp() is not programming the chroma down
prefetch block. Its setting up the display ctl path for writeback.
Hence rename it to dpu_encoder_phys_wb_setup_ctl() to match what its
actually doing.
Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for
For YUV cases, setting the required format bits was missed
out in the register programming. Lets fix it now in preparation
of adding YUV formats support for writeback.
changes in v2:
- dropped the fixes tag as its not a fix but adding
new functionality
Signed-off-by: Abhinav Kumar
---
In preparation for adding more formats to dpu writeback add
format validation to it to fail any unsupported formats.
changes in v2:
- correct some grammar in the commit text
Fixes: d7d0e73f7de3 ("drm/msm/dpu: introduce the dpu_encoder_phys_* for
writeback")
Signed-off-by: Abhinav Kumar
Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
which among other things has a CSC block that can convert RGB input
from the DPU to YUV data.
This block can be used with either HDMI, DP or writeback interface.
In this series, lets first add the support for CDM block to
Hi Linus,
Regular weekly fixes, mostly amdgpu and i915 as usual. A couple of
nouveau, panfrost, one core and one bridge Kconfig.
Seems about normal for rc5,
Regards,
Dave.
drm-fixes-2023-12-08:
drm fixes for v6.7-rc5
atomic-helpers:
- invoke end_fb_access while owning plane state
i915:
- fix
On Thu, Dec 07, 2023 at 05:37:19PM +0100, Neil Armstrong wrote:
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> b/arch/arm64/boot/dts/qcom/sm8650.dtsi
[..]
> +
> + mdss_dp0: displayport-controller@af54000 {
> + compatible = "qcom,sm8650-dp";
>
Hi Keith：
在 2023-12-08 11:00:31，"Keith Zhao" 写道：
>
>
>On 2023/12/8 8:37, Andy Yan wrote:
>> Hi Keth：
>>
>>
>>
>>
>>
>>
>> 在 2023-12-07 18:48:13，"Keith Zhao" 写道：
>>>
>>>
>>>On 2023/12/7 17:02, Andy Yan wrote:
Hi Keith：
On 2023/12/8 8:37, Andy Yan wrote:
> Hi Keth：
>
>
>
>
>
>
> 在 2023-12-07 18:48:13，"Keith Zhao" 写道：
>>
>>
>>On 2023/12/7 17:02, Andy Yan wrote:
>>>
>>>
>>>
>>>
>>> Hi Keith：
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>>
>>> At 2023-12-06 22:11:33, "Keith Zhao" wrote:
On Mon, 20 Nov 2023 13:12:51 +0100, Konrad Dybcio wrote:
> as it says on the can
>
> drm/msm patches for Rob
> arm64 patches for linux-arm-msm
>
> for use with https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25408
>
> [...]
Applied, thanks!
[1/4] arm64: dts: qcom: sc7280: Add ZAP
From: Alexey Makhalov
VMware hypercalls use I/O port, VMCALL or VMMCALL instructions.
Add __tdx_hypercall path to support TDX guests.
No change in high bandwidth hypercalls, as only low bandwidth
ones are supported for TDX guests.
Co-developed-by: Tim Merrifield
Signed-off-by: Tim Merrifield
On 12/7/23 9:12 AM, Dave Hansen wrote:
On 12/5/23 23:15, Alexey Makhalov wrote:
+#ifdef CONFIG_INTEL_TDX_GUEST
+/* Export tdx hypercall and allow it only for VMware guests. */
+void vmware_tdx_hypercall_args(struct tdx_module_args *args)
+{
+ if (hypervisor_is_type(X86_HYPER_VMWARE))
+
On Thu, Dec 7, 2023 at 4:52 PM Mina Almasry wrote:
>
> Major changes in v1:
> --
>
> 1. Implemented MVP queue API ndos to remove the userspace-visible
>driver reset.
>
> 2. Fixed issues in the napi_pp_put_page() devmem frag unref path.
>
> 3. Removed RFC tag.
>
> Many smaller
On Thu, 07 Dec 2023 17:37:16 +0100, Neil Armstrong wrote:
> This adds support for the DisplayPort Controller found in the SM8650
> SoC, but it requires a specific compatible because the registers offsets
> has changed since SM8550.
>
> This also updates the SM8650 MDSS bindings to allow a
On Wed, 04 Oct 2023 06:19:03 +0300, Dmitry Baryshkov wrote:
> There are no in-kernel users of MSM_ENC_VBLANK wait type. Drop it
> together with the corresponding wait_for_vblank callback.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: drop MSM_ENC_VBLANK support
On Wed, 06 Dec 2023 15:02:05 +0300, Dan Carpenter wrote:
> The platform_get_irq() function returns negative error codes. It never
> returns zero. Fix the check accordingly.
>
>
Applied, thanks!
[1/1] drm/msm/dp: Fix platform_get_irq() check
On 06/12/2023 14:02, Dan Carpenter wrote:
The platform_get_irq() function returns negative error codes. It never
returns zero. Fix the check accordingly.
Fixes: 82c2a5751227 ("drm/msm/dp: tie dp_display_irq_handler() with dp driver")
Signed-off-by: Dan Carpenter
---
As the renamed drm_atomic_helper_check_wb_connector_state() now accepts
drm_writeback_connector as the first argument (instead of drm_encoder),
move the VKMS writeback atomic_check from drm_encoder_helper_funcs to
drm_connector_helper_funcs. Also drop the vkms_wb_encoder_helper_funcs,
which have
The drm_atomic_helper_check_wb_encoder_state() function doesn't use
encoder for anything other than getting the drm_device instance. The
function's description talks about checking the writeback connector
state, not the encoder state. Moreover, there is no such thing as an
encoder state, encoders
The function drm_atomic_helper_check_wb_encoder_state() doesn't use
drm_encoder for anything sensible. Internally it checks
drm_writeback_connector's state. Thus it makes sense to let this
function accept drm_connector object and the drm_atomic_state
and rename it to
Thank You for the patch. We noticed a break in the customer board with
the latest GOP + this patch.
Thank You
Khaled
On Wed, 2023-12-06 at 18:46 +, Paz Zcharya wrote:
> There was an assumption that for iGPU there should be a 1:1 mapping
> of GGTT to physical address pointing to the
On Thu, 7 Dec 2023 at 12:10, Maxime Ripard wrote:
>
> Hi,
>
> On Wed, Dec 06, 2023 at 01:14:54PM +0300, Dmitry Baryshkov wrote:
> > The drm_atomic_helper_check_wb_encoder_state() function doesn't use
> > encoder for anything other than getting the drm_device instance. The
> > function's
For device memory TCP, we expect the skb headers to be available in host
memory for access, and we expect the skb frags to be in device memory
and unaccessible to the host. We expect there to be no mixing and
matching of device memory frags (unaccessible) with host memory frags
(accessible) in the
Add an interface for the user to notify the kernel that it is done
reading the devmem dmabuf frags returned as cmsg. The kernel will
drop the reference on the frags to make them available for re-use.
Signed-off-by: Willem de Bruijn
Signed-off-by: Kaiyuan Zhang
Signed-off-by: Mina Almasry
---
ncdevmem is a devmem TCP netcat. It works similarly to netcat, but it
sends and receives data using the devmem TCP APIs. It uses udmabuf as
the dmabuf provider. It is compatible with a regular netcat running on
a peer, or a ncdevmem running on a peer.
In addition to normal netcat support,
In tcp_recvmsg_locked(), detect if the skb being received by the user
is a devmem skb. In this case - if the user provided the MSG_SOCK_DEVMEM
flag - pass it to tcp_recvmsg_devmem() for custom handling.
tcp_recvmsg_devmem() copies any data in the skb header to the linear
buffer, and returns a
Signed-off-by: Mina Almasry
---
Documentation/networking/devmem.rst | 270
1 file changed, 270 insertions(+)
create mode 100644 Documentation/networking/devmem.rst
diff --git a/Documentation/networking/devmem.rst
b/Documentation/networking/devmem.rst
new file mode
Overload the LSB of struct page* to indicate that it's a page_pool_iov.
Refactor mm calls on struct page* into helpers, and add page_pool_iov
handling on those helpers. Modify callers of these mm APIs with calls to
these helpers instead.
In areas where struct page* is dereferenced, add a check
Make skb_frag_page() fail in the case where the frag is not backed
by a page, and fix its relevant callers to handle this case.
Correctly handle skb_frag refcounting in the page_pool_iovs case.
Signed-off-by: Mina Almasry
---
Changes in v1:
- Fix illegal_highdma() (Yunsheng).
- Rework
Currently the page_pool behavior is that a page is considered for
recycling only once, the first time __page_pool_put_page() is called on
it.
This works because in practice the net stack only holds 1 reference to
the skb frags. In that case, the page_pool recycling works as expected,
as the skb
Implement netdev devmem allocator. The allocator takes a given struct
netdev_dmabuf_binding as input and allocates page_pool_iov from that
binding.
The allocation simply delegates to the binding's genpool for the
allocation logic and wraps the returned memory region in a page_pool_iov
struct.
Implement a memory provider that allocates dmabuf devmem page_pool_iovs.
The provider receives a reference to the struct netdev_dmabuf_binding
via the pool->mp_priv pointer. The driver needs to set this pointer for
the provider in the page_pool_params.
The provider obtains a reference on the
Add a netdev_dmabuf_binding struct which represents the
dma-buf-to-netdevice binding. The netlink API will bind the dma-buf to
rx queues on the netdevice. On the binding, the dma_buf_attach
& dma_buf_map_attachment will occur. The entries in the sg_table from
mapping will be inserted into a
API takes the dma-buf fd as input, and binds it to the netdevice. The
user can specify the rx queues to bind the dma-buf to.
Suggested-by: Stanislav Fomichev
Signed-off-by: Mina Almasry
---
Changes in v1:
- Add rx-queue-type to distingish rx from tx (Jakub)
- Return dma-buf ID from netlink
Define a struct that contains all of the memory needed for an RX
queue to function.
Implement the queue-api in GVE using this struct.
Currently the only memory is allocated at the time of queue start are
the RX pages in gve_rx_post_buffers_dqo(). That can be moved up to
queue_mem_alloc() time in
This API enables the net stack to reset the queues used for devmem.
Signed-off-by: Mina Almasry
---
include/linux/netdevice.h | 24
1 file changed, 24 insertions(+)
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 1b935ee341b4..316f7dee86ce
From: Jakub Kicinski
The page providers which try to reuse the same pages will
need to hold onto the ref, even if page gets released from
the pool - as in releasing the page from the pp just transfers
the "ownership" reference from pp to the provider, and provider
will wait for other references
From: Jakub Kicinski
Releasing the DMA mapping will be useful for other types
of pages, so factor it out. Make sure compiler inlines it,
to avoid any regressions.
Signed-off-by: Jakub Kicinski
Signed-off-by: Mina Almasry
---
This is implemented by Jakub in his RFC:
Major changes in v1:
--
1. Implemented MVP queue API ndos to remove the userspace-visible
driver reset.
2. Fixed issues in the napi_pp_put_page() devmem frag unref path.
3. Removed RFC tag.
Many smaller addressed comments across all the patches (patches have
individual change
Hi Keth：
在 2023-12-07 18:48:13，"Keith Zhao" 写道：
>
>
>On 2023/12/7 17:02, Andy Yan wrote:
>>
>>
>>
>>
>> Hi Keith：
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>>
>> At 2023-12-06 22:11:33, "Keith Zhao" wrote:
>>>
>>>
>>>On 2023/12/6 20:56, Maxime Ripard wrote:
On Wed, Dec 06, 2023 at
./drivers/gpu/drm/imagination/pvr_fw_trace.c:251:2-3: Unneeded semicolon
Reported-by: Abaci Robot
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7694
Signed-off-by: Yang Li
---
drivers/gpu/drm/imagination/pvr_fw_trace.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hi, Michael:
Michael Walle 於 2023年9月5日 週二 下午4:49寫道：
>
> drm_crtc_from_index(0) might return NULL if there are no CRTCs
> registered at all which will lead to a kernel oops in
> mtk_drm_crtc_dma_dev_get(). Add the missing return value check.
Applied to mediatek-drm-fixes [1], thanks.
[1]
Rob Herring writes:
> On Mon, Dec 04, 2023 at 05:05:30PM +0100, Javier Martinez Canillas wrote:
>> Rob Herring writes:
>>
>> > On Mon, Dec 4, 2023 at 3:39 AM Javier Martinez Canillas
>> > wrote:
>> >> Rob Herring writes:
>> >> > On Fri, Dec 1, 2023 at 4:21 AM Javier Martinez Canillas
>>
>>
Hi, Robin:
Robin Murphy 於 2023年11月23日 週四 下午9:41寫道：
>
> Remove the pointless check. If an IOMMU is providing transparent DMA API
> ops for any device(s) we care about, the DT code will have enforced the
> appropriate probe ordering already. And if the IOMMU *is* entirely
> absent, then attempting
On Mon, Dec 04, 2023 at 01:17:07PM +0100, Maxime Ripard wrote:
> The name of the structure drm_atomic_state is confusing. Let's add an
> entry to our todo list to rename it.
>
> Signed-off-by: Maxime Ripard
> ---
> Documentation/gpu/todo.rst | 18 ++
> 1 file changed, 18
On Mon, Dec 04, 2023 at 01:17:06PM +0100, Maxime Ripard wrote:
> The current documentation of drm_atomic_state says that it's the "global
> state object". This is confusing since, while it does contain all the
> objects affected by an update and their respective states, if an object
> isn't
On Mon, Dec 04, 2023 at 01:17:05PM +0100, Maxime Ripard wrote:
> The doc for the planes, crtcs, connectors and private_objs fields
> mention that they are pointers to an array of structures with
> per-$OBJECT data.
>
> While these fields are indeed pointers to an array, each item of that
> array
On Mon, Dec 04, 2023 at 01:17:04PM +0100, Maxime Ripard wrote:
> The num_connectors field documentation mentions a connector_states field
> that has never been part of this structure.
Not entirely correct, this is an oversight from 63e83c1dba54 ("drm:
Consolidate connector arrays in
On Mon, Dec 04, 2023 at 01:17:03PM +0100, Maxime Ripard wrote:
> Some fields of drm_atomic_state have been documented in-line, but some
> were documented in the main kerneldoc block before the structure.
>
> Since the former is the preferred option in DRM, let's move all the
> fields to an inline
Applied. Thanks!
Alex
On Thu, Dec 7, 2023 at 6:32 AM Colin Ian King wrote:
>
> There is a spelling mistake in a smu_print message. Fix it.
>
> Signed-off-by: Colin Ian King
> ---
> drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c | 8
> 1 file changed, 4 insertions(+), 4
On 11/14/2023 2:58 PM, Jonathan Marek wrote:
The value returned by msm_dsi_wide_bus_enabled() doesn't match what the
driver is doing in video mode. Fix that by actually enabling widebus for
video mode.
Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
Signed-off-by: Jonathan Marek
On 11/14/2023 2:58 PM, Jonathan Marek wrote:
Add a dsc_slice_per_pkt field to mipi_dsi_device struct and the necessary
changes to msm driver to support this field.
Note that the removed "pkt_per_line = slice_per_intf * slice_per_pkt"
comment is incorrect.
Hi John,
Thanks for catching the
On 2023-12-07 14:30, Xaver Hugl wrote:
Sorry, it looks like I sent this too soon. I tested the patch on a
second PC and it doesn't fix the issue there.
Ah, too bad. Won't merge it then.
Harry
Am Do., 7. Dez. 2023 um 19:25 Uhr schrieb Xaver Hugl :
With VRR, every atomic commit
On 2023-12-07 13:25, Xaver Hugl wrote:
With VRR, every atomic commit affecting a given display must trigger
a new scanout cycle, so that userspace is able to control the refresh
rate of the display. Before this commit, this was not the case for
atomic commits that only contain cursor plane
On 12/7/23 20:46, Akhil P Oommen wrote:
On Thu, Nov 23, 2023 at 12:03:56AM +0300, Danila Tikhonov wrote:
sc7180/sm7125 (atoll) expects speedbins from atoll.dtsi:
And has a parameter: /delete-property/ qcom,gpu-speed-bin;
107 for 504Mhz max freq, pwrlevel 4
130 for 610Mhz max freq, pwrlevel
On 12/7/23 17:37, Neil Armstrong wrote:
Declare the displayport controller present on the Qualcomm SM8650 SoC
and connected to the USB3/DP Combo PHY.
Signed-off-by: Neil Armstrong
---
[...]
+ clocks = < DISP_CC_MDSS_AHB_CLK>,
+
On Thu, Nov 23, 2023 at 12:03:56AM +0300, Danila Tikhonov wrote:
>
> sc7180/sm7125 (atoll) expects speedbins from atoll.dtsi:
> And has a parameter: /delete-property/ qcom,gpu-speed-bin;
> 107 for 504Mhz max freq, pwrlevel 4
> 130 for 610Mhz max freq, pwrlevel 3
> 159 for 750Mhz max freq,
Hi,
On Thu, Dec 7, 2023 at 10:58 AM Maxime Ripard wrote:
>
> On Thu, Dec 07, 2023 at 10:23:53AM -0800, Doug Anderson wrote:
> > Hi,
> >
> > On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
> > >
> > > These panels are used by Mediatek MT8173 Chromebooks but we can't find
> > > the
Hi Dave and Daniel,
Here goes another pull-request towards 6.8.
We are likely going to send another one in 2 weeks,
but I'd like to get this in right now so we can
get a clean drm-xe-next on top of drm-next for our
first Xe pull request.
Thanks,
Rodrigo.
drm-intel-next-2023-12-07:
- Improve
On Thu, Dec 07, 2023 at 10:23:53AM -0800, Doug Anderson wrote:
> Hi,
>
> On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
> >
> > These panels are used by Mediatek MT8173 Chromebooks but we can't find
> > the corresponding data sheets, and these panels used to work on v4.19
> > kernel without
Hi,
On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
>
> These panels are used by Mediatek MT8173 Chromebooks but we can't find
> the corresponding data sheets, and these panels used to work on v4.19
> kernel without any specified delays.
>
> Therefore, instead of having them use the default
Hi,
On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
>
> Add panels used by Mediatek MT8173 Chromebooks.
>
> Signed-off-by: Pin-yen Lin
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/panel/panel-edp.c | 39 +++
> 1 file changed, 39 insertions(+)
Reviewed-by:
Hi,
On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
>
> Add the support of powered_on_to_enable delay as the minimum time that
> needs to have passed between the panel powered on and enable may begin.
>
> This delay is seen in BOE panels as the minimum delay of T3+T4+T5+T6+T8
> in the eDP
Hi,
On Thu, Dec 7, 2023 at 12:18 AM Pin-yen Lin wrote:
>
> Move the KDC panel entry to make the list sorted by the vendor string.
>
> Signed-off-by: Pin-yen Lin
> ---
>
> (no changes since v1)
>
> drivers/gpu/drm/panel/panel-edp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
These are the patches from the from the prior series without the "fwspec
polishing":
https://lore.kernel.org/r/0-v2-36a0088ecaa7+22c6e-iommu_fwspec_...@nvidia.com
Does a few things to prepare for the next:
- Clean up the call chains around dma_configure so the iommu_ops isn't being
exposed.
This is not being used to pass ops, it is just a way to tell if an
iommu driver was probed. These days this can be detected directly via
device_iommu_mapped(). Call device_iommu_mapped() in the two places that
need to check it and remove the iommu parameter everywhere.
Reviewed-by: Jerry
A perfect driver would only call dev_iommu_priv_set() from its probe
callback. We've made it functionally correct to call it from the of_xlate
by adding a lock around that call.
lockdep assert that iommu_probe_device_lock is held to discourage misuse.
Exclude PPC kernels with CONFIG_FSL_PAMU
Nothing needs this pointer. Return a normal error code with the usual
IOMMU semantic that ENODEV means 'there is no IOMMU driver'.
Reviewed-by: Jerry Snitselaar
Reviewed-by: Lu Baolu
Acked-by: Rob Herring
Tested-by: Hector Martin
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/of_iommu.c |
Allocation of dev->iommu must be done under the
iommu_probe_device_lock. Mark this with lockdep to discourage future
mistakes.
Reviewed-by: Jerry Snitselaar
Tested-by: Hector Martin
Reviewed-by: Lu Baolu
Reviewed-by: Moritz Fischer
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/iommu.c |
Nothing needs this pointer. Return a normal error code with the usual
IOMMU semantic that ENODEV means 'there is no IOMMU driver'.
Acked-by: Rafael J. Wysocki
Reviewed-by: Jerry Snitselaar
Reviewed-by: Lu Baolu
Reviewed-by: Moritz Fischer
Tested-by: Hector Martin
Signed-off-by: Jason
Instead of returning 1 and trying to handle positive error codes just
stick to the convention of returning -ENODEV. Remove references to ops
from of_iommu_configure(), a NULL ops will already generate an error code.
There is no reason to check dev->bus, if err=0 at this point then the
called
This API was defined to formalize the access to internal iommu details on
some Tegra SOCs, but a few callers got missed. Add them.
The helper already masks by 0x so remove this code from the callers.
Suggested-by: Thierry Reding
Reviewed-by: Thierry Reding
Signed-off-by: Jason Gunthorpe
Add shared stats. Useful for seeing shared memory.
v2: take dma-buf into account as well
Signed-off-by: Alex Deucher
Cc: Rob Clark
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c | 4
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 11 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h
Show buffers as shared if they are shared via dma-buf as well
(e.g., shared with v4l or some other subsystem).
Signed-off-by: Alex Deucher
Cc: Rob Clark
---
drivers/gpu/drm/drm_file.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_file.c
We had a request to add shared buffer stats to fdinfo for amdgpu and
while implementing that, Christian mentioned that just looking at
the GEM handle count doesn't take into account buffers shared with other
subsystems like V4L or RDMA. Those subsystems don't use GEM, so it
doesn't really matter
On 07/12/2023 18:25, Rob Herring wrote:
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it was merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include
On Mon, Dec 04, 2023 at 05:05:30PM +0100, Javier Martinez Canillas wrote:
> Rob Herring writes:
>
> > On Mon, Dec 4, 2023 at 3:39 AM Javier Martinez Canillas
> > wrote:
> >> Rob Herring writes:
> >> > On Fri, Dec 1, 2023 at 4:21 AM Javier Martinez Canillas
>
> [...]
>
> >>
> >> > However,
On 12/5/23 23:15, Alexey Makhalov wrote:
> +#ifdef CONFIG_INTEL_TDX_GUEST
> +/* Export tdx hypercall and allow it only for VMware guests. */
> +void vmware_tdx_hypercall_args(struct tdx_module_args *args)
> +{
> + if (hypervisor_is_type(X86_HYPER_VMWARE))
> + __tdx_hypercall(args);
On Thu, 7 Dec 2023 at 18:37, Neil Armstrong wrote:
>
> The Qualcomm SM8650 platform comes with a DisplayPort controller
> with a different base offset than the previous SM8550 SoC,
> add support for this in the DisplayPort driver.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Dmitry Baryshkov
On 12/7/23 01:52, Aradhya Bhatia wrote:
> Hi Randy,
>
> Thanks for the patch!
>
> On 07/12/23 11:52, Randy Dunlap wrote:
>> A few of the DRM_PANEL entries have become out of alphabetical order,
>> so move them around a bit to restore alpha order.
>>
>> Signed-off-by: Randy Dunlap
>> Cc: Neil
On 07.12.23 15:16, Dario Binacchi wrote:
> The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
> platforms (i. e. not exynos).
This also affects i.MX8MM, so better just mention i.MX in general in the
commit message.
>
> Co-developed-by: Michael Trimarchi
> Signed-off-by:
On Thu, Dec 7, 2023 at 10:12 AM Arunpravin Paneer Selvam
wrote:
>
> Add clear page support in vram memory region.
>
> Signed-off-by: Arunpravin Paneer Selvam
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 13 +++--
> .../gpu/drm/amd/amdgpu/amdgpu_res_cursor.h| 25 ++
>
On 07.12.23 17:10, Dario Binacchi wrote:
> It was useless to check again the "ret" variable if the function
> register_host() was not called.
>
> Signed-off-by: Dario Binacchi
Reviewed-by: Frieder Schrempf
> ---
>
> drivers/gpu/drm/bridge/samsung-dsim.c | 8
> 1 file changed, 4
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