https://bugzilla.kernel.org/show_bug.cgi?id=216625
--- Comment #3 from Pierre Ossman (pierre-bugzi...@ossman.eu) ---
This is wrong, I checked the wrong lines in dnf's history:
> Last working system:
>
> kernel-5.13.8-100.fc33.x86_64
The last working kernel is actually
https://bugzilla.kernel.org/show_bug.cgi?id=216625
--- Comment #2 from Pierre Ossman (pierre-bugzi...@ossman.eu) ---
A bisect will be difficult, given that I can't reproduce it. :/
Any clues from the dmesg that could tell how to provoke it? Or some settings
that could provide more information?
Hi Allen,
On Tue, Oct 25, 2022 at 12:37 AM Rob Herring wrote:
>
> On Wed, Oct 19, 2022 at 05:32:13PM +0800, allen wrote:
> > From: allen chen
> >
> > Add properties to restrict dp output data-lanes and clock.
> >
> > Signed-off-by: Pin-Yen Lin
> > Signed-off-by: Allen Chen
> > ---
> >
From: Bjorn Andersson
The SA8295P ADP has, among other interfaces, six MiniDP connectors which
are connected to MDSS0 DP2 and DP3, and MDSS1 DP0 through DP3.
Enable Display Clock controllers, MDSS instanced, MDPs, DP controllers,
DP PHYs and link them all together.
Signed-off-by: Bjorn
From: Bjorn Andersson
The DisplayPort controller's hot-plug mechanism is based on pinmuxing a
physical signal on a GPIO pin into the controller. This is not always
possible, either because there aren't dedicated GPIOs available or
because the hot-plug signal is a virtual notification, in cases
From: Bjorn Andersson
The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
and link it together with the backlight control.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch on list
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts |
From: Bjorn Andersson
Add compatibles for the DisplayPort and Embedded DisplayPort blocks in
Qualcomm SDM845 and SC8280XP platforms.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
Acked-by: Krzysztof Kozlowski
---
Changes since v2:
- None
From: Bjorn Andersson
Most instances where HPD interrupts are masked and unmasked are guareded
by the presence of an EDP panel being connected, but not all. Extend
this to cover the last few places, as HPD interrupt handling is not used
for the EDP case.
Signed-off-by: Bjorn Andersson
From: Bjorn Andersson
The DisplayPort controller's internal HPD interrupt handling is used for
cases where the HPD signal is connected to a GPIO which is pinmuxed into
the DisplayPort controller.
Most of the logic for enabling and disabling the HPD-related interrupts
is conditioned on the
From: Bjorn Andersson
The Qualcomm SC8280XP platform contains DPU version 8.0.0, has 9
interfaces, 2 DSI controllers and 4 DisplayPort controllers. Extend the
necessary definitions and describe the DPU in the SC8280XP.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Change
From: Bjorn Andersson
Define the display clock controllers, the MDSS instances, the DP phys
and connect these together.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch on list
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 838
From: Bjorn Andersson
The Qualcomm SDM845 platform has a single DisplayPort controller, with
the same design as SC7180, so add support for this by reusing the SC7180
definition.
Signed-off-by: Bjorn Andersson
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Bjorn Andersson
---
Changes since v2:
From: Bjorn Andersson
The SC8280XP platform has four DisplayPort controllers, per MDSS
instance, all with widebus support.
The first two are defined to be DisplayPort only, while the latter pair
(of each instance) can be either DisplayPort or Embedded DisplayPort.
The two sets are tied to the
This introduces support for the SC8280XP platform in the MDSS, DPU and
DP driver. It reworks the HDP handling in the DP driver to support
external HPD sources - such as the dp-connector, or USB Type-C altmode.
It then introduces the display clock controllers, mdss, dpu and
displayport controllers
From: Bjorn Andersson
In the SC8280XP platform there are two identical MDSS instances, each
with the same set of DisplayPort instances, at different addresses.
By not relying on the index to define the instance id it's possible to
describe them both in the same table and hence have a single
From: Bjorn Andersson
Add binding for the display subsystem and display processing unit in the
Qualcomm SC8280XP platform.
Signed-off-by: Bjorn Andersson
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- Cleaned up description and interconnect definitions
- Added opp-table
From: Zack Rusin
Cursor snooping depended on implicit size and format which made debugging
quite difficult. Make the code easier to following by making everything
explicit and instead of using magic numbers predefine all the
parameters the code depends on.
Also fixes incorrectly computed
From: Zack Rusin
Invalid userspace dma surface copies could potentially overflow
the memcpy from the surface to the snooped image leading to crashes.
To fix it the dimensions of the copybox have to be validated
against the expected size of the snooped cursor.
Signed-off-by: Zack Rusin
Fixes:
"Vlastimil Babka (SUSE)" writes:
> On 9/28/22 14:01, Alistair Popple wrote:
>> This series aims to fix a number of page reference counting issues in
>> drivers dealing with device private ZONE_DEVICE pages. These result in
>> use-after-free type bugs, either from accessing a struct page which
./drivers/gpu/drm/amd/amdkfd/kfd_migrate.c:985:58-62: ERROR: p is NULL but
dereferenced.
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2549
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
change in v2:
According to Felix's suggestion, move the pr_debug up before the
On 10/24/2022 15:26, Daniele Ceraolo Spurio wrote:
From: Aravind Iddamsetty
With MTL standalone media architecture the wopcm layout has changed,
with separate partitioning in WOPCM for the root GT GuC and the media
GT GuC. The size of WOPCM is 4MB with the lower 2MB reserved for the
media GT
On 9/24/2022 9:11 AM, Jacek Lawrynowicz wrote:
VPU Memory Management Unit is based on ARM MMU-600.
It allows to create multiple virtual address spaces for the device and
"It allows the creation of"?
map noncontinuous host memory (there is no dedicated memory on the VPU).
Address space is
On Wed, Oct 26, 2022 at 01:27:25AM +0200, Hans de Goede wrote:
> this code should actually set the ACPI_VIDEO_BACKLIGHT flag:
> drivers/acpi/scan.c:
>
> static acpi_status
> acpi_backlight_cap_match(acpi_handle handle, u32 level, void *context,
> void **return_value)
>
Hi,
On 10/25/22 22:40, Matthew Garrett wrote:
> On Tue, Oct 25, 2022 at 10:25:33PM +0200, Hans de Goede wrote:
>
>> Having the native driver come and then go and be replaced
>> with the vendor driver would also be quite inconvenient
>> for these planned changes.
>
> I understand that it would
On Tue, Oct 25, 2022 at 03:38:44PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> Vaibhav converted several AGP drivers from legacy PCI power management to
> generic power management [1]. This series converts the rest of them.
>
> v1 posted at [2].
>
> Changes from v1 to v2:
> -
On Wed, Oct 26, 2022 at 08:17:47AM +1000, Dave Airlie wrote:
> On Wed, 26 Oct 2022 at 06:39, Bjorn Helgaas wrote:
> >
> > From: Bjorn Helgaas
> >
> > Vaibhav converted several AGP drivers from legacy PCI power management to
> > generic power management [1]. This series converts the rest of
On Wed, 26 Oct 2022 at 06:39, Bjorn Helgaas wrote:
>
> From: Bjorn Helgaas
>
> Vaibhav converted several AGP drivers from legacy PCI power management to
> generic power management [1]. This series converts the rest of them.
Do you want to merge through the PCI tree?
Acked-by: Dave Airlie
Hi Doug
On 10/24/2022 1:28 PM, Doug Anderson wrote:
Hi,
On Fri, Oct 21, 2022 at 2:18 PM Abhinav Kumar wrote:
Hi Doug
On 10/21/2022 1:07 PM, Douglas Anderson wrote:
If we fail to get a valid panel ID in drm_edid_get_panel_id() we'd
like to see the EDID that was read so we have a chance of
On Tue, Oct 25, 2022 at 10:25:33PM +0200, Hans de Goede wrote:
> Having the native driver come and then go and be replaced
> with the vendor driver would also be quite inconvenient
> for these planned changes.
I understand that it would be inconvenient, but you've broken existing
working
From: Bjorn Helgaas
Convert agpgart-ati from legacy PCI power management to the generic power
management framework.
Previously agpgart-ati used legacy PCI power management, and
agp_ati_suspend() and agp_ati_resume() were responsible for both
device-specific things and generic PCI things like
From: Bjorn Helgaas
As of 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old
ones"), SIMPLE_DEV_PM_OPS() is deprecated in favor of
DEFINE_SIMPLE_DEV_PM_OPS(), which has the advantage that the PM callbacks
don't need to be wrapped with #ifdef CONFIG_PM or tagged with
__maybe_unused.
From: Bjorn Helgaas
As of 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old
ones"), SIMPLE_DEV_PM_OPS() is deprecated in favor of
DEFINE_SIMPLE_DEV_PM_OPS(), which has the advantage that the PM callbacks
don't need to be wrapped with #ifdef CONFIG_PM or tagged with
__maybe_unused.
From: Bjorn Helgaas
Convert agpgart-intel from legacy PCI power management to the generic power
management framework.
Previously agpgart-intel used legacy PCI power management, and
agp_intel_resume() was responsible for both device-specific things and
generic PCI things like saving and
From: Bjorn Helgaas
Vaibhav converted several AGP drivers from legacy PCI power management to
generic power management [1]. This series converts the rest of them.
v1 posted at [2].
Changes from v1 to v2:
- Convert from SIMPLE_DEV_PM_OPS() (which is deprecated) to
From: Bjorn Helgaas
As of 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old
ones"), SIMPLE_DEV_PM_OPS() is deprecated in favor of
DEFINE_SIMPLE_DEV_PM_OPS(), which has the advantage that the PM callbacks
don't need to be wrapped with #ifdef CONFIG_PM or tagged with
__maybe_unused.
From: Bjorn Helgaas
Convert agpgart-nvidia from legacy PCI power management to the generic
power management framework.
Previously agpgart-nvidia used legacy PCI power management, and
agp_nvidia_suspend() and agp_nvidia_resume() were responsible for both
device-specific things and generic PCI
From: Bjorn Helgaas
Convert agpgart-amdk7 from legacy PCI power management to the generic power
management framework.
Previously agpgart-amdk7 used legacy PCI power management, and
agp_amdk7_suspend() and agp_amdk7_resume() were responsible for both
device-specific things and generic PCI things
From: Bjorn Helgaas
Convert agpgart-efficeon from legacy PCI power management to the generic
power management framework.
Previously agpgart-efficeon used legacy PCI power management, which means
agp_efficeon_suspend() and agp_efficeon_resume() were responsible for both
device-specific things
Hi (again),
On 10/25/22 22:25, Hans de Goede wrote:
> Hi Matthew,
>
> On 10/25/22 21:32, Matthew Garrett wrote:
>> On Tue, Oct 25, 2022 at 08:50:54PM +0200, Hans de Goede wrote:
>>
>>> That is a valid point, but keep in mind that this is only used on ACPI
>>> platforms and then only on devices
On 10/25/2022 15:25, Hans de Goede wrote:
Hi Matthew,
On 10/25/22 21:32, Matthew Garrett wrote:
On Tue, Oct 25, 2022 at 08:50:54PM +0200, Hans de Goede wrote:
That is a valid point, but keep in mind that this is only used on ACPI
platforms and then only on devices with a builtin LCD panel
Hi Matthew,
On 10/25/22 21:32, Matthew Garrett wrote:
> On Tue, Oct 25, 2022 at 08:50:54PM +0200, Hans de Goede wrote:
>
>> That is a valid point, but keep in mind that this is only used on ACPI
>> platforms and then only on devices with a builtin LCD panel and then
>> only by GPU drivers which
The function a6xx_create_address_space() is mostly a copy of
adreno_iommu_create_address_space() with added quirk setting. Rework
these two functions to be a thin wrappers around a common helper.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/adreno/a3xx_gpu.c | 2 +-
After the msm_iommu instance is created, the IOMMU domain is completely
handled inside the msm_iommu code. Move the iommu_domain_alloc() call
into the msm_iommu_new() to simplify callers code.
Reported-by: kernel test robot
Signed-off-by: Dmitry Baryshkov
---
Simplify the MSM IOMMU code a bit. This moves iommu_domain_alloc() and
iommu_set_pgtable_quirks() calls to msm_iommu_new() to get rid of the
disbalance, when the iommu domain is allocated by the caller of
msm_iommu_new() and then it is freed by the msm_iommu code itself.
Changes since v2:
-
From: Nathan Chancellor
When booting with CONFIG_CFI_CLANG, there are numerous violations when
accessing the files under
/sys/devices/pci:00/:00:02.0/drm/card0/gt/gt0:
$ cd /sys/devices/pci:00/:00:02.0/drm/card0/gt/gt0
$ grep . *
id:0
punit_req_freq_mhz:350
Am 2022-10-25 um 05:12 schrieb Paulo Miguel Almeida:
kfd_pm4_headers_diq.h header is a leftover from the old H/W debugger
module support added on commit . That implementation
was removed after a while and the last file that included that header
was removed on commit <5bdd3eb253544b1>.
This
Am 2022-10-25 um 02:09 schrieb Yang Li:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_migrate.c:331
svm_migrate_copy_to_vram() warn: inconsistent indenting
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2537
Reported-by: Abaci Robot
Signed-off-by: Yang Li
This patch doesn't apply to our
Am 2022-10-25 um 03:28 schrieb Yang Li:
./drivers/gpu/drm/amd/amdkfd/kfd_migrate.c:985:58-62: ERROR: p is NULL but
dereferenced.
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2549
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 3 ++-
On Tue, Oct 25, 2022 at 08:50:54PM +0200, Hans de Goede wrote:
> That is a valid point, but keep in mind that this is only used on ACPI
> platforms and then only on devices with a builtin LCD panel and then
> only by GPU drivers which actually call acpi_video_get_backlight_type(),
> so e.g. not
Add a kconfig CONFIG_VFIO_CONTAINER that controls compiling the container
code. If 'n' then only iommufd will provide the container service. All the
support for vfio iommu drivers, including type1, will not be built.
This allows a compilation check that no inappropriate dependencies between
the
This creates the iommufd_device for the physical VFIO drivers. These are
all the drivers that are calling vfio_register_group_dev() and expect the
type1 code to setup a real iommu_domain against their parent struct
device.
The design gives the driver a choice in how it gets connected to iommufd
Hi,
On 10/24/22 22:30, Matthew Garrett wrote:
> On Tue, Sep 27, 2022 at 01:04:52PM +0200, Hans de Goede wrote:
>
>> So to fix this we need to make acpi_video_get_backlight_type()
>> return native on the Acer Chromebook Spin 713.
>
> Isn't the issue broader than that? Unless the platform is
This makes VFIO_GROUP_SET_CONTAINER accept both a vfio container FD and an
iommufd.
In iommufd mode an IOAS will exist after the SET_CONTAINER, but it will
not be attached to any groups.
>From a VFIO perspective this means that the VFIO_GROUP_GET_STATUS and
VFIO_GROUP_FLAGS_VIABLE works subtly
Emulated VFIO devices are calling vfio_register_emulated_iommu_dev() and
consist of all the mdev drivers.
Like the physical drivers, support for iommufd is provided by the driver
supplying the correct correct standard ops. Provide ops from the core that
duplicate what
If the VFIO container is compiled out, give a kconfig option for iommufd
to provide the miscdev node with the same name and permissions as vfio
uses.
The compatibility node supports the same ioctls as VFIO and automatically
enables the VFIO compatible pinned page accounting mode.
Signed-off-by:
This error unwind is getting complicated. Move all the code into two
pair'd function. The functions should be called when the open_count == 1
after incrementing/before decrementing.
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/vfio_main.c | 95 ++--
1 file
The only thing this function does is assert the group has an assigned
container and incrs refcounts.
The overall model we have is that once a conatiner_users refcount is
incremented it cannot be de-assigned from the group -
vfio_group_ioctl_unset_container() will fail and the group FD cannot be
iommufd doesn't establish the iommu_domains until after the device FD is
opened, even if the container has been set. This design is part of moving
away from the group centric iommu APIs.
This is fine, except that the normal sequence of establishing the kvm
wbindv won't work:
group =
This series provides an alternative container layer for VFIO implemented
using iommufd. This is optional, if CONFIG_IOMMUFD is not set then it will
not be compiled in.
At this point iommufd can be injected by passing in a iommfd FD to
VFIO_GROUP_SET_CONTAINER which will use the VFIO compat layer
These functions don't really assign anything anymore, they just increment
some refcounts and do a sanity check. Call them
vfio_group_[un]use_container()
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/container.c | 14 ++
drivers/vfio/vfio.h | 4 ++--
drivers/vfio/vfio_main.c
This legacy module knob has become uAPI, when set on the vfio_iommu_type1
it disables some security protections in the iommu drivers. Move the
storage for this knob to vfio_main.c so that iommufd can access it too.
Signed-off-by: Jason Gunthorpe
---
drivers/vfio/vfio.h | 2 ++
Looking...
Regards,
Luben
On 2022-10-25 09:35, Alex Deucher wrote:
> + Luben
>
> On Tue, Oct 25, 2022 at 2:55 AM brolerliew wrote:
>>
>> When entity move from one rq to another, current_entity will be set to NULL
>> if it is the moving entity. This make entities close to rq head got
>>
On Tue, 25 Oct 2022 at 16:51, Somalapuram Amaranath
wrote:
>
> Change ttm_resource structure from num_pages to size_t size in bytes.
> v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
> v1 -> v2: change bo->resource->size to bo->base.size at some places
> v1 -> v2: remove the local
Am 25.10.22 um 17:50 schrieb Somalapuram Amaranath:
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2:
https://bugzilla.kernel.org/show_bug.cgi?id=216625
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC|
On Sat, Oct 22, 2022 at 7:06 PM Chris Healy wrote:
>
> I can't speak to why you are experiencing issues when using the GPU,
> but in the examples you gave, the example that is working is using a
> SW based GL implementation instead of the real GPU. This can be
> determined by looking at the
Am 25.10.22 um 15:59 schrieb Michał Winiarski:
On Tue, Oct 11, 2022 at 01:55:01PM +0200, Christian König wrote:
Am 11.10.22 um 13:39 schrieb Simon Ser:
On Tuesday, October 11th, 2022 at 13:04, Christian König
wrote:
--- a/include/drm/drm_file.h
+++ b/include/drm/drm_file.h
@@ -54,7 +54,6
https://bugzilla.kernel.org/show_bug.cgi?id=216625
Pierre Ossman (pierre-bugzi...@ossman.eu) changed:
What|Removed |Added
Tree|Mainline|Fedora
--
https://bugzilla.kernel.org/show_bug.cgi?id=216625
Bug ID: 216625
Summary: [regression] GPU lockup on Radeon R7 Kaveri
Product: Drivers
Version: 2.5
Kernel Version: 5.19.16-100.fc35.x86_64
Hardware: All
OS: Linux
Change ttm_resource structure from num_pages to size_t size in bytes.
v1 -> v2: change PFN_UP(dst_mem->size) to ttm->num_pages
v1 -> v2: change bo->resource->size to bo->base.size at some places
v1 -> v2: remove the local variable
v1 -> v2: cleanup cmp_size_smaller_first()
Signed-off-by:
change-id: 20221025-ts050-timings-2fb4b034a268
Best regards,
--
Neil Armstrong
The Google Pixel C has a JDI LPM102A188A display panel. Add a
DT node for it. Tested on Pixel C.
Signed-off-by: Diogo Ivo
---
Changes in v2:
- renamed backlight node to a generic name
- removed underscores
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 70 +++
1 file
The JDI LPM102A188A is a 2560x1800 IPS panel found in the Google Pixel C.
This driver is based on the downstream GPLv2 driver released by Google
written by Sean Paul [1], which was then adapted to the newer kernel APIs.
[1]:
In cases where the DSI module is left on by the bootloader
some panels may fail to initialize if the enable register is not cleared
before the panel's initialization sequence is sent, so clear it if that
is the case.
Signed-off-by: Diogo Ivo
---
Changes in v2:
- detect if the DSI module is on
The LPM102A188A is a 10.2" 2560x1800 IPS panel found in
the Google Pixel C.
Signed-off-by: Diogo Ivo
---
Changes in v2:
- removed the touch screen property
.../display/panel/jdi,lpm102a188a.yaml| 94 +++
1 file changed, 94 insertions(+)
create mode 100644
Hello,
These patches add support for the JDI LPM102A188A display panel,
found in the Google Pixel C.
Patch 1 adds the DT bindings for the panel.
Patch 2 adds a register clear to the Tegra DSI driver, needed for the
panel initialization commands to be properly sent.
Patch 3 adds the panel
On Mon, 24 Oct 2022 15:54:53 -0700, Vinay Belgaumkar wrote:
>
> GuC will set the min/max frequencies to theoretical max on
> ATS-M. This will break kernel ABI, so limit min/max frequency
> to RP0(platform max) instead.
>
> Also modify the SLPC selftest to update the min frequency
> when we have a
Hi all,
On Tue, 25 Oct 2022 at 08:32, Daniel Vetter wrote:
> On Fri, 9 Sept 2022 at 19:18, Daniel Stone wrote:
> > But equally - and sorry for not jumping on the IRC (?) discussion as I was
> > in the middle of other stuff when it came up - I'm don't think this is the
> > right plan.
> >
> >
On Tue, Oct 25, 2022 at 10:34 AM Jason Gunthorpe wrote:
>
> On Tue, Oct 25, 2022 at 10:21:34AM -0400, Alex Deucher wrote:
>
> > E.g., the kfd node provides platform level compute
> > topology information; e.g., the NUMA details for connected GPUs and
> > CPUs, non-GPU compute node information,
On Tue, Oct 25, 2022 at 10:21:34AM -0400, Alex Deucher wrote:
> E.g., the kfd node provides platform level compute
> topology information; e.g., the NUMA details for connected GPUs and
> CPUs, non-GPU compute node information, cache level topologies, etc.
See, this is exactly what I'm talking
@Daniel Vetter
, @Dave Airlie
Any objections taking this through the AMD tree or would you rather it
landed via drm-misc?
Thanks,
Alex
On Tue, Oct 25, 2022 at 10:21 AM Harry Wentland wrote:
>
> Series is
>
> Reviewed-by: Harry Wentland
>
> Harry
>
> On 2022-10-24 15:22, Hamza Mahfooz wrote:
On Tue, Oct 25, 2022 at 7:15 AM Jason Gunthorpe wrote:
>
> On Tue, Oct 25, 2022 at 12:27:11PM +1000, Dave Airlie wrote:
>
> > The userspace for those is normally bespoke like ROCm, which uses
> > amdkfd, and amdkfd doesn't operate like most device files from what I
> > know, so I'm not sure we'd
Series is
Reviewed-by: Harry Wentland
Harry
On 2022-10-24 15:22, Hamza Mahfooz wrote:
> This reverts commit 55eea8ef98641f6e1e1c202bd3a49a57c1dd4059.
>
> This quirk is now handled in the DRM core, so we can drop all of
> the internal code that was added to handle it.
>
> Signed-off-by: Hamza
On 10/25/2022 5:42 AM, Jacek Lawrynowicz wrote:
Hi, thanks for detailed review. My responses inline.
On 10/25/2022 1:00 AM, Jeffrey Hugo wrote:
On 9/24/2022 9:11 AM, Jacek Lawrynowicz wrote:
VPU stands for Versatile Processing Unit and it's a CPU-integrated
inference accelerator for Computer
On Tue, Oct 11, 2022 at 01:55:01PM +0200, Christian König wrote:
> Am 11.10.22 um 13:39 schrieb Simon Ser:
> > On Tuesday, October 11th, 2022 at 13:04, Christian König
> > wrote:
> >
> > > --- a/include/drm/drm_file.h
> > > +++ b/include/drm/drm_file.h
> > > @@ -54,7 +54,6 @@ struct file;
> > >
On 9/11/2022 3:14 PM, Michał Winiarski wrote:
IDR is deprecated, and since XArray manages its own state with internal
locking, it simplifies the locking on DRM side.
Additionally, don't use the IRQ-safe variant, since operating on drm
minor is not done in IRQ context.
Signed-off-by: Michał
On Wed 2022-10-19 17:01:46, John Ogness wrote:
> Since the console_lock is not being used for anything other than
> safe console list traversal, use srcu console list iteration instead.
>
> Signed-off-by: John Ogness
Reviewed-by: Petr Mladek
> ---
> drivers/video/fbdev/xen-fbfront.c | 8
+ Luben
On Tue, Oct 25, 2022 at 2:55 AM brolerliew wrote:
>
> When entity move from one rq to another, current_entity will be set to NULL
> if it is the moving entity. This make entities close to rq head got
> selected more frequently, especially when doing load balance between
> multiple
On Mon, Oct 24, 2022 at 08:43:58PM +0300, Oded Gabbay wrote:
> On Mon, Oct 24, 2022 at 6:21 PM Jeffrey Hugo wrote:
> >
> > On 10/22/2022 3:46 PM, Oded Gabbay wrote:
> > > The accelerator devices are exposed to user-space using a dedicated
> > > major. In addition, they are represented in /dev
On 10/25/22 14:55, Jason A. Donenfeld wrote:
On Mon, Oct 24, 2022 at 8:29 PM Helge Deller wrote:
On 10/24/22 18:29, Jason A. Donenfeld wrote:
With char becoming unsigned by default, and with `char` alone being
ambiguous and based on architecture, signed chars need to be marked
explicitly as
On Mon, Oct 24, 2022 at 8:29 PM Helge Deller wrote:
>
> On 10/24/22 18:29, Jason A. Donenfeld wrote:
> > With char becoming unsigned by default, and with `char` alone being
> > ambiguous and based on architecture, signed chars need to be marked
> > explicitly as such. This fixes warnings like:
>
Hi
Am 24.09.22 um 17:11 schrieb Jacek Lawrynowicz:
Adds four types of GEM-based BOs for the VPU:
- shmem
- userptr
- internal
- prime
All types are implemented as struct ivpu_bo, based on
struct drm_gem_object. VPU address is allocated when buffer is created
except for imported
Hi,
please find some review comments below.
Am 24.09.22 um 17:11 schrieb Jacek Lawrynowicz:
VPU stands for Versatile Processing Unit and it's a CPU-integrated
inference accelerator for Computer Vision and Deep Learning
applications.
The VPU device consist of following componensts:
-
tree: git://people.freedesktop.org/~airlied/linux.git 01.01-gsp-rm
head: 6be95d5e52818808565790c5ee3fd5569263bd36
commit: 2428d9aef24a6a497b8740afadbb028c17b5e697 [173/180]
drm/nouveau/gsp/tu102-: add support for booting GSP-RM
config: microblaze-randconfig-r001-20221023 (attached as .config)
Hi Niranjana,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-tip/drm-tip]
url:
https://github.com/intel-lab-lkp/linux/commits/Niranjana-Vishwanathapura/drm-i915-vm_bind-Add-VM_BIND-functionality/20221025-150246
base: git://anongit.freedesktop.org/drm/drm
Hi
Am 25.10.22 um 13:42 schrieb Jacek Lawrynowicz:
Hi, thanks for detailed review. My responses inline.
On 10/25/2022 1:00 AM, Jeffrey Hugo wrote:
On 9/24/2022 9:11 AM, Jacek Lawrynowicz wrote:
VPU stands for Versatile Processing Unit and it's a CPU-integrated
inference accelerator for
On 10/25/22 14:41, Dan Carpenter wrote:
> Hello Dmitry Osipenko,
>
> The patch 809d9c72c2f8: "dma-buf: Move dma_buf_attach() to dynamic
> locking specification" from Oct 17, 2022, leads to the following
> Smatch static checker warning:
>
> drivers/dma-buf/dma-buf.c:957
Hello Pin-yen Lin,
The patch 1051d302: "drm/bridge: it6505: Adapt runtime power
management framework" from Oct 4, 2022, leads to the following Smatch
static checker warning:
drivers/gpu/drm/bridge/ite-it6505.c:2712 it6505_extcon_work()
warn: pm_runtime_get_sync() also returns
Hi, thanks for detailed review. My responses inline.
On 10/25/2022 1:00 AM, Jeffrey Hugo wrote:
> On 9/24/2022 9:11 AM, Jacek Lawrynowicz wrote:
>> VPU stands for Versatile Processing Unit and it's a CPU-integrated
>> inference accelerator for Computer Vision and Deep Learning
>> applications.
>>
Hello Dmitry Osipenko,
The patch 809d9c72c2f8: "dma-buf: Move dma_buf_attach() to dynamic
locking specification" from Oct 17, 2022, leads to the following
Smatch static checker warning:
drivers/dma-buf/dma-buf.c:957 dma_buf_dynamic_attach()
error: double unlocked 'dmabuf->resv'
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