On 03-08-2023 14:19, Tvrtko Ursulin wrote:
>
> On 03/08/2023 06:15, Iddamsetty, Aravind wrote:
>> On 27-07-2023 15:43, Tvrtko Ursulin wrote:
>>> From: Tvrtko Ursulin
>>>
>>> Use the newly added drm_print_memory_stats helper to show memory
>>> utilisation of our objects in drm/driver specific
The NULL initialization of the pointers assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointers will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/drm_agpsupport.c | 2 +-
The NULL initialization of the pointer assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointer will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/virtio/virtgpu_submit.c | 2 +-
1 file changed, 1
The NULL initialization of the pointers assigned by
kunit_kzalloc() first is not necessary, because if kunit_kzalloc()
failed, the pointers will be assigned NULL, otherwise it works
as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
.../gpu/drm/tests/drm_format_helper_test.c| 28
The NULL initialization of the pointers assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointers will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
The NULL initialization of the pointers assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointers will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/radeon/radeon_agp.c | 2 +-
The NULL initialization of the pointers assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointers will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/amd/display/dc/bios/bios_parser.c | 4 ++--
The NULL initialization of the pointers assigned by kzalloc() first is
not necessary, because if the kzalloc() failed, the pointers will be
assigned NULL, otherwise it works as usual. so remove it.
Signed-off-by: Ruan Jinjie
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 4 ++--
1 file
The NULL initialization of the pointers assigned by kzalloc() or
kunit_kzalloc() first is not necessary, because if the kzalloc() or
kunit_kzalloc() failed, the pointers will be assigned NULL, otherwise
it works as usual. so remove it.
Ruan Jinjie (7):
drm/amdkfd: Remove unnecessary NULL values
Commit 776dc3840367 ("drm/tegra: Move subdevice infrastructure to host1x")
removed the implementation but not the declaration.
Signed-off-by: Yue Haibing
---
drivers/gpu/drm/tegra/drm.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/tegra/drm.h
On 8/8/2023 2:52 AM, Stanislaw Gruszka wrote:
On Thu, Aug 03, 2023 at 10:37:37AM +0200, Stanislaw Gruszka wrote:
Seems like we might want to decide this now, because if we define a iVPU
specific ioctl as proposed here, but then switch to an Accel-wide mechanism
later, iVPU is going to be stuck
Hi all,
Today's linux-next merge of the fbdev tree got a conflict in:
drivers/video/fbdev/Kconfig
between commit:
8c47895b70a2 ("fbdev/mx3fb: Use fbdev I/O helpers")
from the drm-misc tree and commit:
87ac8777d424 ("fbdev: mx3fb: Remove the driver")
from the fbdev tree.
I fixed it up
These functions don't use kernel-doc notation for comments so
don't begin each comment block with the "/**" kernel-doc marker.
This prevents a bunch of kernel-doc warnings:
dmub_replay.c:37: warning: This comment starts with '/**', but isn't a
kernel-doc comment. Refer
On 8/7/2023 6:07 PM, Dmitry Baryshkov wrote:
On 8 August 2023 00:41:07 GMT+03:00, Jessica Zhang
wrote:
On 8/4/2023 6:27 AM, Dmitry Baryshkov wrote:
On Fri, 28 Jul 2023 at 20:03, Jessica Zhang wrote:
Document and add support for solid_fill property to drm_plane. In
addition, add
From: Sui Jingfeng
s/chekcing/checking
While at it, convert the comments to the conventional multi-line style,
and rewrap to fill 78 columns.
Fixes: deb2d2ecd43d ("PCI/GPU: implement VGA arbitration on Linux")
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 8 +---
1 file changed,
From: Sui Jingfeng
Per Documentation/process/license-rules.rst, the SPDX MIT identifier is
equivalent to including the entire MIT license text from
LICENSES/preferred/MIT.
Replace the MIT license text with the equivalent SPDX identifier.
Signed-off-by: Sui Jingfeng
Reviewed-by: Andi Shyti
From: Sui Jingfeng
This patch replaces the leading space with a tab and removes the double
blank line and fix various typos, no functional change.
Reviewed-by: Andi Shyti
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 90 --
From: Sui Jingfeng
In the vga_arbiter_notify_clients() function, the value of the 'new_state'
variable will be 'false' on systems that have more than one VGA device.
The value will be 'true' if there is only one VGA device or no VGA device
at all. Hence, its value is not relevant to the
From: Sui Jingfeng
Fixes: deb2d2ecd43d ("PCI/GPU: implement VGA arbitration on Linux")
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/vgaarb.c b/drivers/pci/vgaarb.c
index a6b8c0def35d..d80d92e8012b 100644
From: Sui Jingfeng
1) s/intereted/interested
2) s/hotplugable/hot-pluggable
While at it, convert the comments to the conventional multi-line style,
and rewrap to fill 78 columns.
Fixes: deb2d2ecd43d ("PCI/GPU: implement VGA arbitration on Linux")
Signed-off-by: Sui Jingfeng
---
From: Sui Jingfeng
Fixes: 934f992c763a ("drm/i915: Recognise non-VGA display devices")
Signed-off-by: Sui Jingfeng
---
drivers/pci/vgaarb.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/pci/vgaarb.c b/drivers/pci/vgaarb.c
index
From: Sui Jingfeng
The vga_update_device_decodes() function is not performance-critical.
So drop the inline. This patch also makes the parameter consistent with
the argument, using the 'unsigned int' type instead of the 'signed' type
to store the decode.
Change the second argument of the
From: Sui Jingfeng
vgaarb only cares about PCI(e) VGA devices (pdev->class == 0x0300XX)
Currently, hence we only need to add VGA devices has its class code equals
to 0x0300 to the arbiter. To keep align with the previous behavior. we
ignore the programming interface byte (the least significant 8
From: Sui Jingfeng
Because there is no good way to get the mask member used to searching for
devices that conform to a specific PCI class code, an application needs to
process all PCI display devices can achieve its goal as follows:
pdev = NULL;
do {
pdev =
From: Sui Jingfeng
The io_state variable in the vga_arb_write() function is declared with
unsigned int type, while the vga_str_to_iostate() function takes 'int *'
type. To keep them consistent, this patch replaceis the third argument of
vga_str_to_iostate() function with 'unsigned int *' type.
From: Sui Jingfeng
v1:
* Various improve.
v2:
* More fixes, optimizations and improvements.
Sui Jingfeng (11):
PCI/VGA: Use unsigned type for the io_state variable
PCI: Add the pci_get_class_masked() helper
PCI/VGA: Deal with VGA class devices
PCI/VGA: Drop the inline in
We calculate the amount of time the GPU spends on a job with ktime samples,
and then add it to the cumulative total for the open DRM file, which is
what will be eventually exposed through the 'fdinfo' DRM file descriptor.
Signed-off-by: Adrián Larumbe
---
For drm_show_memory_stats to produce a more accurate report, provide a new
Panfrost DRM object callback that decides whether an object is resident in
memory or eligible for purging.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 8 ++--
This patch series adds basic fdinfo support to the Panfrost DRM driver.
It will display a series of key:value pairs under /proc/pid/fdinfo/fd
for render processes that open the Panfrost DRM file.
The pairs contain basic drm gpu engine and memory region information that
can either be cat by a
DP PHY re-initialization done using dp_ctrl_reinitialize_mainlink() will
cause PLL unlocked initially and then PLL gets locked at the end of
initialization. PLL_UNLOCKED interrupt will fire during this time if the
interrupt mask is enabled.
However currently DP driver link training implementation
Hi Daniel,
On 2023-08-03 9:03 a.m., Daniel Vetter wrote:
On Thu, 27 Jul 2023 at 22:13, Zhanjun Dong wrote:
This attempts to avoid circular locking dependency between flush delayed work
and intel_gt_reset.
Switched from cancel_delayed_work_sync to cancel_delayed_work, the non-sync
version
Hi Andi,
On 2023-08-03 8:36 a.m., Andi Shyti wrote:
Hi Zhanjun,
On Thu, Jul 27, 2023 at 01:13:23PM -0700, Zhanjun Dong wrote:
This attempts to avoid circular locking dependency between flush delayed work
and intel_gt_reset.
Switched from cancel_delayed_work_sync to cancel_delayed_work, the
Some GPUs - particularly A7xx ones - are really really stubborn and
sometimes take a longer-than-expected time to finish unhalting GBIF.
Note that this is not caused by the request a few lines above.
Poll for the unhalt ack to make sure we're not trying to write bits to
an essentially dead GPU
A7xx GMUs can be slow as molasses at times.
Increase the timeout to 1 second to match the vendor driver.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 2 +-
1 file changed, 1
A740 builds upon the A730 IP, shuffling some values and registers
around. More differences will appear when things like BCL are
implemented.
adreno_is_a740_family is added in preparation for more A7xx GPUs,
the logic checks will be valid resulting in smaller diffs.
Tested-by: Neil Armstrong #
Add support for Adreno 730, also known as GEN7_0_x, found on SM8450.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 126 -
Provide the necessary alternations to mostly support state dumping on
A7xx. Newer GPUs will probably require more changes here. Crashdumper
and debugbus remain untested.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
The QMP mailbox expects to be notified of the ACD (Adaptive Clock
Distribution) state. Get a handle to the mailbox at probe time and
poke it at GMU resume.
Since we don't fully support ACD yet, hardcode the message to "val: 0"
(state = disabled).
Tested-by: Neil Armstrong # on SM8550-QRD
A7xx GPUs are - from kernel's POV anyway - basically another generation
of A6xx. They build upon the A650/A660_family advancements, skipping some
writes (presumably more values are preset correctly on reset), adding
some new ones and changing others.
One notable difference is the introduction of
If the GMU can't guarantee the required resources are up, trying to
bring up the GPU is a lost cause. Return early if setting GPU OOB
fails.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c |
Add a helper that does exactly what it says on the can, it'll be
required for A7xx.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Move these wrappers in preparation for use in a6xx_gmu.c
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 15 ---
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 15 +++
2
Add some missing definitions required for A7 support.
This may be substituted with a mesa header sync.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 9 +
When booting the GMU, the QMP mailbox should be pinged about some tunables
(e.g. adaptive clock distribution state). To achieve that, a reference to
it is necessary. Allow it and require it with A730.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by:
Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends.
They use GMU for all things DVFS, just like most A6xx GPUs.
Reviewed-by: Krzysztof Kozlowski
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
The GMU on the A7xx series is pretty much the same as on the A6xx parts.
It's now "smarter", needs a bit less register writes and controls more
things (like inter-frame power collapse) mostly internally (instead of
us having to write to G[PM]U_[CG]X registers from APPS)
The only difference worth
This series attempts to introduce Adreno 700 support (with A730 and A740
found on SM8450 and SM8550 respectively), reusing much of the existing
A6xx code. This submission largely lays the groundwork for expansion and
more or less gives us feature parity (on the kernel side, that is) with
existing
Hi Dmitry,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on usb/usb-testing usb/usb-next usb/usb-linus
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.5-rc5 next-20230808
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 71cd4fc492ec41e4acd85e98bbf7a13753fc1e03 Add linux-next specific
files for 20230808
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202307251531.p8zlftmz-...@intel.com
https
In the unlikely event of radeon_ring_lock() failing, its errno return
value should be processed. This patch checks said return value and
prints a debug message in case of an error.
Found by Linux Verification Center (linuxtesting.org) with static
analysis tool SVACE.
Fixes: 48c0c902e2e6
Four hdmi_*_infoframe_init() functions that initialize different
types of hdmi infoframes only return the default 0 value, contrary to
their descriptions. Yet these functions are still unnecessarily checked
against possible errors in case of failure.
Remove redundant error checks in calls to
Applied. Thanks!
Alex
On Mon, Aug 7, 2023 at 9:22 AM Xiongfeng Wang wrote:
>
> PCI core API pci_dev_id() can be used to get the BDF number for a pci
> device. We don't need to compose it mannually. Use pci_dev_id() to
> simplify the code a little bit.
>
> Signed-off-by: Xiongfeng Wang
> ---
>
Cybernet T10C cannot be dimmed without the backlight strobing. Create a
new quirk to lock the minimum brightness to the highest supported value.
This aligns the device with its behavior on Windows, which will not
lower the brightness below maximum.
Signed-off-by: Allen Ballway
---
V2 -> V3: Fix
It's the same situation as SIGSEGV. A process can catch the signal,
but if it doesn't, it gets killed. GL and Vulkan APIs give you a way
to catch the GPU error and prevent the process termination. If you
don't use the API, you'll get undefined behavior, which means anything
can happen, including
On Thu, Jun 22, 2023 at 10:25:17AM +0200, David Hildenbrand wrote:
> On 22.06.23 09:27, Vivek Kasireddy wrote:
> > The first patch ensures that the mappings needed for handling mmap
> > operation would be managed by using the pfn instead of struct page.
> > The second patch restores support for
Commit 552a77bab3ff ("drm/hisilicon: Delete the entire file hibmc_ttm.c")
removed the implementation but leave declaration.
Signed-off-by: Yue Haibing
---
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h | 2 --
1 file changed, 2 deletions(-)
diff --git
I would like if these kernel patches are accepted by everyone, If yes,
when they can be upstream.
I have a MR for libdrm to support drm nodes type up to 2^MINORBITS
nodes which can work with these patches,
https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/305
Thanks!
James
On
Currently, the vga_is_firmware_default() function works only on x86 and
IA64 architectures, but it is a no-op on ARM64, PPC, RISC-V, etc. This
patch completes the implementation by tracking the firmware framebuffer's
address range. The added code is trying to identify the VRAM aperture that
Am 08.08.23 um 16:06 schrieb Matthew Brost:
[SNIP]
Basically workqueues are the in kernel infrastructure for exactly that use
case and we are trying to re-create that here and that is usually a rather
bad idea.
Ok let me play around with what this would look like in Xe, what you are
On Mon, Aug 07, 2023 at 05:46:16PM +0200, Christian König wrote:
> Am 04.08.23 um 16:13 schrieb Matthew Brost:
> > [SNIP]
> > Christian / Daniel - I've read both of you comments and having a hard
> > time parsing them. I do not really understand the issue with this patch
> > or exactly what is
Am 28.07.23 um 16:22 schrieb Simon Ser:
On Thursday, July 27th, 2023 at 14:01, Christian König
wrote:
We do need patches to stop trying to infer the node type from the minor
in libdrm, though. Emil has suggested using sysfs, which we already do
in a few places in libdrm.
That sounds like a
On Tue, Aug 08, 2023 at 12:39:32PM +0200, Karol Herbst wrote:
> ahh, that would have been good to know :)
Yeah, I didn't see it before - it would only freeze. Only after I added
the printk you requested.
> Mind figuring out what's exactly NULL inside nvif_object_mthd? Or
> rather what line
On 7/14/23 16:25, Sarah Walker wrote:
>
> +/**
> + * DOC: PowerVR IOCTL CREATE_BO interface
> + */
> +
> +/**
> + * DOC: Flags for CREATE_BO
> + *
> + * The drm_pvr_ioctl_create_bo_args.flags field is 64 bits wide and
> consists
> + * of three groups of flags: creation, device mapping and CPU
On Fri, Aug 4, 2023 at 4:28 PM Uwe Kleine-König
wrote:
> (implicit) v1 of this series can be found at
> https://lore.kernel.org/linux-pwm/20230803140633.138165-1-u.kleine-koe...@pengutronix.de
> .
>
> Changes since then only affect documentation that I missed to adapt before.
> Thanks to
Am 28.07.23 um 01:10 schrieb Danilo Krummrich:
drm_exec_prepare_obj() and drm_exec_prepare_array() both reserve
dma-fence slots and hence a dma_resv_list without ever freeing it.
Make sure to call drm_gem_private_object_fini() for each GEM object
passed to
On Tue, Aug 08, 2023 at 07:37:19AM +, Kasireddy, Vivek wrote:
> Hi Jason,
>
> >
> > > No, adding HMM_PFN_REQ_WRITE still doesn't help in fixing the issue.
> > > Although, I do not have THP enabled (or built-in), shmem does not evict
> > > the pages after hole punch as noted in the comment in
On Fri, Aug 4, 2023 at 3:03 PM Daniel Vetter wrote:
>
> On Tue, Jun 27, 2023 at 10:23:23AM -0300, André Almeida wrote:
> > Create a section that specifies how to deal with DRM device resets for
> > kernel and userspace drivers.
> >
> > Acked-by: Pekka Paalanen
> > Signed-off-by: André Almeida
>
On Mon, Aug 7, 2023 at 7:52 PM Jessica Zhang wrote:
>
>
>
> On 8/4/2023 6:15 AM, Sebastian Wick wrote:
> > On Fri, Jul 28, 2023 at 7:03 PM Jessica Zhang
> > wrote:
> >>
> >> Add support for pixel_source property to drm_plane and related
> >> documentation. In addition, force pixel_source to
>
Hi Jason,
On 8/7/23 04:51, Jason-JH.Lin wrote:
The plane_state of drm_atomic_state is not sync to the mtk_plane_state
stored in mtk_crtc during crtc enabling.
So we need to update the mtk_plane_state stored in mtk_crtc by the
drm_atomic_state carried from mtk_drm_crtc_atomic_enable().
While
Userspace should not be able to trigger DRM_ERROR messages to spam the
logs; especially not through atomic commit parameters which are
completely legitimate for userspace to attempt.
Signed-off-by: Daniel Stone
Fixes: 7707f7227f09 ("drm/rockchip: Add support for afbc")
---
On Mon, Aug 7, 2023 at 5:05 PM Borislav Petkov wrote:
>
> On Mon, Aug 07, 2023 at 01:49:42PM +0200, Karol Herbst wrote:
> > in what way does it stop? Just not progressing? That would be kinda
> > concerning. Mind tracing with what arguments `nvkm_uevent_add` is
> > called with and without that
Separate out functions for getting maximum and minimum input BPC based
on platforms, when DSC is used.
v2: Use HAS_DSC macro instead of platform check while getting min input
bpc. (Stan)
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 35 +++--
1
Add KUnit tests that exercise page allocation using page pools
and freeing pages, either by returning them to the pool or
freeing them. Add a basic test for ttm_pool cleanup. Introduce
helpers to create a dummy ttm_buffer_object.
Signed-off-by: Karolina Stolarek
---
Test initialization and cleanup of the ttm_device struct, including
some error paths. Verify the creation of page pools if use_dma_alloc
param is true.
Signed-off-by: Karolina Stolarek
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/tests/ttm_device_test.c | 158
1
Add the initial version of unit tests for ttm_device struct, together
with helper functions.
Signed-off-by: Karolina Stolarek
---
drivers/gpu/drm/Kconfig | 15 +++
drivers/gpu/drm/ttm/Makefile | 1 +
drivers/gpu/drm/ttm/tests/.kunitconfig| 4 +
This series introduces KUnit[1] tests for TTM (Translation Table Manager)
subsystem, a memory manager used by graphics drivers to create and manage
memory buffers across different memory domains, such as system memory
or VRAM.
Unit tests implemented here cover two data structures:
- ttm_device
Hi Christian,
On 7.08.2023 17:06, Christian König wrote:
Am 07.08.23 um 14:21 schrieb Karolina Stolarek:
Hi Christian,
On 3.08.2023 09:56, Christian König wrote:
Feel free to add Reviewed-by: Christian König
to the whole series and push to
drm-misc-next.
Thanks for reviewing the patches
On Thu, Aug 03, 2023 at 10:37:37AM +0200, Stanislaw Gruszka wrote:
> > Seems like we might want to decide this now, because if we define a iVPU
> > specific ioctl as proposed here, but then switch to an Accel-wide mechanism
> > later, iVPU is going to be stuck supporting both.
>
> For the record,
Add Cadence HDP-TX HDMI PHY driver for i.MX8MQ.
Cadence HDP-TX PHY could be put in either DP mode or
HDMI mode base on the configuration chosen.
HDMI PHY mode is configurated in the driver.
Signed-off-by: Sandor Yu
Tested-by: Alexander Stein
---
drivers/phy/freescale/Kconfig |
Add Cadence HDP-TX DisplayPort PHY driver for i.MX8MQ
Cadence HDP-TX PHY could be put in either DP mode or
HDMI mode base on the configuration chosen.
DisplayPort PHY mode is configurated in the driver.
Signed-off-by: Sandor Yu
---
drivers/phy/freescale/Kconfig | 9 +
Add bindings for Freescale iMX8MQ DP and HDMI PHY.
Signed-off-by: Sandor Yu
Reviewed-by: Rob Herring
---
.../bindings/phy/fsl,imx8mq-dp-hdmi-phy.yaml | 53 +++
1 file changed, 53 insertions(+)
create mode 100644
Add a new DRM DisplayPort and HDMI bridge driver for Candence MHDP8501
used in i.MX8MQ SOC. MHDP8501 could support HDMI or DisplayPort
standards according embedded Firmware running in the uCPU.
For iMX8MQ SOC, the DisplayPort/HDMI FW was loaded and activated by
SOC's ROM code. Bootload binary
Add bindings for Cadence MHDP8501 DisplayPort/HDMI bridge.
Signed-off-by: Sandor Yu
---
.../display/bridge/cdns,mhdp8501.yaml | 104 ++
1 file changed, 104 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/bridge/cdns,mhdp8501.yaml
diff --git
Allow HDMI PHYs to be configured through the generic
functions through a custom structure added to the generic union.
The parameters added here are based on HDMI PHY
implementation practices. The current set of parameters
should cover the potential users.
Signed-off-by: Sandor Yu
---
MHDP8546 mailbox access functions will be share to other mhdp driver
and Cadence HDP-TX HDMI/DP PHY drivers.
Move those functions to head file include/drm/bridge/cdns-mhdp-mailbox.h
and convert them to macro functions.
Signed-off-by: Sandor Yu
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c |
The patch set initial support Cadence MHDP8501(HDMI/DP) DRM bridge
drivers and Cadence HDP-TX PHY(HDMI/DP) drivers for Freescale i.MX8MQ.
The patch set compose of DRM bridge drivers and PHY drivers.
Both of them need the followed two patches to pass build.
drm: bridge: Cadence: convert mailbox
Hi Dave,
On 2023/8/8 10:44, Dave Chinner wrote:
On Mon, Aug 07, 2023 at 07:09:34PM +0800, Qi Zheng wrote:
Like global slab shrink, this commit also uses refcount+RCU method to make
memcg slab shrink lockless.
This patch does random code cleanups amongst the actual RCU changes.
Can you please
> On Aug 7, 2023, at 19:09, Qi Zheng wrote:
>
> Use new APIs to dynamically allocate the rcu-kfree shrinker.
>
> Signed-off-by: Qi Zheng
Reviewed-by: Muchun Song
Hi Uwe,
> -Original Message-
> From: Uwe Kleine-König
> Sent: Friday, August 4, 2023 11:27 PM
> To: Thierry Reding ; Laurent Pinchart
>
> Cc: Linus Walleij ; Bartosz Golaszewski
> ; Andy Shevchenko ; Douglas Anderson
> ; Andrzej Hajda ; Neil
> Armstrong ; Robert Foss ;
> Jonas Karlman ;
layer_irqs does not seems to have any user. So remove it completely.
This resolves sparse warning:
warning: symbol 'layer_irqs' was not declared. Should it be static?
Signed-off-by: GUO Zihua
---
v2:
V1 is titled "drm/kmb: Make layer_irqs static". This patch removes
layer_irqs completely
> On Aug 7, 2023, at 19:08, Qi Zheng wrote:
>
> Use new APIs to dynamically allocate the android-binder shrinker.
>
> Signed-off-by: Qi Zheng
Reviewed-by: Muchun Song
Hi Jason,
>
> > No, adding HMM_PFN_REQ_WRITE still doesn't help in fixing the issue.
> > Although, I do not have THP enabled (or built-in), shmem does not evict
> > the pages after hole punch as noted in the comment in shmem_fallocate():
>
> This is the source of all your problems.
>
> Things
Hi Dave,
On 2023/8/8 10:24, Dave Chinner wrote:
On Mon, Aug 07, 2023 at 07:09:33PM +0800, Qi Zheng wrote:
diff --git a/include/linux/shrinker.h b/include/linux/shrinker.h
index eb342994675a..f06225f18531 100644
--- a/include/linux/shrinker.h
+++ b/include/linux/shrinker.h
@@ -4,6 +4,8 @@
On Thu, 3 Aug 2023 18:52:20 +0200
Danilo Krummrich wrote:
> When no custom lock is set to protect a GEMs GPUVA list, lockdep checks
> should fall back to the GEM objects dma-resv lock. With the current
> implementation we're setting the lock_dep_map of the GEM objects 'resv'
> pointer (in case
Hi Sam,
s...@ravnborg.org wrote on Mon, 7 Aug 2023 18:52:45 +0200:
> Hi Miquel,
>
> On Mon, Aug 07, 2023 at 11:12:46AM +0200, Miquel Raynal wrote:
> > Hi Sam,
> >
> > s...@ravnborg.org wrote on Sat, 10 Jun 2023 22:05:15 +0200:
> >
> > > On Fri, Jun 09, 2023 at 04:48:43PM +0200, Miquel
Hi Dave,
On 2023/8/8 10:12, Dave Chinner wrote:
On Mon, Aug 07, 2023 at 07:09:32PM +0800, Qi Zheng wrote:
Currently, we maintain two linear arrays per node per memcg, which are
shrinker_info::map and shrinker_info::nr_deferred. And we need to resize
them when the shrinker_nr_max is exceeded,
Am 07.08.23 um 20:54 schrieb Danilo Krummrich:
Hi Christian,
On 8/7/23 20:07, Christian König wrote:
Am 03.08.23 um 18:52 schrieb Danilo Krummrich:
The new (VM_BIND) UAPI exports DMA fences through DRM syncobjs. Hence,
in order to emit fences within DMA fence signalling critical sections
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