RE: Re: [PATCH] RISC-V: Allow VMS{Compare} (V1, V1) shortcut optimization

Hi Kito Thanks for the suggestion. Sorry for late response due to stuck in the rest rvv test files auto generation. I have similar discuss with juzhe for this approach, and take Patch v2's way due to the below concern. 1. The vector.md Is quite complicated already, the maintenance may be out

[r14-159 Regression] FAIL: std/ranges/iota/max_size_type.cc execution test on Linux/x86_64

On Linux/x86_64, 03cebd304955a6b9c5607e09312d77f1307cc98e is the first bad commit commit 03cebd304955a6b9c5607e09312d77f1307cc98e Author: Jason Merrill Date: Tue Apr 18 21:32:07 2023 -0400 c++: fix 'unsigned typedef-name' extension [PR108099] caused FAIL:

Re: [GCC14 QUEUE PATCH] RISC-V: Optimize fault only first load

On 3/29/23 19:28, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Adapt PASS. This doesn't provide any useful information as far as I can tell. Perhaps something like: Erase AVL from instructions with the

Re: [GCC14 QUEUE PATCH] RISC-V: Eliminate redundant vsetvli for duplicate AVL def

On 3/27/23 19:01, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong void f (int8_t* base1,int8_t* base2,int8_t* out,int n) { vint8mf4_t v = __riscv_vle8_v_i8mf4 (base1, 32); for (int i = 0; i < n; i++){ v = __riscv_vor_vx_i8mf4 (v, 101, 32); v =

Re: [PATCH] RISC-V: Fix PR108270

On 3/27/23 00:59, juzhe.zh...@rivai.ai wrote: From: Juzhe-Zhong PR 108270 Fix bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108270. Consider the following testcase: void f (void * restrict in, void * restrict out, int l, int n, int m) { for (int i = 0; i < l; i++){

[Bug debug/109591] Multiple -fdebug-prefix-map= prefixes match, which one wins?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109591 --- Comment #3 from Fangrui Song --- (In reply to Andrew Pinski from comment #2) > GCC added -fdebug-prefix-map= back in r0-82686-gc8aea42ce2c691e4e8 2 years > before clang was first release . So Thank you for the super rapid response! I

[Bug c++/108179] [11/12 regression] ICE related to template template parameters in tsubst, at cp/pt.cc:15782

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108179 --- Comment #7 from Jason Merrill --- (In reply to stu t from comment #6) > Thank you for looking into this! :) You're welcome! I'm currently leaning toward backporting this to 12.4 rather than 12.3, but am interested in your thoughts.

Re: [PATCH] vect: Verify that GET_MODE_NUNITS is greater than one.

On 3/14/23 15:52, Michael Collison wrote: While working on autovectorizing for the RISCV port I encountered an issue where can_duplicate_and_interleave_p assumes that GET_MODE_NUNITS is a evenly divisible by two. The RISC-V target has vector modes (e.g. VNx1DImode), where GET_MODE_NUNITS is

[Bug c++/107163] [10/11 Regression] huge Compile time increase when using templated base classes, virtual method, and Wall since r10-2823-g6a07489267e55084

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107163 --- Comment #7 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:9ab083eb8a96b7f8baf6fe632d03aa496017e456 commit r11-10647-g9ab083eb8a96b7f8baf6fe632d03aa496017e456 Author: Jason Merrill

[Bug c++/105996] [10/11 Regression] reinterpret_cast in constexpr failure creating a pair with a function pointer of class parent

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105996 --- Comment #8 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:b6c8048cdd2c1e523f663f248ba39caed5af90e7 commit r11-10646-gb6c8048cdd2c1e523f663f248ba39caed5af90e7 Author: Jason Merrill

[Bug c++/108975] [10/11 Regression] ICE on constexpr variable used as nontype template since r9-5473-ge32fc4499f863f

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108975 --- Comment #16 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:51738bb097444dd3ca7adcfa28ae8dcff5a14c50 commit r11-10645-g51738bb097444dd3ca7adcfa28ae8dcff5a14c50 Author: Jason

[Bug c++/101869] [10/11 Regression] ::enumvalue is rejected

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101869 --- Comment #8 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:691e385b354482f3379bba471774873ca7179b79 commit r11-10643-g691e385b354482f3379bba471774873ca7179b79 Author: Jason Merrill

[Bug c++/105406] [11 Regression] coroutines: since 11.3 co_await attempts to copy a move-only value when await_transform(T &) exists

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105406 --- Comment #5 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:657fb0db2648a8cd7ba355fdec570fe2f08448ac commit r11-10642-g657fb0db2648a8cd7ba355fdec570fe2f08448ac Author: Jason Merrill

[Bug c++/69410] [10/11 Regression] friend declarations in local classes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69410 --- Comment #15 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:fbf72bbaed4477f1e3881a8d25977dd3890015eb commit r11-10644-gfbf72bbaed4477f1e3881a8d25977dd3890015eb Author: Jason Merrill

[Bug c++/98056] coroutines: ICE tree check: expected record_type or union_type or qual_union_type, have array_type since r11-2183-g0f66b8486cea8668

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98056 --- Comment #24 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:998e77e55126269b3e67b2f05f0f27a421839673 commit r11-10641-g998e77e55126269b3e67b2f05f0f27a421839673 Author: Jason Merrill

[Bug c++/103871] [11 Regression] coroutines: co_await causes build error

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103871 --- Comment #21 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:998e77e55126269b3e67b2f05f0f27a421839673 commit r11-10641-g998e77e55126269b3e67b2f05f0f27a421839673 Author: Jason

[Bug c++/108468] [11 Regression] ICE in most_specialized_partial_spec/builtin_guide_p in C++20 mode

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108468 --- Comment #5 from CVS Commits --- The releases/gcc-11 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:469881efc4ad365dce3db26dab7d33f95d36f92f commit r11-10640-g469881efc4ad365dce3db26dab7d33f95d36f92f Author: Jason Merrill

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #10 from Jeffrey A. Law --- The sign_extend later gets turned into zero_extend. Presumably because we know the value is never negative. That in and of itself wouldn't be a big deal as it should be easily recognizable using

Re: [PATCH] RISC-V: Optimize zbb ins sext.b and sext.h in rv64

On 3/23/23 19:53, Feng Wang wrote: This patch optimize the combine processing for sext.b/h in rv64. Please refer to the following test case, [ ... ] I've opened BZ109592 to track this problem. jeff

[Bug rtl-optimization/109592] New: Failure to recognize shifts as sign/zero extension

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109592 Bug ID: 109592 Summary: Failure to recognize shifts as sign/zero extension Product: gcc Version: 13.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #9 from Vineet Gupta --- (In reply to Jeffrey A. Law from comment #6) > Comment on attachment 54905 [details] > proposed patch > > So that's a subset of what we've done. We initially thought that was going > to be enough to solve

Re: [PATCH] RISC-V: Optimize zbb ins sext.b and sext.h in rv64

On 3/23/23 19:53, Feng Wang wrote: This patch optimize the combine processing for sext.b/h in rv64. Please refer to the following test case, int sextb32(int x) { return (x << 24) >> 24; } The rtl expression is as follows, (insn 6 3 7 2 (set (reg:SI 138) (ashift:SI (subreg/s/u:SI

[Bug analyzer/109580] #pragma GCC diagnostic ignored "-Wanalyzer-fd-leak" is ineffective

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109580 David Malcolm changed: What|Removed |Added Last reconfirmed||2023-04-21 Ever confirmed|0

[Bug debug/109591] Multiple -fdebug-prefix-map= prefixes match, which one wins?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109591 --- Comment #2 from Andrew Pinski --- GCC added -fdebug-prefix-map= back in r0-82686-gc8aea42ce2c691e4e8 2 years before clang was first release . So

[Bug debug/109591] Multiple -fdebug-prefix-map= prefixes match, which one wins?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109591 --- Comment #1 from Andrew Pinski --- >When multiple -fdebug-prefix-map= options are applicable, it seems that the >last wins. Right, that is the standard way all options in GCC works.

[Bug debug/109591] New: Multiple -fdebug-prefix-map= prefixes match, which one wins?

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109591 Bug ID: 109591 Summary: Multiple -fdebug-prefix-map= prefixes match, which one wins? Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal

gcc-12-20230421 is now available

Snapshot gcc-12-20230421 is now available on https://gcc.gnu.org/pub/gcc/snapshots/12-20230421/ and on various mirrors, see http://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 12 git branch with the following options: git://gcc.gnu.org/git/gcc.git branch

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #8 from Jeffrey A. Law --- So coming back to this after a couple months, I'm confident the match.pd change is unnecessary and in fact wrong. So we definitely want to set that aside.

[Bug fortran/109575] Implement runtime check for valid function result

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109575 --- Comment #3 from Steve Kargl --- On Fri, Apr 21, 2023 at 08:24:45PM +, anlauf at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109575 > > --- Comment #2 from anlauf at gcc dot gnu.org --- > I have some idea how

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #7 from Vineet Gupta --- (In reply to Roger Sayle from comment #5) > Created attachment 54905 [details] > proposed patch > > This patch should fix this problem, by adding another pattern the machine > description to also recognize

Re: Third GC 13.1 Release Candidate available from gcc.gnu.org

I bootstrapped and tested this on powerpc64 power 7, 8, 9, and 10 and on both BE and LE and saw nothing unexpected. On 4/21/23 2:47 AM, Richard Biener via Gcc wrote: The third release candidate for GCC 13.1 is available from https://gcc.gnu.org/pub/gcc/snapshots/13.1.0-RC-20230421/ ftp

[Bug tree-optimization/109590] array-bounds does not warn about address 0x0 dereference

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109590 --- Comment #2 from Jonny Grant --- (In reply to Andrew Pinski from comment #1) > There is -Wnull-dereference for this ... I agree. I set that -Wnull-dereference in usual projects (it doesn't seem to get enabled by -Wall -Wextra) I just

[Bug c++/109590] array-bounds does not warn about address 0x0 dereference

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109590 --- Comment #1 from Andrew Pinski --- There is -Wnull-dereference for this ...

[Bug c++/109590] New: array-bounds does not warn about address 0x0 dereference

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109590 Bug ID: 109590 Summary: array-bounds does not warn about address 0x0 dereference Product: gcc Version: 13.0 Status: UNCONFIRMED Severity: normal

Re: [PATCH v1] [RFC] Improve folding for comparisons with zero in tree-ssa-forwprop.

Any guidance on the next steps for this patch? I believe that we answered all open questions, but may have missed something. With trunk open for new development, we would like to revise and land this… Thanks, Philipp. On Mon, 20 Mar 2023 at 15:02, Manolis Tsamis wrote: > > On Fri, Mar 17, 2023

[Bug c++/108795] [10/11/12 Regression] ICE in prep_operand, at cp/call.cc:6325 since r7-2549-gf3365c1201908df5

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108795 --- Comment #4 from CVS Commits --- The releases/gcc-12 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:1c1a9a0b60a9a182bcff79084e5ac367a6329bc2 commit r12-9463-g1c1a9a0b60a9a182bcff79084e5ac367a6329bc2 Author: Jason Merrill

Re: [PATCH] Implement range-op entry for sin/cos.

On Fri, Apr 21, 2023 at 10:43:44PM +0200, Mikael Morin wrote: > Hello, > > > --- gcc/gimple-range-op.cc.jj 2023-04-21 17:09:48.250367999 +0200 > > +++ gcc/gimple-range-op.cc 2023-04-21 18:37:26.048325391 +0200 > > @@ -439,20 +436,38 @@ public: > > r.set_varying (type); > > return

Re: [PATCH] Implement range-op entry for sin/cos.

Hello, --- gcc/gimple-range-op.cc.jj 2023-04-21 17:09:48.250367999 +0200 +++ gcc/gimple-range-op.cc 2023-04-21 18:37:26.048325391 +0200 @@ -439,20 +436,38 @@ public: r.set_varying (type); return true; } + // Results outside of [-1.0, +1.0] are impossible.

Re: [PATCH] RISC-V: Fix redundant vmv1r.v instruction in vmsge.vx codegen

On 3/22/23 06:15, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong Current expansion of vmsge will make RA produce redundant vmv1r.v. testcase: void f1 (void * in, void *out, int32_t x) { vbool32_t mask = *(vbool32_t*)in; asm volatile ("":::"memory"); vint32m1_t v =

Re: [PATCH] RISC-V: Fine tune vmadc/vmsbc RA constraint

On 3/16/23 03:39, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/vector.md: Fix bug of vmsbc OK. Please install on the trunk. jeff

Re: [PATCH] riscv: thead: Add sign/zero extension support for th.ext and th.extu

On 3/15/23 06:24, Christoph Muellner wrote: From: Christoph Müllner The current support of the bitfield-extraction instructions th.ext and th.extu (XTheadBb extension) only covers sign_extract and zero_extract. This patch add support for sign_extend and zero_extend to avoid any shifts for

Re: [PATCH] RISC-V: Fine tune gather load RA constraint

On 3/13/23 02:28, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong For DEST EEW < SOURCE EEW, we can partial overlap register according to RVV ISA. gcc/ChangeLog: * config/riscv/vector.md: Fix RA constraint. gcc/testsuite/ChangeLog: *

Re: [PATCH v3] sockaddr.3type: POSIX Issue 8 will solve strict-aliasing issues with these types

On Fri, Apr 21, 2023 at 10:27:18PM +0200, Alejandro Colomar wrote: > Link: > Reported-by: Bastien Roucariès > Reported-by: Alejandro Colomar > Reviewed-by: Eric Blake > Cc: glibc > Cc: GCC > Cc: Stefan Puiu > Cc: Igor Sysoev > Cc: Rich Felker

[COMMITTED] PR tree-optimization/109546 - Do not fold ADDR_EXPR conditions leading to builtin_unreachable early.

We cant represent ADDR_EXPR in ranges, so when we are processing builtin_unreachable() we should not be removing comparisons that utilize ADDR_EXPR during the early phases, or we lose some important information. It was just an oversight that we think its a comparison to a representable

[Bug tree-optimization/109546] [13/14 Regression] Missed Dead Code Elimination when using __builtin_unreachable since r13-3596-ge7310e24b1c0ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109546 --- Comment #5 from CVS Commits --- The master branch has been updated by Andrew Macleod : https://gcc.gnu.org/g:f828503eeb79ad1f1ada6db7deccc5abcc2f3ca3 commit r14-160-gf828503eeb79ad1f1ada6db7deccc5abcc2f3ca3 Author: Andrew MacLeod Date:

Re: [PATCH] RISC-V: Refine reduction RA constraint according to RVV ISA

On 3/13/23 03:05, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong According to RVV ISA: 14. Vector Reduction Operations "The destination vector register can overlap the source operands, including the mask register." gcc/ChangeLog: * config/riscv/vector.md: Refine RA constraint.

Re: [PATCH] RISC-V: Fine tune vmadc/vmsbc RA constraint

On 3/13/23 18:38, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong gcc/ChangeLog: * config/riscv/vector.md: Fine tune vmadc/vmsbc RA constraint. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/narrow_constraint-13.c: New test. *

[PATCH v3] sockaddr.3type: POSIX Issue 8 will solve strict-aliasing issues with these types

Link: Reported-by: Bastien Roucariès Reported-by: Alejandro Colomar Reviewed-by: Eric Blake Cc: glibc Cc: GCC Cc: Stefan Puiu Cc: Igor Sysoev Cc: Rich Felker Cc: Andrew Clayton Cc: Richard Biener Cc: Zack Weinberg Cc: Florian Weimer Cc:

[Bug c++/107163] [10/11 Regression] huge Compile time increase when using templated base classes, virtual method, and Wall since r10-2823-g6a07489267e55084

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107163 --- Comment #6 from CVS Commits --- The releases/gcc-10 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:e81e393cd864abcd2de02602bd51e435dc28f418 commit r10-11307-ge81e393cd864abcd2de02602bd51e435dc28f418 Author: Jason Merrill

[Bug c++/108975] [10/11 Regression] ICE on constexpr variable used as nontype template since r9-5473-ge32fc4499f863f

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108975 --- Comment #15 from CVS Commits --- The releases/gcc-10 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:92e2bb31ffe25271e5ae70d7533469419b883864 commit r10-11305-g92e2bb31ffe25271e5ae70d7533469419b883864 Author: Jason

[Bug c++/105996] [10/11 Regression] reinterpret_cast in constexpr failure creating a pair with a function pointer of class parent

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105996 --- Comment #7 from CVS Commits --- The releases/gcc-10 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:da17a9049ee0a8ca9f93edf137df92e824a7593e commit r10-11306-gda17a9049ee0a8ca9f93edf137df92e824a7593e Author: Jason Merrill

[Bug c++/69410] [10/11 Regression] friend declarations in local classes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69410 --- Comment #14 from CVS Commits --- The releases/gcc-10 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:fc03893d2fead133ed336511ac00d75c10c5a88d commit r10-11304-gfc03893d2fead133ed336511ac00d75c10c5a88d Author: Jason Merrill

[Bug c++/101869] [10/11 Regression] ::enumvalue is rejected

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101869 --- Comment #7 from CVS Commits --- The releases/gcc-10 branch has been updated by Jason Merrill : https://gcc.gnu.org/g:6f7f90113bc78440a248bef4b917583fde3e6e5f commit r10-11303-g6f7f90113bc78440a248bef4b917583fde3e6e5f Author: Jason Merrill

[Bug tree-optimization/109587] Deeply nested loop unrolling overwhelms register allocator

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109587 --- Comment #2 from Andrew Pinski --- At -O2 we get: size: 26-3, last_iteration: 2-2 Loop size: 26 Estimated size after unrolling: 245 Not unrolling loop 1: size would grow. With -O3: size: 20-4, last_iteration: 2-2 Loop size: 20

[Bug fortran/109575] Implement runtime check for valid function result

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109575 --- Comment #2 from anlauf at gcc dot gnu.org --- I have some idea how (and where) the runtime checks need to be implemented, but I am confused by the following observations on the occurence of an explicit RETURN statement and the use of a

[Bug tree-optimization/109587] Deeply nested loop unrolling overwhelms register allocator

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109587 Andrew Pinski changed: What|Removed |Added Keywords|ra | --- Comment #1 from Andrew Pinski

[Bug tree-optimization/109587] Deeply nested loop unrolling overwhelms register allocator

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109587 Andrew Pinski changed: What|Removed |Added Keywords||ra Severity|normal

[Bug c++/106893] [12 Regression] auto deduces wrong type for function pointer

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106893 Jason Merrill changed: What|Removed |Added Known to work||12.3.0, 13.0 Resolution|---

[Bug target/54816] [avr] shift is better than widening mul

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54816 --- Comment #6 from Georg-Johann Lay --- (In reply to Roger Sayle from comment #5) > This is now fixed on mainline [but was present in GCC 12.2], and a new test > case added to ensure this stays fixed. Hi Roger, I am having a problem with your

New Swedish PO file for 'gcc' (version 13.1-b20230409)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the Swedish team of translators. The file is available at: https://translationproject.org/latest/gcc/sv.po (This file,

Re: [RFC PATCH v1 10/10] RISC-V: Support XVentanaCondOps extension

On 2/10/23 15:41, Philipp Tomsich wrote: The vendor-defined XVentanaCondOps extension adds two instructions with semantics identical to Zicond. This plugs the 2 new instruction in using the canonical RTX, which also matches the combiner-input for noce_try_store_flag_mask and

Re: [RFC PATCH v1 09/10] RISC-V: Recognize xventanacondops extension

On 2/10/23 15:41, Philipp Tomsich wrote: This adds the xventanacondops extension to the option parsing and as a default for the ventana-vt1 core: gcc/Changelog: * common/config/riscv/riscv-common.cc: Recognize "xventanacondops" as part of an architecture string. *

Re: [RFC PATCH v1 07/10] RISC-V: Recognize bexti in negated if-conversion

On 2/10/23 15:41, Philipp Tomsich wrote: While the positive case "if ((bits >> SHAMT) & 1)" for SHAMT 0..10 can trigger conversion into efficient branchless sequences - with Zbs (bexti + neg + and) - with Zicond (andi + czero.nez) the inverted/negated case results in andi a5,a0,1024

Re: [PATCH] gcc/m2: Drop references to $(P)

Jakub Jelinek writes: > Doesn't fix any regression, so not ok for 13.1 and I wouldn't bother > for 13.2 either. Okay, but it can affect --enable-languages=all in a slim edge case. Why not 13.2? It seems sufficiently simple. Thanks, have a lovely night! -- Arsen Arsenović signature.asc

Re: GCC-13 Branch with RISC-V Performance-Related Backports

Palmer Dabbelt writes: > We talked about this a bit on IRC, but just to reflect it to the > mailing lists: > > On Tue, 18 Apr 2023 05:34:11 PDT (-0700), s...@gentoo.org wrote: >> >> Palmer Dabbelt writes: >> >>> Based on some discussions, it looks like a handful of vendors are >>> planning on

Re: [RFC PATCH v1 06/10] RISC-V: Recognize sign-extract + and cases for czero.eqz/nez

On 2/10/23 15:41, Philipp Tomsich wrote: Users might use explicit arithmetic operations to create a mask and then and it, in a sequence like cond = (bits >> SHIFT) & 1; mask = ~(cond - 1); val &= mask; which will present as a single-bit sign-extract. Dependening on what

[Bug c++/108099] [12/13/14 Regression] ICE with type alias with `signed __int128_t`

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108099 --- Comment #26 from CVS Commits --- The trunk branch has been updated by Jason Merrill : https://gcc.gnu.org/g:03cebd304955a6b9c5607e09312d77f1307cc98e commit r14-159-g03cebd304955a6b9c5607e09312d77f1307cc98e Author: Jason Merrill Date:

[PATCH] testsuite: Add testcase for sparc ICE [PR105573]

r11-10018-g33914983cf3734c2f8079963ba49fcc117499ef3 fixed PR105312 and added a test case for target/arm but the duplicate PR105573 has a test case for target/sparc that was uncommitted until now. 2023-04-21 Sam James PR tree-optimization/105312 PR target/105573 *

[pushed] c++: fix 'unsigned typedef-name' extension [PR108099]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- In the comments for PR108099 Jakub provided some testcases that demonstrated that even before the regression noted in the patch we were getting the semantics of this extension wrong: in the unsigned case we weren't producing the

Re: [RFC PATCH v1 05/10] RISC-V: Support noce_try_store_flag_mask as czero.eqz/czero.nez

On 2/10/23 15:41, Philipp Tomsich wrote: When if-conversion in noce_try_store_flag_mask starts the sequence off with an order-operator, our patterns for czero.eqz/nez will receive the result of the order-operator as a register argument; consequently, they can't know that the result will be

Re: [PATCH] gcc/m2: Drop references to $(P)

On Fri, Apr 21, 2023 at 08:27:22PM +0200, Arsen Arsenović wrote: > Hi Gaius, > > Gaius Mulley writes: > > > yes certainly this is fine. lgtm. Thanks for spotting and the patch > > Sure. Will push to master and wait for a RM to weigh in on 13. Doesn't fix any regression, so not ok for 13.1

Re: [PATCH] Implement range-op entry for sin/cos.

On Thu, Apr 20, 2023 at 02:59:35PM +0200, Jakub Jelinek via Gcc-patches wrote: > Thanks for working on this. Though expectedly here we are running > again into the discussions we had in November about math properties of the > functions vs. numeric properties in their implementations, how big

Re: [PATCH] tree, c++: declare some basic functions inline

On 4/21/23 13:07, Patrick Palka wrote: On Sun, 4 Dec 2022, Patrick Palka wrote: The functions strip_array_types, is_typedef_decl, typedef_variant_p, cp_type_quals and cp_expr_location are used throughout the C++ frontend including in some fairly hot parts (e.g. in the tsubst routines and

Re: [PATCH 1/2] Use NO_REGS in cost calculation when the preferred register class are not known yet.

On 4/19/23 20:46, liuhongt via Gcc-patches wrote: 1547 /* If this insn loads a parameter from its stack slot, then it 1548 represents a savings, rather than a cost, if the parameter is 1549 stored in memory. Record this fact. 1550 1551 Similarly if we're loading other constants

[Bug tree-optimization/109546] [13/14 Regression] Missed Dead Code Elimination when using __builtin_unreachable since r13-3596-ge7310e24b1c0ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109546 --- Comment #4 from Andrew Macleod --- And I think the first part of this is a duplicate of another PR from GCC12 time (I dont know which one) whereby we are not making staticly initialized values available in main(). so VRP never sees that d

Re: [PATCH v2] configure: Only create serdep.tmp if needed

On 1/16/23 18:12, Peter Foley wrote: There's no reason to create this file if none of the serial configure options are passed. v2: Use test instead of [ to avoid running afoul of autoconf quoting. ChangeLog: * configure: Regenerate. * configure.ac: Only create serdep.tmp if

[Bug tree-optimization/109546] [13/14 Regression] Missed Dead Code Elimination when using __builtin_unreachable since r13-3596-ge7310e24b1c0ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109546 --- Comment #3 from Andrew Macleod --- Patch in testing. when deciding to fold condition of builtin_unreachable, VRP is failing to recognize that given if (ptr == ) __builtin_unreachable () is not a representable range, and thus

[Bug tree-optimization/109588] [13 Regression] Missed Dead Code Elimination when using __builtin_unreachable

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109588 Andrew Macleod changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug tree-optimization/109546] [13/14 Regression] Missed Dead Code Elimination when using __builtin_unreachable since r13-3596-ge7310e24b1c0ca

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109546 --- Comment #2 from Andrew Macleod --- *** Bug 109588 has been marked as a duplicate of this bug. ***

Re: [PATCH] gcc/m2: Drop references to $(P)

Hi Gaius, Gaius Mulley writes: > yes certainly this is fine. lgtm. Thanks for spotting and the patch Sure. Will push to master and wait for a RM to weigh in on 13. Thanks! -- Arsen Arsenović signature.asc Description: PGP signature

[committed] [PR testsuite/109549] Adjust x86 testsuite for recent if-conversion cost checking

This test expected if-conversion to happen for a sequence which appears to always cost more than a branchy sequence. This was exposed by a recent change to the if-converter to add checking in a path where it was missing. So I've just adjusted the test to assume it should never if-convert

[Bug testsuite/109549] [14 Regression] cmov6.c test fail after commit r14-53-g675b1a7f113adb1d737adaf78b4fd90be7a0ed1a

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109549 --- Comment #8 from CVS Commits --- The master branch has been updated by Jeff Law : https://gcc.gnu.org/g:f1f18198b069f461155191ecba41bc87bf5689dd commit r14-156-gf1f18198b069f461155191ecba41bc87bf5689dd Author: Jeff Law Date: Fri Apr 21

Re: [PATCH] gcc/m2: Drop references to $(P)

Arsen Arsenović writes: > $(P) seems to have been a workaround for some old, proprietary make > implementations that we no longer support. It was removed in > r0-31149-gb8dad04b688e9c. > > gcc/m2/ChangeLog: > > * Make-lang.in: Remove references to $(P). > * Make-maintainer.in:

[Bug bootstrap/109589] [14 regression] r14-35-g278f8f567b5470 breaks build with older gcc build compilers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109589 --- Comment #2 from Jakub Jelinek --- Untested workaround, going to test it momentarily: 2023-04-21 Jakub Jelinek PR bootstrap/109589 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9. *

[Bug other/109589] [14 regression] r14-35-g278f8f567b5470 breaks build with older gcc build compilers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109589 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org Last

[PATCH][committed] aarch64: Emit single-instruction for smin (x, 0) and smax (x, 0)

Hi all, Motivated by https://reviews.llvm.org/D148249, we can expand to a single instruction for the SMIN (x, 0) and SMAX (x, 0) cases using the combined AND/BIC and ASR operations. Given that we already have well-fitting TARGET_CSSC patterns and expanders for the min/max codes in the backend

[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 ktkachov at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED Target

[Bug target/108779] AARCH64 should add an option to change TLS register location to support EL1/EL2/EL3 system registers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108779 --- Comment #9 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:573624ec90c80d1a024ab405e2575785b869a833 commit r14-154-g573624ec90c80d1a024ab405e2575785b869a833 Author: Kyrylo Tkachov Date:

[PATCH][committed] PR target/108779 aarch64: Implement -mtp= option

Hi all, A user has requested that we support the -mtp= option in aarch64 GCC for changing the TPIDR register to read for TLS accesses. I'm not a big fan of the option name, but we already support it in the arm port and Clang supports it for AArch64 already [1], where it accepts the 'el0',

[Bug target/99195] Optimise away vec_concat of 64-bit AdvancedSIMD operations with zeroes in aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99195 --- Comment #3 from CVS Commits --- The master branch has been updated by Kyrylo Tkachov : https://gcc.gnu.org/g:f824216cdb078ea9de0980ae066a0e1e83494fd2 commit r14-153-gf824216cdb078ea9de0980ae066a0e1e83494fd2 Author: Kyrylo Tkachov Date:

[PATCH][committed] aarch64: PR target/99195 Add scheme to optimise away vec_concat with zeroes on 64-bit Advanced SIMD ops

Hi all, I finally got around to trying out the define_subst approach for PR target/99195. The problem we have is that many Advanced SIMD instructions have 64-bit vector variants that clear the top half of the 128-bit Q register. This would allow the compiler to avoid generating explicit

[Bug other/109589] [14 regression] r14-35-g278f8f567b5470 breaks build with older gcc build compilers

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109589 Andrew Pinski changed: What|Removed |Added Target Milestone|--- |14.0 Keywords|

[PATCH] gcc/m2: Drop references to $(P)

$(P) seems to have been a workaround for some old, proprietary make implementations that we no longer support. It was removed in r0-31149-gb8dad04b688e9c. gcc/m2/ChangeLog: * Make-lang.in: Remove references to $(P). * Make-maintainer.in: Ditto. --- Hi, We spotted that the m2

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #6 from Jeffrey A. Law --- Comment on attachment 54905 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=54905 proposed patch So that's a subset of what we've done. We initially thought that was going to be enough to solve this

[Bug tree-optimization/106888] [RISCV] Negative optimization that excess andi instructions are generated in gcc.dg/pr90838.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106888 --- Comment #5 from Roger Sayle --- Created attachment 54905 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=54905=edit proposed patch This patch should fix this problem, by adding another pattern the machine description to also recognize

Re: [PATCH] RFC: New compact syntax for insn and insn_split in Machine Descriptions

Tamar Christina writes: > Hi All, > > This patch adds support for a compact syntax for specifying constraints in > instruction patterns. Credit for the idea goes to Richard Earnshaw. > > I am sending up this RFC to get feedback for it's inclusion in GCC 14. > With this new syntax we want a clean

[Bug middle-end/109585] Carla/sord miscompiled with -O2 on ARM64 with flexible array member

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109585 Andrew Pinski changed: What|Removed |Added Summary|Carla/sord miscompiled with |Carla/sord miscompiled with

[Bug middle-end/109585] Carla/sord miscompiled with -O2 on ARM64 (inlining issue)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109585 --- Comment #11 from Hector Martin --- Giving a nonzero size to the `ZixBTreeIterFrame stack[]` member also avoids the segfault, so this might be a flexible array member thing.

Re: [PATCH] tree, c++: declare some basic functions inline

On Sun, 4 Dec 2022, Patrick Palka wrote: > The functions strip_array_types, is_typedef_decl, typedef_variant_p, > cp_type_quals and cp_expr_location are used throughout the C++ frontend > including in some fairly hot parts (e.g. in the tsubst routines and > cp_walk_subtree) and they're small

[Bug middle-end/109585] Carla/sord miscompiled with -O2 on ARM64 (inlining issue)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109585 --- Comment #10 from Andrew Pinski --- If I change zix_btree_iter_is_end to: ZIX_API bool zix_btree_iter_is_end(const struct ZixBTreeIterImpl* const i) { if (!i) return 1; if (i->stack[0].node == NULL) return 1; return 0; } Then

  1   2   3   >