Re: CI for "Option handling: add documentation URLs"

2024-03-05 Thread David Malcolm
On Tue, 2024-03-05 at 13:06 +0100, Mark Wielaard wrote: > Hi, > > On Mon, 2024-03-04 at 08:48 -0500, David Malcolm wrote: > > > I have now regenerated the patch to also include the new avr > > > mfuse- > > > add change. It would be nice to get this committed so we can turn > > > on the > > >

[Bug tree-optimization/114239] ice: error: definition in block does not dominate use in block

2024-03-05 Thread sjames at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114239 --- Comment #1 from Sam James --- The testcase is the same as in PR113555 - so should've added to test suite I suppose. Indeed ICEs on trunk.

[Bug c/114239] New: ice: error: definition in block does not dominate use in block

2024-03-05 Thread dcb314 at hotmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114239 Bug ID: 114239 Summary: ice: error: definition in block does not dominate use in block Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal

[Bug tree-optimization/114234] [14 Regression] verify_ssa failure with early-break vectorisation

2024-03-05 Thread sjames at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114234 Sam James changed: What|Removed |Added CC||sjames at gcc dot gnu.org,

[Bug tree-optimization/114234] [14 Regression] verify_ssa failure with early-break vectorisation

2024-03-05 Thread dcb314 at hotmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114234 David Binderman changed: What|Removed |Added CC||dcb314 at hotmail dot com ---

[Bug testsuite/101461] [12/13/14 regression] gcc.target/powerpc/fold-vec-load-builtin_vec_xl test cases fail after r12-2266

2024-03-05 Thread linkw at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101461 Kewen Lin changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #24 from Jakub Jelinek --- (In reply to rguent...@suse.de from comment #22) > I think optimize_function_for_size_p (cfun) isn't always true if > optimize_size is since it looks at the function-specific setting > of that flag, so

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #23 from Uroš Bizjak --- (In reply to Jan Hubicka from comment #21) > Looking at the prototype patch, why need to change also the splitters? Purely for implementation reasons, we check for general resp. SSE register in the operand

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenther at suse dot de via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #22 from rguenther at suse dot de --- On Tue, 5 Mar 2024, jakub at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 > > --- Comment #17 from Jakub Jelinek --- > Either change those too, or the splitter

[Bug tree-optimization/114238] New: Multiple 554.roms_r run-time regressions (4%-20%) since r14-9193-ga0b1798042d033

2024-03-05 Thread jamborm at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114238 Bug ID: 114238 Summary: Multiple 554.roms_r run-time regressions (4%-20%) since r14-9193-ga0b1798042d033 Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug tree-optimization/114009] [11/12/13/14 Regression] Missed optimization: (!a) * a => 0 when a=(a/2)*2

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114009 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

[PATCH] LoongArch: testsuite: Rewrite {x, }vfcmp-{d, f}.c to avoid named registers

2024-03-05 Thread Xi Ruoyao
Loops on named vector register are not vectorized (see comment 11 of PR113622), so the these test cases have been failing for a while. Rewrite them using check-function-bodies to remove hard coding register names. A barrier is needed to always load the first operand before the second operand.

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread hubicka at ucw dot cz via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #21 from Jan Hubicka --- Looking at the prototype patch, why need to change also the splitters? My original goal was to use splitters to expand to faster code sequences while having patterns necessary for both variants. This makes

Re: [Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread Jan Hubicka via Gcc-bugs
Looking at the prototype patch, why need to change also the splitters? My original goal was to use splitters to expand to faster code sequences while having patterns necessary for both variants. This makes it possible to use optimize_insn_for_size/speed and make decisions using BB profile, since

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #20 from Jakub Jelinek --- (In reply to Uroš Bizjak from comment #19) > (In reply to Jan Hubicka from comment #18) > > But the problem here is more that optab initializations happens only at > > the optimization_node changes and not

Re: [PATCH] middle-end/113680 - Optimize (x - y) CMP 0 as x CMP y

2024-03-05 Thread Ken Matsui
On Tue, Mar 5, 2024 at 12:38 AM Richard Biener wrote: > > On Mon, Mar 4, 2024 at 9:40 PM Ken Matsui wrote: > > > > (x - y) CMP 0 is equivalent to x CMP y where x and y are signed > > integers and CMP is <, <=, >, or >=. Similarly, 0 CMP (x - y) is > > equivalent to y CMP x. As reported in PR

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #19 from Uroš Bizjak --- (In reply to Jan Hubicka from comment #18) > But the problem here is more that optab initializations happens only at > the optimization_node changes and not if we switch from hot function to > cold? I think

[Bug c++/114237] New: GCC emits no narrowing conversion warning when call is made indirectly through std::invoke

2024-03-05 Thread jlame646 at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114237 Bug ID: 114237 Summary: GCC emits no narrowing conversion warning when call is made indirectly through std::invoke Product: gcc Version: 14.0 Status: UNCONFIRMED

[Bug c++/104850] Instantiating a destructor for a template class too early, before the calling destructor is seen - rejects valid code

2024-03-05 Thread benni.buch at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104850 --- Comment #7 from Benjamin Buch --- Sorry wrong number; Bug 114076

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread hubicka at ucw dot cz via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #18 from Jan Hubicka --- optimize_function_for_size_p is not really affected by LTO or non-LTO. It does take into account node->count and node->frequency, which is updated during IPA, so it may change between early opts and late

[Bug c++/104850] Instantiating a destructor for a template class too early, before the calling destructor is seen - rejects valid code

2024-03-05 Thread benni.buch at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104850 Benjamin Buch changed: What|Removed |Added CC||benni.buch at gmail dot com ---

[Bug c++/114076] list-initialization with assignment expression triggers wrong template instanciation

2024-03-05 Thread benni.buch at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114076 --- Comment #3 from Benjamin Buch --- I [created an overview](https://stackoverflow.com/a/78101462/4821621) with all cases that currently work on StackOverflow. I think that all these cases should be valid. For a properly formated version with

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #17 from Jakub Jelinek --- Either change those too, or the splitter needs some variant what to do if there is a mismatch. Though, optimize_size implies optimize_function_for_size_p (cfun), so if a named pattern uses && optimize_size

[Bug tree-optimization/114206] [11/12/13/14 Regression] recursive function call vs local variable addresses

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114206 Jakub Jelinek changed: What|Removed |Added CC||hubicka at gcc dot gnu.org,

Re: [PATCH v2] LoongArch: Allow s9 as a register alias

2024-03-05 Thread chenglulu
在 2024/3/5 下午7:50, Xi Ruoyao 写道: The psABI allows using s9 as an alias of r22. gcc/ChangeLog: * config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add s9 as an alias of r22. --- v1 -> v2: Add a test case. Ok for trunk? Ok. Thanks!

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #16 from Uroš Bizjak --- (In reply to Jakub Jelinek from comment #15) > Seems various backends use e.g. optimize_size or !optimize_size or optimize > > 0 etc. in > insn-flags.h, so perhaps change optimize_function_for_size_p (cfun)

Re: CI for "Option handling: add documentation URLs"

2024-03-05 Thread Mark Wielaard
Hi, On Mon, 2024-03-04 at 08:48 -0500, David Malcolm wrote: > > I have now regenerated the patch to also include the new avr mfuse- > > add change. It would be nice to get this committed so we can turn on the > > automatic checker. > > Please go ahead with that. I committed that patch, but was

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #15 from Jakub Jelinek --- Yeah, indeed, the optabs enable flags are cached in the optimization node, so it is ok to check the optimization flags in there, or target flags as well, but optimize_function_for_*_p is not, because it

[Bug tree-optimization/114236] New: introduce unnecessary store operation when unrolling a loop

2024-03-05 Thread absoler at smail dot nju.edu.cn via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114236 Bug ID: 114236 Summary: introduce unnecessary store operation when unrolling a loop Product: gcc Version: 13.2.0 Status: UNCONFIRMED Severity: normal

[PATCH v2] LoongArch: Allow s9 as a register alias

2024-03-05 Thread Xi Ruoyao
The psABI allows using s9 as an alias of r22. gcc/ChangeLog: * config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add s9 as an alias of r22. --- v1 -> v2: Add a test case. Ok for trunk? gcc/config/loongarch/loongarch.h | 1 +

[PATCH v3] testsuite: Add a test case for negating FP vectors containing zeros

2024-03-05 Thread Xi Ruoyao
Recently I've fixed two wrong FP vector negate implementation which caused wrong sign bits in zeros in targets (r14-8786 and r14-8801). To prevent a similar issue from happening again, add a test case. Tested on x86_64 (with SSE2, AVX, AVX2, and AVX512F), AArch64, MIPS (with MSA), LoongArch

[Bug rtl-optimization/114211] [13 Regression] wrong code with -O -fno-tree-coalesce-vars since r13-1907

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114211 --- Comment #9 from Uroš Bizjak --- Noticed this in passing: --> movq%rcx, %rdx addqv(%rip), %rax adcqv+8(%rip), %rdx vmovq %rax, %xmm1 vpinsrq $1, %rdx, %xmm1, %xmm0 We could use %rcx instead

[Bug tree-optimization/112307] Segmentation fault with -O1 -fcode-hoisting

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112307 Richard Biener changed: What|Removed |Added CC||redi at gcc dot gnu.org --- Comment

[Bug tree-optimization/112303] [14 Regression] ICE on valid code at -O3 on x86_64-linux-gnu: verify_flow_info failed since r14-3459-g0c78240fd7d519

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112303 --- Comment #9 from Jakub Jelinek --- Still reproduceable with --- gcc/tree-scalar-evolution.cc +++ gcc/tree-scalar-evolution.cc @@ -3881,7 +3881,7 @@ final_value_replacement_loop (class loop *loop) /* Propagate constants immediately,

[patch,avr,applied] Improve output of insn "*insv.any_shift.".

2024-03-05 Thread Georg-Johann Lay
Applied Roger's proposed improvements with some changes: Lengthy code is more convenient in avr.cc than in an insn output function, and it makes it easy to work out the exact instruction length. Moreover, the code can handle shifts with offset zero (cases of *and3 insns). Passed with no new

Updated invitation: gccrs weekly @ Mon 18 Mar 2024 11am - 11:30am (GMT+1) (gcc-rust@gcc.gnu.org)

2024-03-05 Thread Arthur Cohen
BEGIN:VCALENDAR PRODID:-//Google Inc//Google Calendar 70.9054//EN VERSION:2.0 CALSCALE:GREGORIAN METHOD:REQUEST BEGIN:VTIMEZONE TZID:Europe/Paris X-LIC-LOCATION:Europe/Paris BEGIN:DAYLIGHT TZOFFSETFROM:+0100 TZOFFSETTO:+0200 TZNAME:CEST DTSTART:19700329T02

Invitation: gccrs weekly @ Mon 18 Mar 2024 11am - 11:15am (GMT+1) (gcc-rust@gcc.gnu.org)

2024-03-05 Thread Arthur Cohen
BEGIN:VCALENDAR PRODID:-//Google Inc//Google Calendar 70.9054//EN VERSION:2.0 CALSCALE:GREGORIAN METHOD:REQUEST BEGIN:VTIMEZONE TZID:Europe/Paris X-LIC-LOCATION:Europe/Paris BEGIN:DAYLIGHT TZOFFSETFROM:+0100 TZOFFSETTO:+0200 TZNAME:CEST DTSTART:19700329T02

[Bug fortran/114235] New: Object undefined is specific procedure for generic overload in abstract type

2024-03-05 Thread Bader at lrz dot de via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114235 Bug ID: 114235 Summary: Object undefined is specific procedure for generic overload in abstract type Product: gcc Version: 13.1.0 Status: UNCONFIRMED

[Bug tree-optimization/114231] [12/13 Regression] ICE when building libjxl

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114231 Richard Biener changed: What|Removed |Added Summary|[12/13/14 regression] ICE |[12/13 Regression] ICE when

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenther at suse dot de via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #14 from rguenther at suse dot de --- On Tue, 5 Mar 2024, jakub at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 > > Jakub Jelinek changed: > >What|Removed

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #13 from Uroš Bizjak --- (In reply to Jakub Jelinek from comment #12) > Still, it would be nice to understand what changed > optimize_function_for_size_p (cfun) > after IPA. Is something adjusting node->count or node->frequency? >

[Bug tree-optimization/114231] [12/13/14 regression] ICE when building libjxl

2024-03-05 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114231 --- Comment #13 from GCC Commits --- The master branch has been updated by Richard Biener : https://gcc.gnu.org/g:7890836de20912bd92afaf5abbeaf9d8c5b86542 commit r14-9316-g7890836de20912bd92afaf5abbeaf9d8c5b86542 Author: Richard Biener Date:

[Bug tree-optimization/114234] New: [14 Regression] verify_ssa failure with early-break vectorisation

2024-03-05 Thread rsandifo at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114234 Bug ID: 114234 Summary: [14 Regression] verify_ssa failure with early-break vectorisation Product: gcc Version: 14.0 Status: UNCONFIRMED Keywords:

[PATCH] tree-optimization/114231 - use patterns for BB SLP discovery root stmts

2024-03-05 Thread Richard Biener
The following makes sure to use recognized patterns when vectorizing roots during BB SLP discovery. We need to apply those late since during root discovery we've not yet done pattern recognition. All parts of the vectorizer assume patterns get used, for the testcase we mix this up when doing live

[Bug tree-optimization/113441] [14 Regression] Fail to fold the last element with multiple loop since g:2efe3a7de0107618397264017fb045f237764cc7

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113441 --- Comment #44 from Richard Biener --- (In reply to Richard Sandiford from comment #42) > Created attachment 57605 [details] > proof-of-concept patch to suppress peeling for gaps > > How about the attached? It records whether all accesses

RE: RE:[PATCH 3/5] RISC-V: Support vmfxx.vf for autovec comparison of vec and imm

2024-03-05 Thread Demin Han
OK, I will solve the comparison operation first and then do some check over other operations. Regards, Demin From: juzhe.zh...@rivai.ai Sent: 2024年3月5日 17:02 To: Demin Han ; gcc-patches Cc: kito.cheng ; pan2.li ; jeffreyalaw ; Robin Dapp ; richard.sandiford Subject: Re: RE:[PATCH 3/5]

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #11 from Richard Biener --- (In reply to Uroš Bizjak from comment #10) > Created attachment 57612 [details] > Prototype patch > > Let's try this approach. Yeah, I guess !TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p

[Bug rtl-optimization/101523] Huge number of combine attempts

2024-03-05 Thread sarah.kriesch at opensuse dot org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101523 --- Comment #15 from Sarah Julia Kriesch --- (In reply to Segher Boessenkool from comment #13) > (In reply to Sarah Julia Kriesch from comment #12) > A bigger case of what? What do you mean? Not only one software package is affected by this

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 Uroš Bizjak changed: What|Removed |Added Last reconfirmed||2024-03-05 Assignee|unassigned

Re: [PATCH v2] testsuite, arm: Fix testcase arm/pr112337.c to check for the options first

2024-03-05 Thread Saurabh Jha
Ping On 2/19/2024 10:11 AM, Saurabh Jha wrote: On 2/9/2024 2:57 PM, Richard Earnshaw (lists) wrote: On 30/01/2024 17:07, Saurabh Jha wrote: Hey, Previously, this test was added to fix this bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112337. However, it did not check the compilation

[Bug tree-optimization/114231] [12/13/14 regression] ICE when building libjxl

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114231 --- Comment #12 from Richard Biener --- So the immediate reason is that between analysis and transform whether we consider the shift vectorizable changes. That's because we code generated a live lane which ended up changing operands in stmts

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #9 from Uroš Bizjak --- (In reply to Richard Biener from comment #8) > > grep optimize_ insn-flags.h | wc -l > 14 > > so it's not very many standard patterns that would be affected. I'd say > using these kind of flags on standard

Re: [PATCH v2] LoongArch: Fix inconsistent description in *sge_

2024-03-05 Thread Xi Ruoyao
On Tue, 2024-03-05 at 16:05 +0800, Guo Jie wrote: > The constraint of op[1] is inconsistent with the output template. > > gcc/ChangeLog: > > * config/loongarch/loongarch.md > (define_insn "*sge_"): Fix inconsistency > error. > > --- > Update in v2: >     Remove useless support

[Bug target/114116] [14 Regression] Broken backtraces in bootstrapped x86_64 gcc

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114116 Jakub Jelinek changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug middle-end/114157] during GIMPLE pass: bitintlower ICE: in lower_stmt, at gimple-lower-bitint.cc:5577 with -O with _BitInt(256) / vector memmove

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114157 Jakub Jelinek changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug rtl-optimization/114211] [13 Regression] wrong code with -O -fno-tree-coalesce-vars since r13-1907

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114211 Jakub Jelinek changed: What|Removed |Added Summary|[13/14 Regression] wrong|[13 Regression] wrong code

[Bug rtl-optimization/114211] [13/14 Regression] wrong code with -O -fno-tree-coalesce-vars since r13-1907

2024-03-05 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114211 --- Comment #7 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:aed445b0fd0c7ed16124c61e7eb732992426f103 commit r14-9315-gaed445b0fd0c7ed16124c61e7eb732992426f103 Author: Jakub Jelinek Date:

Re: About gsoc

2024-03-05 Thread Jonathan Wakely via Gcc
On Tue, 5 Mar 2024 at 09:31, Jonathan Wakely wrote: > > On Tue, 5 Mar 2024 at 01:59, Dave Blanchard wrote: > > > > On Mon, 4 Mar 2024 10:06:34 + > > Jonathan Wakely via Gcc wrote: > > > > > On Mon, 4 Mar 2024 at 06:58, mokshagnareddyc--- via Gcc > > > wrote: > > > > > > > > Hello sir/mam

[Bug middle-end/114157] during GIMPLE pass: bitintlower ICE: in lower_stmt, at gimple-lower-bitint.cc:5577 with -O with _BitInt(256) / vector memmove

2024-03-05 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114157 --- Comment #2 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:9d2bc5def30830e685ae2e3c2f4d07b967e2be63 commit r14-9314-g9d2bc5def30830e685ae2e3c2f4d07b967e2be63 Author: Jakub Jelinek Date:

Re: About gsoc

2024-03-05 Thread Jonathan Wakely via Gcc
On Tue, 5 Mar 2024 at 01:59, Dave Blanchard wrote: > > On Mon, 4 Mar 2024 10:06:34 + > Jonathan Wakely via Gcc wrote: > > > On Mon, 4 Mar 2024 at 06:58, mokshagnareddyc--- via Gcc > > wrote: > > > > > > Hello sir/mam > > > I am mokshagna reddy from Mahindra university and i am currently in

[Bug target/114116] [14 Regression] Broken backtraces in bootstrapped x86_64 gcc

2024-03-05 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114116 --- Comment #15 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:8ee6d13e32279faf9ef4fd8eabfba0adfca0dfb9 commit r14-9313-g8ee6d13e32279faf9ef4fd8eabfba0adfca0dfb9 Author: Jakub Jelinek Date:

RE: [PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC]

2024-03-05 Thread Li, Pan2
Committed, thanks Juzhe. Pan From: juzhe.zh...@rivai.ai Sent: Tuesday, March 5, 2024 5:15 PM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; Wang, Yanzhang ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC] LGTM. Thanks for clean up.

[Bug rtl-optimization/114190] [14 regression] Wrong code with -O2 -fno-dce -fharden-compares -mvpclmulqdq --param=max-rtl-if-conversion-unpredictable-cost=136

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114190 Jakub Jelinek changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |jakub at gcc dot gnu.org

Re: [PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC]

2024-03-05 Thread juzhe.zh...@rivai.ai
LGTM. Thanks for clean up. juzhe.zh...@rivai.ai From: pan2.li Date: 2024-03-05 16:59 To: gcc-patches CC: juzhe.zhong; kito.cheng; yanzhang.wang; Pan Li Subject: [PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC] From: Pan Li Cleanup mode_size related code which is not

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #8 from Richard Biener --- > grep optimize_ insn-flags.h | wc -l 14 so it's not very many standard patterns that would be affected. I'd say using these kind of flags on standard patterns is at least fragile?

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 Richard Biener changed: What|Removed |Added Target Milestone|--- |14.0 CC|

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #6 from Richard Biener --- It's possibly on a cold path (yes, optimize_function_for_size_p should be stable). Note though that optimize_function_for_size_p might in theory change between vectorization and RTL expansion, so maybe

Re: RE:[PATCH 3/5] RISC-V: Support vmfxx.vf for autovec comparison of vec and imm

2024-03-05 Thread juzhe.zh...@rivai.ai
Yes. I think we are lacking some combine patterns to do all vector-scalar combinations. If you are interested at this topic, you can do some investigations on that (I believe currently no body works on it for now). I bet we should add some patterns for late-combine PASS for example: (set (plus

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #5 from Uroš Bizjak --- Huh, it looks that optimize_function_for_size_p (cfun) is not stable during LTO?! Using: --cut here-- diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 2856ae6ffef..80114494b0b 100644 ---

[PATCH v1] RISC-V: Cleanup unused code in riscv_v_adjust_bytesize [NFC]

2024-03-05 Thread pan2 . li
From: Pan Li Cleanup mode_size related code which is not used anymore. Below tests are passed for this patch. * The RVV fully regresssion test. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_v_adjust_bytesize): Cleanup unused mode_size related code. Signed-off-by: Pan Li ---

[Bug tree-optimization/114108] [14 regression] ICE when building opencv-4.8.1 (error: type mismatch in binary expression) since r14-1833

2024-03-05 Thread belagod at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114108 --- Comment #8 from Tejas Belagod --- I find this transformation a bit odd: ... pr114108.c:11:21: note: add new stmt: vect_patt_32.15_181 = .ABD (vect__3.11_177, vect__7.14_180); pr114108.c:11:21: note: -->vectorizing statement: patt_31

[Bug tree-optimization/114231] [12/13/14 regression] ICE when building libjxl

2024-03-05 Thread rguenth at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114231 Richard Biener changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rguenth at gcc dot gnu.org

Re: [PATCH] bitint: Handle BIT_FIELD_REF lowering [PR114157]

2024-03-05 Thread Richard Biener
On Tue, 5 Mar 2024, Jakub Jelinek wrote: > On Tue, Mar 05, 2024 at 09:27:22AM +0100, Richard Biener wrote: > > On Tue, 5 Mar 2024, Jakub Jelinek wrote: > > > The following patch adds support for BIT_FIELD_REF lowering with > > > large/huge _BitInt lhs. BIT_FIELD_REF requires mode argument first

[PATCH, V3] ctf: fix incorrect CTF for multi-dimensional array types

2024-03-05 Thread Indu Bhagat
From: Cupertino Miranda [Changes from V2] - Fixed aarch64 new FAILs reported by Linaro CI. - Fixed typos and other nits pointed out in V2. [End of changes from V2] PR debug/114186 DWARF DIEs of type DW_TAG_subrange_type are linked together to represent the information about the subsequent

Re: [PATCH] lower-subreg: Fix ROTATE handling [PR114211]

2024-03-05 Thread Jakub Jelinek
On Tue, Mar 05, 2024 at 09:29:38AM +0100, Richard Biener wrote: > I wonder if we need to care about extra temporaries on RTL before > RA, thus whether always using a temporary would be OK? I'd still need to do the resolve_reg_p check, otherwise if it is e.g. a memory, the copying to temporary

Re: [PATCH] bitint: Handle BIT_FIELD_REF lowering [PR114157]

2024-03-05 Thread Jakub Jelinek
On Tue, Mar 05, 2024 at 09:27:22AM +0100, Richard Biener wrote: > On Tue, 5 Mar 2024, Jakub Jelinek wrote: > > The following patch adds support for BIT_FIELD_REF lowering with > > large/huge _BitInt lhs. BIT_FIELD_REF requires mode argument first > > operand, so the operand shouldn't be any huge

Re: [PATCH v2] Draft|Internal-fn: Introduce internal fn saturation US_PLUS

2024-03-05 Thread Richard Biener
On Tue, Mar 5, 2024 at 8:09 AM Li, Pan2 wrote: > > Thanks Richard for comments. > > > I do wonder what the existing usadd patterns with integer vector modes > > in various targets do? > > Those define_insn will at least not end up in the optab set I guess, > > so they must end up > > being either

RE: Re:[PATCH 3/5] RISC-V: Support vmfxx.vf for autovec comparison of vec and imm

2024-03-05 Thread Demin Han
Hi, I applied the mentioned last_combine patch(https://patchwork.ozlabs.org/project/gcc/patch/mptbka7em9w@arm.com/). And did some initial tests. Found that: 1. Float vector-scalar and vector-imm are OK 2. Integer vector-scalar is OK 3. Integer vector-imm(e.g. a[i] > 16) is

Re: [PATCH] middle-end/113680 - Optimize (x - y) CMP 0 as x CMP y

2024-03-05 Thread Richard Biener
On Mon, Mar 4, 2024 at 9:40 PM Ken Matsui wrote: > > (x - y) CMP 0 is equivalent to x CMP y where x and y are signed > integers and CMP is <, <=, >, or >=. Similarly, 0 CMP (x - y) is > equivalent to y CMP x. As reported in PR middle-end/113680, this > equivalence does not hold for types other

Re: [PATCH] lower-subreg: Fix ROTATE handling [PR114211]

2024-03-05 Thread Richard Biener
On Tue, 5 Mar 2024, Jakub Jelinek wrote: > Hi! > > On the following testcase, we have > (insn 10 7 11 2 (set (reg/v:TI 106 [ h ]) > (rotate:TI (reg/v:TI 106 [ h ]) > (const_int 64 [0x40]))) "pr114211.c":8:5 1042 > {rotl64ti2_doubleword} > (nil)) > before subreg1 and the

Re: [PATCH] bitint: Handle BIT_FIELD_REF lowering [PR114157]

2024-03-05 Thread Richard Biener
On Tue, 5 Mar 2024, Jakub Jelinek wrote: > Hi! > > The following patch adds support for BIT_FIELD_REF lowering with > large/huge _BitInt lhs. BIT_FIELD_REF requires mode argument first > operand, so the operand shouldn't be any huge _BitInt. > If we only access limbs from inside of

[Bug target/114232] [14 regression] ICE when building rr-5.7.0 with LTO on x86

2024-03-05 Thread ubizjak at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114232 --- Comment #4 from Uroš Bizjak --- (In reply to Sam James from comment #0) > (insn 160 159 161 26 (parallel [ > (set (reg:V2QI 250 [ vect_patt_207.470_183 ]) > (minus:V2QI (reg:V2QI 251) >

[Bug tree-optimization/113441] [14 Regression] Fail to fold the last element with multiple loop since g:2efe3a7de0107618397264017fb045f237764cc7

2024-03-05 Thread rguenther at suse dot de via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113441 --- Comment #43 from rguenther at suse dot de --- On Mon, 4 Mar 2024, rsandifo at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113441 > > --- Comment #41 from Richard Sandiford --- > (In reply to Richard Biener from

[PATCH v2] LoongArch: Fix inconsistent description in *sge_

2024-03-05 Thread Guo Jie
The constraint of op[1] is inconsistent with the output template. gcc/ChangeLog: * config/loongarch/loongarch.md (define_insn "*sge_"): Fix inconsistency error. --- Update in v2: Remove useless support for op[1] is const_imm12_operand. ---

[Bug rtl-optimization/114190] [14 regression] Wrong code with -O2 -fno-dce -fharden-compares -mvpclmulqdq --param=max-rtl-if-conversion-unpredictable-cost=136

2024-03-05 Thread jakub at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114190 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

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