On Tue, 1 Jun 2021 at 08:06, apinski--- via Gcc-patches
wrote:
>
> From: Andrew Pinski
>
> This is the first of series of patches to simplify phi-opt
> to use match and simplify in many cases. This simplification
> will more things to optimize.
>
> This is what Richard requested in
>
-vhadd-1.c, I couldn't write a test able to use Neon
vectorization with 64-bit vectors: we default to
-mvectorize-with-neon-quad, and attempts to use
-mvectorize-with-neon-double resulted in much worse code, which this
patch does not aim at improving.
2021-05-31 Christophe Lyon
gcc
On Sat, 29 May 2021 at 10:03, Jakub Jelinek via Gcc-patches
wrote:
>
> On Fri, May 28, 2021 at 12:59:20AM +0200, Tobias Burnus wrote:
> > * gfortran.dg/gomp/depend-iterator-1.f90: New test.
> > * gfortran.dg/gomp/depend-iterator-2.f90: New test.
>
> Something I've missed during the
At the moment I sent that patch I remembered that Victor is also
working on vabs, so sorry if this conflicts with his work.
On Thu, 27 May 2021 at 13:21, Christophe Lyon
wrote:
>
> This patch adds support for auto-vectorization of absolute value
> computation using vabs.
>
> W
with the new expander with the same name.
2021-05-26 Christophe Lyon
gcc/
* config/arm/mve.md (mve_vabsq_f): Use 'abs' instead of unspec.
(mve_vabsq_s): Likewise.
* config/arm/neon.md (abs2): Rename to neon_abs2.
* config/arm/unspecs.md (VABSQ_F, VABSQ_S
Hi,
On Tue, 25 May 2021 at 18:17, Aldy Hernandez via Gcc-patches
wrote:
>
> Adjustments per discussion.
>
> OK pending tests?
>
The xfail removal causes failures on 32 bits platforms (eg arm, or
aarch64 with -mabi=ilp32):
FAIL: gcc.dg/Wstringop-overflow-55.c pr? (test for warnings, line 86)
On Wed, 26 May 2021 at 11:32, Richard Sandiford
wrote:
>
> Christophe Lyon writes:
> > This patch adds support for the reduc_plus_scal optab with MVE, which
> > maps to the vaddv instruction.
> >
> > It moves the reduc_plus_scal_ expander from neon.md to
>
q3,
but truncate with uxtbr0, r0.
2021-05-25 Christophe Lyon
gcc/
* config/arm/mve.md (mve_vaddvq_): Prefix with '@'.
* config/arm/neon.md (reduc_plus_scal_): Move to ..
* config/arm/vec-common.md: .. here. Add support for MVE.
gcc/testsu
ping?
On Mon, 17 May 2021 at 11:55, Christophe Lyon
wrote:
>
> ping?
>
> On Tue, 4 May 2021 at 16:57, Christophe Lyon
> wrote:
> >
> > On Tue, 4 May 2021 at 14:03, Andre Vieira (lists)
> > wrote:
> > >
> > > Hi Christophe,
> > >
ping?
On Mon, 17 May 2021 at 11:55, Christophe Lyon
wrote:
>
> ping?
>
> On Fri, 30 Apr 2021 at 16:09, Christophe Lyon
> wrote:
> >
> > This patch enables MVE vld2/vst2 instructions for auto-vectorization.
> > We move the existing expanders from neon.md and
On Thu, 20 May 2021 at 10:52, Kewen.Lin via Gcc-patches
wrote:
>
> on 2021/5/19 下午6:01, Richard Biener wrote:
> > On Wed, May 19, 2021 at 11:47 AM Kewen.Lin wrote:
> >>
> >> Hi Richi,
> >>
> >> on 2021/5/19 下午4:15, Richard Biener wrote:
> >>> On Wed, May 19, 2021 at 8:20 AM Kewen.Lin wrote:
>
desourcery.com
commit d0e79f75dc3723231609f24e2840ac5858a652e1
Author: Christophe Lyon
Date: Wed May 19 20:28:08 2021 +
c: Add support for __FILE_NAME__ macro (PR c/42579)
The toolchain provided by ST for stm32 has had support for
__FILENAME__ for a while, but clang/llvm has recently implemented
support
On Wed, 19 May 2021 at 16:40, Richard Earnshaw
wrote:
>
>
>
> On 19/05/2021 09:10, Christophe Lyon via Gcc-patches wrote:
> > Some targets (eg arm-none-uclinuxfdpiceabi) do not support Thumb-1,
> > and since the testcase forces -march=armv8-m.base, we need to check
On Wed, 19 May 2021 at 13:29, Christophe Lyon
wrote:
>
> On Wed, 19 May 2021 at 13:13, Richard Biener wrote:
> >
> > On Wed, 19 May 2021, Jakub Jelinek wrote:
> >
> > > On Wed, May 19, 2021 at 11:09:19AM +0200, Jakub Jelinek via Gcc-patches
> > > wr
On Wed, 19 May 2021 at 13:13, Richard Biener wrote:
>
> On Wed, 19 May 2021, Jakub Jelinek wrote:
>
> > On Wed, May 19, 2021 at 11:09:19AM +0200, Jakub Jelinek via Gcc-patches
> > wrote:
> > > On Wed, May 19, 2021 at 10:15:53AM +0200, Christophe Lyon via Gcc-patch
har* mystring_filename = "mysrc.c";
char* mystring_base_file = "mydir/mysrc.c";
2021-05-19 Christophe Lyon
Torbjörn Svensson
PR c/42579
libcpp/
* include/cpplib.h (cpp_builtin_type): Add BT_FILE_NAME entry.
* init.c (builtin_array): Likewi
On Tue, 18 May 2021 at 09:42, Jakub Jelinek via Gcc-patches
wrote:
>
> Hi!
>
> As mentioned earlier, spaceship_replacement didn't optimize partial_ordering
> >= 0 comparisons, because the possible values are -1, 0, 1, 2 and the
> >= comparison is implemented as (res & 1) == res to choose the 0
Some targets (eg arm-none-uclinuxfdpiceabi) do not support Thumb-1,
and since the testcase forces -march=armv8-m.base, we need to check
whether this option is actually supported.
Using dg-add-options arm_arch_v8m_base ensure that we pass -mthumb as
needed too.
2021-05-19 Christophe Lyon
On Mon, 17 May 2021 at 12:35, Kyrylo Tkachov wrote:
>
>
>
> > -Original Message-
> > From: Gcc-patches On Behalf Of
> > Christophe Lyon via Gcc-patches
> > Sent: 05 May 2021 15:08
> > To: Andre Simoes Dias Vieira
> > Cc: gcc Patches
> &g
ping?
On Tue, 4 May 2021 at 16:57, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 14:03, Andre Vieira (lists)
> wrote:
> >
> > Hi Christophe,
> >
> > The series LGTM but you'll need the approval of an arm port maintainer
> > before committing. I only di
ping?
On Fri, 30 Apr 2021 at 16:09, Christophe Lyon
wrote:
>
> This patch enables MVE vld2/vst2 instructions for auto-vectorization.
> We move the existing expanders from neon.md and enable them for MVE,
> calling the respective emitter.
>
> 2021-03-12 Christophe Lyon
ping?
On Wed, 5 May 2021 at 16:09, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 19:03, Christophe Lyon
> wrote:
> >
> > On Tue, 4 May 2021 at 15:43, Christophe Lyon
> > wrote:
> > >
> > > On Tue, 4 May 2021 at 13:48, Andre Vieira (lists)
&
ping?
On Wed, 5 May 2021 at 16:08, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 15:41, Christophe Lyon
> wrote:
> >
> > On Tue, 4 May 2021 at 13:29, Andre Vieira (lists)
> > wrote:
> > >
> > > Hi Christophe,
> > >
> >
ping?
On Mon, 10 May 2021 at 13:22, Christophe Lyon
wrote:
>
> Ping?
>
> On Fri, 30 Apr 2021 at 16:06, Christophe Lyon
> wrote:
> >
> > This patch adds a test for the scalar mode of vadd, precisely noting
> > that we do not yet use the T2 variants of vadd,
ping?
On Mon, 10 May 2021 at 13:22, Christophe Lyon
wrote:
>
> Ping?
>
> On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
> wrote:
> >
> > Support for vadd has been present for a while, but it was lacking a
> > test.
> >
> > 2021-04-22 Ch
ping?
On Mon, 10 May 2021 at 13:22, Christophe Lyon
wrote:
>
> Ping?
>
> On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
> wrote:
> >
> > Use a template macro to factorize the existing test functions.
> >
> > This patch also adds a version to check subtracti
ping?
On Mon, 10 May 2021 at 13:22, Christophe Lyon
wrote:
>
> Ping?
>
> On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
> wrote:
> >
> > Vector right shifts by immediate use vshr, while right shifts by
> > vectors instead use vneg and vshl.
> >
>
ping?
On Fri, 30 Apr 2021 at 16:22, Christophe Lyon
wrote:
>
> ping?
>
> On Wed, 21 Apr 2021 at 22:48, Christophe Lyon
> wrote:
> >
> > The acle/saturation.c test uses __[su]sat() and
> > __saturation_occurred() intrinsics but __[su]sat() are defined in
>
> Is it OK for trunk?
>
> OK.
>
> Richard.
>
Hi,
As the new test uses -fopenmp, it fails on targets that do not support it.
I've committed the attached patch to skip the test in such cases.
Christophe
> >
> > Thanks
> > Bernd.
> >
commit b050cf6a4d9c30
on the testsuite results.
2021-05-12 Christophe Lyon
gcc/
* config/arm/arm.h (CPP_SPEC): Remove error message about
-mlittle-endian/-mbig-endian conflict.
---
gcc/config/arm/arm.h | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/gcc/config/arm/arm.h b
On Mon, 10 May 2021 at 18:32, Richard Earnshaw
wrote:
>
>
>
> On 22/04/2021 08:01, Christophe Lyon via Gcc-patches wrote:
> > arm.h has had this error message since 1997, and was never updated to
> > take softfp into account. Anyway, it seems it was useful long ago, but
&g
On Mon, 10 May 2021 at 13:50, Kyrylo Tkachov wrote:
>
>
>
> > -Original Message-
> > From: Gcc-patches On Behalf Of
> > Christophe Lyon via Gcc-patches
> > Sent: 30 April 2021 15:06
> > To: gcc-patches@gcc.gnu.org
> > Subject: [PATCH
Ping?
On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
wrote:
>
> Vector right shifts by immediate use vshr, while right shifts by
> vectors instead use vneg and vshl.
>
> This patch adds the corresponding scan-assembler-times that were
> missing.
>
> 2021-04-22 Christoph
Ping?
On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
wrote:
>
> Use a template macro to factorize the existing test functions.
>
> This patch also adds a version to check subtraction with __fp16 type.
>
> 2021-04-26 Christophe Lyon
>
> gcc/testsuite/
>
Ping?
On Tue, 27 Apr 2021 at 13:32, Christophe Lyon
wrote:
>
> Support for vadd has been present for a while, but it was lacking a
> test.
>
> 2021-04-22 Christophe Lyon
>
> gcc/testsuite/
> * gcc.target/arm/simd/mve-vadd-1.c: New.
> ---
> gcc
Ping?
On Fri, 30 Apr 2021 at 16:06, Christophe Lyon
wrote:
>
> This patch adds a test for the scalar mode of vadd, precisely noting
> that we do not yet use the T2 variants of vadd, which take a scalar as
> final argument.
>
> 2021-04-22 Christophe Lyon
>
&g
Ping?
On Fri, 30 Apr 2021 at 16:06, Christophe Lyon
wrote:
>
> Support for vmul has been present for a while, but it was lacking a
> test for the scalar variant.
>
> This patch adds one, precisely noting that we do not yet use the T2
> variants of vmul, which take a scalar
Ping?
On Fri, 30 Apr 2021 at 16:06, Christophe Lyon
wrote:
>
> This patchs adds a test similar to mve-vsub_1.c, but operates on a
> scalar as second argument. For the moment we do not select the T2 vsub
> variant operating on a scalar final argument, and we use vadd of the
> opp
Ping for the series?
On Fri, 30 Apr 2021 at 16:09, Christophe Lyon
wrote:
>
> There is no need to have a signed and an unsigned version of these
> builtins. This is similar to what we do for Neon in arm_neon.h.
> This mechanical patch enables later cleanup patches.
>
> 2021
On Wed, 5 May 2021 at 09:56, Richard Biener wrote:
>
> This makes sure to follow SSA edges when folding eliminated stmts.
> This reaps the same benefit as forwprop folding all stmts, not
> waiting for one to produce copysign in the new testcase.
>
> Bootstrapped on x86_64-unknown-linux-gnu,
On Wed, 5 May 2021 at 19:39, Tamar Christina via Gcc-patches
wrote:
>
> Hi All,
>
> This adds optabs implementing usdot_prod.
>
> The following testcase:
>
> #define N 480
> #define SIGNEDNESS_1 unsigned
> #define SIGNEDNESS_2 signed
> #define SIGNEDNESS_3 signed
> #define SIGNEDNESS_4 unsigned
>
On Tue, 4 May 2021 at 19:03, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 15:43, Christophe Lyon
> wrote:
> >
> > On Tue, 4 May 2021 at 13:48, Andre Vieira (lists)
> > wrote:
> > >
> > > It would be good to also add tests for NEON as you also
On Tue, 4 May 2021 at 15:41, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 13:29, Andre Vieira (lists)
> wrote:
> >
> > Hi Christophe,
> >
> > On 30/04/2021 15:09, Christophe Lyon via Gcc-patches wrote:
> > > Since MVE has a different set of vecto
The new test gcc.c-torture/execute/ieee/cdivchkld.c needs fmaxl(),
which may not be available, for instance on aarch64-elf with newlib.
As discussed in the PR, requiring c99_runtime enables to skip the test
in this case.
2021-05-04 Christophe Lyon
PR testsuite/100355
gcc
On Tue, 4 May 2021 at 15:43, Christophe Lyon wrote:
>
> On Tue, 4 May 2021 at 13:48, Andre Vieira (lists)
> wrote:
> >
> > It would be good to also add tests for NEON as you also enable auto-vec
> > for it. I checked and I do think the necessary 'neon_vc' pattern
Kind regards,
> Andre
>
> On 30/04/2021 15:09, Christophe Lyon via Gcc-patches wrote:
> > This patch enables MVE vld4/vst4 instructions for auto-vectorization.
> > We move the existing expanders from neon.md and enable them for MVE,
> > calling the respective emitter.
> &g
ch series, I've noticed a regression in
armv8_2-fp16-arith-1.c, because we now vectorize all the float16x[48]_t loops,
but we lose the fact that some FP comparisons can throw exceptions.
I'll have to revisit this patch.
Thanks,
Christophe
> On 30/04/2021 15:09, Christophe Lyon via
On Tue, 4 May 2021 at 13:29, Andre Vieira (lists)
wrote:
>
> Hi Christophe,
>
> On 30/04/2021 15:09, Christophe Lyon via Gcc-patches wrote:
> > Since MVE has a different set of vector comparison operators from
> > Neon, we have to update the expansion to take into
dg-do must come before dg-skip-if, this patch fixes this oversight in
these two tests.
Committed as obvious.
2021-05-03 Christophe Lyon
gcc/testsuite/
* gcc.target/aarch64/advsimd-intrinsics/vmla_float_not_fused.c:
Fix dg directives order.
* gcc.target/aarch64
ping?
On Wed, 21 Apr 2021 at 22:48, Christophe Lyon
wrote:
>
> The acle/saturation.c test uses __[su]sat() and
> __saturation_occurred() intrinsics but __[su]sat() are defined in
> acle.h if __ARM_FEATURE_SAT true, while __saturation_occurred()
> depends on __ARM_FEATURE_QBIT.
>
ping?
On Thu, 22 Apr 2021 at 09:01, Christophe Lyon
wrote:
>
> arm.h has had this error message since 1997, and was never updated to
> take softfp into account. Anyway, it seems it was useful long ago, but
> it is no longer needed since option parsing has been improved:
> -mfloat
ping?
On Thu, 22 Apr 2021 at 15:32, Christophe Lyon
wrote:
>
> The test requires an FPU, so use -march=armv7-a+fp -mfpu=auto instead
> of -march=armv7-a.
>
> We also remove dg-require-effective-target arm_fp_ok, but keep
> dg-add-options arm_fp: this enables the test t
This patch enables MVE vld4/vst4 instructions for auto-vectorization.
We move the existing expanders from neon.md and enable them for MVE,
calling the respective emitter.
2021-03-12 Christophe Lyon
gcc/
* config/arm/neon.md (vec_load_lanesxi)
(vec_store_lanexoi): Move
This patch enables MVE vld2/vst2 instructions for auto-vectorization.
We move the existing expanders from neon.md and enable them for MVE,
calling the respective emitter.
2021-03-12 Christophe Lyon
gcc/
* config/arm/neon.md (vec_load_lanesoi)
(vec_store_lanesoi): Move
.word 0
.word 0
.word 1
.word 1
.word 1
.word 1
For some reason emit_move_insn (zero, CONST0_RTX (cmp_mode)) produces
a pair of vldr instead of vmov.i32, qX, #0
2021-03-01 Christophe Lyon
gcc/
* config/arm/arm-protos.h
This patch adds __fp16 support to the previous patch that added vcmp
support with MVE. For this we update existing expanders to use VDQWH
iterator, and add a new expander vcond. In the
process we need to create suitable iterators, and update v_cmp_result
as needed.
2021-04-26 Christophe Lyon
This patch brings more unification in the vector comparison builtins,
by removing the useless 's' (signed) suffix since we no longer need
unsigned versions.
2021-03-01 Christophe Lyon
gcc/
* config/arm/arm_mve.h (__arm_vcmp*): Remove 's' suffix.
* config/arm
Like in the previous, we factorize the vcmp_*f* patterns to make
maintenance easier.
2021-03-12 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_FP_COMPARISONS): New.
* config/arm/mve.md (mve_vcmpq_f)
(mve_vcmpq_n_f): New, merge all vcmp_*f*
patterns
comparison operators than Neon,
so we have to introduce dedicated iterators.
2021-03-01 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_COMPARISONS): New.
(mve_cmp_op): New.
(mve_cmp_type): New.
* config/arm/mve.md (mve_vcmpq_): New, merge all
After the previous patch, we no longer need to emit the unsigned
variants of vcmpneq/vcmpeqq. This patch removes them as well as the
corresponding iterator entries.
2021-03-01 Christophe Lyon
gcc/
* config/arm/arm_mve_builtins.def (vcmpneq_u): Remove.
(vcmpneq_n_u
There is no need to have a signed and an unsigned version of these
builtins. This is similar to what we do for Neon in arm_neon.h.
This mechanical patch enables later cleanup patches.
2021-03-01 Christophe Lyon
gcc/
* config/arm/arm_mve.h (__arm_vcmpeq*u*, __arm_vcmpne*u
This patch adds a test for the scalar mode of vadd, precisely noting
that we do not yet use the T2 variants of vadd, which take a scalar as
final argument.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vadd-scalar-1: New.
---
.../gcc.target/arm/simd/mve
Support for vmul has been present for a while, but it was lacking a
test for the scalar variant.
This patch adds one, precisely noting that we do not yet use the T2
variants of vmul, which take a scalar as final argument.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target
This patchs adds a test similar to mve-vsub_1.c, but operates on a
scalar as second argument. For the moment we do not select the T2 vsub
variant operating on a scalar final argument, and we use vadd of the
opposite.
2021-04-26 Christophe Lyon
gcc/testsuite/
* gcc.target/arm
On Tue, 27 Apr 2021 at 14:04, Prathamesh Kulkarni
wrote:
>
> On Tue, 27 Apr 2021 at 17:02, Christophe Lyon via Gcc-patches
> wrote:
> >
> > Support for vadd has been present for a while, but it was lacking a
> > test.
> >
> > 2021-04-22 Christop
Support for vadd has been present for a while, but it was lacking a
test.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vadd-1.c: New.
---
gcc/testsuite/gcc.target/arm/simd/mve-vadd-1.c | 43 ++
1 file changed, 43 insertions
Use a template macro to factorize the existing test functions.
This patch also adds a version to check subtraction with __fp16 type.
2021-04-26 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vsub_1.c: Factorize and add __fp16 test.
---
gcc/testsuite/gcc.target/arm
Vector right shifts by immediate use vshr, while right shifts by
vectors instead use vneg and vshl.
This patch adds the corresponding scan-assembler-times that were
missing.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/simd/mve-vshr.c: Add more scan-assembler
When an iterator cannot be expanded, it is helpful to see the expanded
name which is causing problems. It would be better to also print the
current iterator value (which couldn't match), but I couldn't find
how.
2021-03-01 Christophe Lyon
gcc/
* genflags.c (gen_insn): Print
On Mon, 26 Apr 2021 at 10:55, Richard Sandiford
wrote:
>
> Christophe Lyon via Gcc-patches writes:
> > Some of the CMSE tests have 'dg-do run', but qemu-arm does not support
> > the privileged instructions involved; one has to use qemu-system-arm
> > for this
-linux-gnueabi when forcing -march=armv5t.
2021-04-22 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/unsigned-float.c: Remove arm_fp_ok, adjust
dg-options.
---
gcc/testsuite/gcc.target/arm/unsigned-float.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
On Wed, 21 Apr 2021 at 14:05, Richard Sandiford via Gcc-patches
wrote:
>
> Alex Coplan writes:
> > Hi Richard,
> >
> > On 15/04/2021 18:45, Richard Sandiford wrote:
> >> Looks good in general, but like you say, it's GCC 12 material.
> >
> > Thanks for the review. The attached patch addresses
for excess errors)
gcc.target/arm/pr95646.c check-function-bodies __acle_se_bar
gcc.target/arm/pr95646.c scan-assembler-not mov\tr9, r0
and all cmse tests
2021-04-22 Christophe Lyon
gcc/
* config/arm/arm.h (CPP_SPEC): Remove error message about
-mfloat-abi.
---
gcc/config
-04-22 Christophe Lyon
gcc/
* doc/sourcebuild.texi (arm_qbit_ok): Rename into...
(arm_sat_ok): ...this.
gcc/testsuite/
* gcc.target/arm/acle/saturation.c: Use arm_sat_ok effective
target.
* lib/target-supports.exp
On Mon, 19 Apr 2021 at 12:40, Tobias Burnus wrote:
>
> On 19.04.21 11:25, Tobias Burnus wrote:
> > On 19.04.21 10:48, Christophe Lyon wrote:
> >> The new test generates an ICE on aarch64-linux-gnu in the gcc-10 branch:
> > Looks as someone (like me) should backpor
On Fri, 16 Apr 2021 at 13:29, Richard Sandiford via Gcc-patches
wrote:
>
> Jakub Jelinek writes:
> > On Thu, Apr 15, 2021 at 08:51:03PM +0200, Jakub Jelinek via Gcc-patches
> > wrote:
> >> Fixed, thanks for catching that (and the "r" -> "=r"; I've
> >> actually tested a patch that didn't have
-04-19 Christophe Lyon
gcc/
* doc/sourcebuild.texi (arm_cmse_hw): Document.
gcc/testsuite/
* gcc.target/arm/cmse/bitfield-1.c: Remove dg-do.
* gcc.target/arm/cmse/bitfield-2.c: Likewise.
* gcc.target/arm/cmse/bitfield-3.c: Likewise
Hi,
On Fri, 9 Apr 2021 at 18:44, Hafiz Abid Qadeer wrote:
>
> Thanks for the review. Please see my comments below.
>
> On 09/04/2021 13:48, Tobias Burnus wrote:
> > Hi Abid,
> >
> > I think that's the same issue as https://gcc.gnu.org/PR98088
> > if so, please add 'PR middle-end/98088' to the
On Thu, 15 Apr 2021 at 17:19, Richard Sandiford via Gcc-patches
wrote:
>
> A lot of the SVE assembly tests are for generic-tuned SVE codegen
> and so can fail when run on a toolchain configured with --with-cpu.
>
> This could easily be solved by forcing -mtune=generic, like we already
> do for
Hi,
On Wed, 14 Apr 2021 at 02:20, Jason Merrill via Gcc-patches
wrote:
>
> PR49951 complained about the debugger jumping back to the declaration of a
> local variable when we run its destructor. That was fixed in 4.7, but broke
> again in 4.8. PR58123 fixed an inconsistency in the behavior,
On Tue, 13 Apr 2021 at 21:50, Martin Sebor via Gcc-patches
wrote:
>
> The issue has been fixed so r11-8161 just adds the test case:
>https://gcc.gnu.org/g:8084ab15a3e300e3b2c537e56e0f3a1b00778aec
>
Hi,
This new test fails on arm (and aarch64 with -mabi=ilp32):
XFAIL: gcc.dg/pr86058.c
ping?
On Tue, 6 Apr 2021 at 14:02, Christophe Lyon wrote:
>
> ping?
>
> On Mon, 29 Mar 2021 at 11:01, Christophe Lyon
> wrote:
> >
> > The previous change to this testcase missed the fact that the data may
> > be accessed via an anchor, depending on the optimiz
ping?
On Mon, 29 Mar 2021 at 11:01, Christophe Lyon
wrote:
>
> The previous change to this testcase missed the fact that the data may
> be accessed via an anchor, depending on the optimization level,
> leading to false failures.
>
> This patch restricts matching to upper1
On Thu, 1 Apr 2021 at 14:35, Richard Biener wrote:
>
>
> The first release candidate for GCC 10.3 is available from
>
> https://gcc.gnu.org/pub/gcc/snapshots/10.3.0-RC-20210401/
> ftp://gcc.gnu.org/pub/gcc/snapshots/10.3.0-RC-20210401/
>
> and shortly its mirrors. It has been generated from
Hi,
On Wed, 31 Mar 2021 at 11:38, Jan Hubicka wrote:
>
> Hi,
> in the dicussion on PR 99447 there was some confusion about release_body
> being used in context where call edges/references survive. This is not
> a valid use because it would leave stale pointers to ggc_freed memory
> location. By
On Wed, 31 Mar 2021 at 12:08, Richard Biener wrote:
>
> On Mon, Mar 29, 2021 at 1:40 PM Christophe Lyon via Gcc-patches
> wrote:
> >
> > The vectorizer has a very different effect with -mabi=ilp32, and
> > doesn't emit the expecte diagnostic, so this patch expects it
On Tue, 30 Mar 2021 at 14:59, Richard Earnshaw
wrote:
>
>
>
> On 30/03/2021 13:37, Christophe Lyon via Gcc-patches wrote:
> > When compiling with -mfloat-abi=hard -march=armv8.1-m.main+mve, we
> > want to emit Tag_ABI_VFP_args even though we are not emitting
> > f
On Mon, 29 Mar 2021 at 12:56, Kyrylo Tkachov via Gcc-patches
wrote:
>
>
>
> > -Original Message-
> > From: Jakub Jelinek
> > Sent: 29 March 2021 11:45
> > To: Kyrylo Tkachov
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: Re: [PATCH] aarch64: PR target/99037 Fix RTL represntation in
> >
When compiling with -mfloat-abi=hard -march=armv8.1-m.main+mve, we
want to emit Tag_ABI_VFP_args even though we are not emitting
floating-point instructions (we need "+mve.fp" for that), because we
use MVE registers to pass FP arguments.
This patch removes the condition on (! TARGET_SOFT_FLOAT)
On Mon, 29 Mar 2021 at 17:09, Jakub Jelinek via Gcc-patches
wrote:
>
> Hi!
>
> aarch64 currently doesn't support declare simd where the return value and
> arguments
> have different sizes and warns about that case. This change adds a dg-warning
> for that case like various other tests have
mode
Error: selected processor does not support `wldrd wr2,.L8' in ARM mode
Error: selected processor does not support `wmulwl wr0,wr0,wr2' in ARM mode
Error: selected processor does not support `wstrd wr0,[r0]' in ARM mode
2021-03-29 Christophe Lyon
PR target/99786
gcc
The vectorizer has a very different effect with -mabi=ilp32, and
doesn't emit the expecte diagnostic, so this patch expects it only
under lp64.
2021-03-29 Christophe Lyon
gcc/testsuite/
PR target/96974
* g++.target/aarch64/sve/pr96974.C: Expect SLP diagnostic only
of '[^ \]' would match accross the whole assembly
file, which is not what we want, hence the limitation with spaces.
2021-03-29 Christophe Lyon
gcc/testsuite/
PR target/96770
* gcc.target/arm/pure-code/pr96770.c: Fix scan-assembler-times
with movt/movw.
---
gcc
Hi,
I'm seeing random scan-assembler-times failures in pr96770.c when LTO is used.
I suspect this is because the \\+4 string matches the LTO sections, sometimes.
I propose this small patch to avoid the issue, by matching arr\\+4 instead. OK?
2021-03-26 Christophe Lyon
gcc/testsuite
On Wed, 24 Mar 2021 at 10:45, Jakub Jelinek wrote:
>
> Hi!
>
> The following patch fixes similar issues as in PR98849 -
> in older gcc versions, the expanders were present in neon.md guarded
> with TARGET_NEON, but they got moved to vec-common.md and guarded with
> ARM_HAVE__ARITH so that they
MVE has different constraints than Neon for load/store: we should use
the Ux constraint instead of Um.
2021-03-24 Christophe Lyon
PR target/99727
gcc/
* config/arm/mve.md (movmisalign_mve_store): Use Ux
constraint.
(movmisalign_mve_load): Likewise
On Tue, 23 Mar 2021 at 17:54, Vladimir Makarov wrote:
>
>
> On 2021-03-23 9:07 a.m., Christophe Lyon wrote:
> > On Mon, 22 Mar 2021 at 18:38, Vladimir Makarov via Gcc-patches
> > wrote:
> >>
> > Hi,
> >
> > This patch causes regressions (116) on
On Tue, 23 Mar 2021 at 15:59, Kyrylo Tkachov wrote:
>
>
>
> > -Original Message-
> > From: Gcc-patches On Behalf Of
> > Christophe Lyon via Gcc-patches
> > Sent: 23 March 2021 14:33
> > To: gcc-patches@gcc.gnu.org
> > Subject: [PATCH 8/8] t
Christophe Lyon
gcc/
* doc/sourcebuild.texi (arm_dsp_ok, arm_dsp): Document.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_dsp_ok_nocache)
(check_effective_target_arm_dsp_ok, add_options_for_arm_dsp): New.
* gcc.target
2021-03-19 Christophe Lyon
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_arm_v8_1m_mve_fp_ok_nocache): Fix
-mfloat-abi= options order.
(check_effective_target_arm_v8_1m_mve_ok_nocache): Likewise
* gcc.target/arm/mve/
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