Hi, I'm recently working on vectorization of GCC. I'm stuck in a small
problem and would like to ask for advice.
For example, for the following code:
int main() {
int size = 1000;
int *foo = malloc(sizeof(int) * size);
int c1 = rand(), t1 = rand();
for (int i = 0; i < size; i++) {
Snapshot gcc-11-20231012 is now available on
https://gcc.gnu.org/pub/gcc/snapshots/11-20231012/
and on various mirrors, see http://gcc.gnu.org/mirrors.html for details.
This snapshot has been generated from the GCC 11 git branch
with the following options: git://gcc.gnu.org/git/gcc.git branch
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106271
--- Comment #9 from Matthias Klose ---
yes, that's one which could be also backported. Let me submit the other bits
upstream as well.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #6 from Arsen Arsenović ---
this poses another problem too, though: should big and little cores ever differ
in ISA support levels, building on big cores (which seems like a reasonable
thing to do) with -march=native could lead to
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111779
Bug ID: 111779
Summary: Fail to vectorize the struct include struct
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
I was building a cross compiler to PowerPC on my x86_86 workstation with the
latest version of GCC on October 11th. I could not build the compiler on the
x86_64 system as it died in building libgcc. I looked into it, and I
discovered the compiler was recursing until it ran out of stack space.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111779
Richard Biener changed:
What|Removed |Added
See Also||https://gcc.gnu.org/bugzill
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111777
--- Comment #8 from mary.bennett at embecosm dot com ---
Thanks for pinging me, Jeff
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #8 from Arsen Arsenović ---
(In reply to Alexander Monakov from comment #7)
> I'm afraid hybrid CPUs with varying ISA feature sets are not practical for
> the current ecosystem: you wouldn't be able to reschedule from a higher- to
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111781
Mikael Morin changed:
What|Removed |Added
Ever confirmed|0 |1
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111764
--- Comment #6 from Richard Biener ---
Shorter testcase, fails at -O2 -ftree-vectorize
short b;
int main()
{
b = 2;
for (int a = 1; a <= 9; a++)
b = b * b;
if (b != 0)
__builtin_abort ();
}
it "works" with unsigned short b
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111424
--- Comment #2 from CVS Commits ---
The master branch has been updated by LuluCheng :
https://gcc.gnu.org/g:a2a51b6982c895ff3e37bda622303e92b3ac1d16
commit r14-4585-ga2a51b6982c895ff3e37bda622303e92b3ac1d16
Author: Chenghui Pan
Date: Tue
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111773
Richard Biener changed:
What|Removed |Added
Last reconfirmed||2023-10-12
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111773
Sam James changed:
What|Removed |Added
CC||sjames at gcc dot gnu.org
--- Comment #3
From: Pan Li
This patch would like to support the FP lround/lroundf auto vectorization.
* long lround (double) for rv64
* long lroundf (float) for rv32
Due to the limitation that only the same size of data type are allowed
in the vectorier, the standard name lroundmn2 only act on DF => DI for
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111777
mary.bennett at embecosm dot com changed:
What|Removed |Added
CC||mary.bennett at
On Wed, 11 Oct 2023 at 16:57, Prathamesh Kulkarni
wrote:
>
> On Wed, 11 Oct 2023 at 16:42, Prathamesh Kulkarni
> wrote:
> >
> > On Mon, 9 Oct 2023 at 17:05, Richard Sandiford
> > wrote:
> > >
> > > Prathamesh Kulkarni writes:
> > > > Hi,
> > > > The attached patch attempts to fix PR111648.
> >
On Thu, 12 Oct 2023, juzhe.zh...@rivai.ai wrote:
> I tree-vect-slp.cc:
> vect_get_and_check_slp_defs
> 711:
>
> tree type = TREE_TYPE (oprnd);
> dt = dts[i];
> if ((dt == vect_constant_def
>|| dt == vect_external_def)
> &&
Robin Dapp writes:
>> It wasn't very clear, sorry, but it was the last sentence I was asking
>> for clarification on, not the other bits. Why do we want to avoid
>> generating a COND_ADD when the operand is a vectorisable call?
>
> Ah, I see, apologies. Upon thinking about it a bit more
Sorry for misleading here.
When implement the llrint after lrint, I realize llrint (DF => SF) are
supported by the lrint already in the previous patche(es).
Because they same the same standard name as well as the mode iterator.
Thus, I may have 2 options here for the patch naming.
1. Only
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67740
--- Comment #11 from CVS Commits ---
The master branch has been updated by Paul Thomas :
https://gcc.gnu.org/g:701363d827d45d3e3601735fa42f95644fda8b64
commit r14-4583-g701363d827d45d3e3601735fa42f95644fda8b64
Author: Paul Thomas
Date: Thu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111771
Richard Biener changed:
What|Removed |Added
Ever confirmed|0 |1
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111769
--- Comment #4 from David Brown ---
(In reply to Richard Biener from comment #1)
> If you compile with debug info enabled the info should be already there,
> just nothing looks at this (and mismatches) at link time.
Perhaps I should file this
Pushed to r14-4584.
在 2023/10/11 下午5:59, Yang Yujie 写道:
gcc/ChangeLog:
* config.gcc: Add loongarch-driver.h to tm_files.
* config/loongarch/loongarch.h: Do not include loongarch-driver.h.
* config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
On Wed, Oct 11, 2023 at 12:48:12AM +1100, Nathaniel Shead wrote:
> On Mon, Oct 09, 2023 at 04:46:46PM -0400, Jason Merrill wrote:
> > On 10/8/23 21:03, Nathaniel Shead wrote:
> > > Ping for
> > > https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631203.html
> > >
> > > + && (TREE_CODE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111781
Bug ID: 111781
Summary: Compiler error on valid code
Product: gcc
Version: 12.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: fortran
gcc/ChangeLog:
* doc/extend.texi: Change subsubsection to subsection for
CORE-V built-ins.
---
gcc/doc/extend.texi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index ffe8532ad91..e8180945ab4 100644
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108396
--- Comment #10 from Kewen Lin ---
(In reply to Carl Love from comment #9)
> I made a copy of rs6000-overload.def and then with a series of emacs macros
> converted the list of builtins to a script to grep for the builtins in the
> test
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111778
--- Comment #2 from Jiu Fu Guo ---
Thanks so much for reporting this issue, and thanks for tracing down it!
For the code, if 'lz' is 0, it is correct to return false.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111764
--- Comment #5 from Richard Biener ---
Hmm, that's not enough, the issue is this is detected as reduction at all.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111755
--- Comment #4 from kuzume ---
I apologize, but I will retract this report. I've realized that the IRQ handler
call of a certain RTOS I'm using is invoking with $sp as a multiple of 4, not
8. This violates the ARM ABI convention.
Hi,
The description of the REG_NOALIAS note in reg-notes.def isn't quite
right. It describes it as being attached to call insns, but it is
instead attached to a move insn receiving the return value from a call.
This can be seen by looking at the code in calls.cc:expand_call which
attaches the
Hi, Richi.
I restrict as you said into vect_external_def.
Then this condition made SLP failed:
- if (mask_index >= 0
+ if (mask_index >= 0 && internal_fn_len_index (ifn) < 0
&& !vect_check_scalar_mask (vinfo, stmt_info, slp_node, mask_index,
Oh. I see.
Here make vect_constant_def failed to SLP:
tree-vect-slp.cc:
vect_build_slp_tree_2
line 2354:
if (oprnd_info->first_dt == vect_external_def
|| oprnd_info->first_dt == vect_constant_def)
{
slp_tree invnode = vect_create_new_slp_node (oprnd_info->ops);
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111782
Richard Biener changed:
What|Removed |Added
Target Milestone|--- |11.5
Keywords|
Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}.
Ready push to trunk.
gcc/ChangeLog:
* config/i386/mmx.md (V2FI_32): New mode iterator
(movd_v2hf_to_sse): Rename to ..
(movd__to_sse): .. this.
(movd_v2hf_to_sse_reg): Rename to ..
For lrint/lround/lceil/lfoor is not vectorized due to vectorization
restriction. When input element size is different from output element size,
vectorization relies on the old TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION
intstead of the modern standand pattern name. The patch only supports
There are two reasons for removing this macro definition:
1. The default in the assembler is to use the nop instruction for filling.
2. For assembly directives: .align [abs-expr[, abs-expr[, abs-expr]]]
The third expression it is the maximum number of bytes that should be
skipped by this
Richard Biener writes:
> On Tue, Aug 22, 2023 at 12:42 PM Szabolcs Nagy via Gcc-patches
> wrote:
>>
>> From: Richard Sandiford
>>
>> The prologue/epilogue pass allows the prologue sequence
>> to contain jumps. The sequence is then partitioned into
>> basic blocks using
The following removes a misguided attempt to allow x + x in a reduction
path, also allowing x * x which isn't valid. x + x actually never
arrives this way but instead is canonicalized to 2 * x. This makes
reduction path handling consistent with how we handle the single-stmt
reduction case.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111779
Richard Biener changed:
What|Removed |Added
Component|c |tree-optimization
OK
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-10-12 16:59
To: gcc-patches
CC: juzhe.zhong; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v1] RISC-V: Support FP lround/lroundf auto vectorization
From: Pan Li
This patch would like to support the FP lround/lroundf auto vectorization.
I tree-vect-slp.cc:
vect_get_and_check_slp_defs
711:
tree type = TREE_TYPE (oprnd);
dt = dts[i];
if ((dt == vect_constant_def
|| dt == vect_external_def)
&& !GET_MODE_SIZE (vinfo->vector_mode).is_constant ()
&& (TREE_CODE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
Alexander Monakov changed:
What|Removed |Added
CC||amonakov at gcc dot gnu.org
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111769
--- Comment #3 from David Brown ---
(In reply to Andrew Pinski from comment #2)
> IIRC there was a bug about this specific thing which was closed as fixed
> with the use of LTO ...
Certainly if you use LTO, then this is not necessary. But LTO
Pushed to r14-4585.
在 2023/9/28 下午6:05, Chenghui Pan 写道:
This is the update of:
https://gcc.gnu.org/pipermail/gcc-patches/2023-September/631379.html
This version does not include changes for codes, but fixes the commit title
format and appends the missing PR info.
Chenghui Pan (2):
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111771
--- Comment #4 from Richard Biener ---
-fno-lifetime-dse fixes the issue (and the diagnostic)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111780
Richard Biener changed:
What|Removed |Added
Keywords||missed-optimization
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated. Synced and modified with latest trunk sources.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
l = a + b + c + d +e
The support to elide calls to allocation functions in DCE runs into
the issue that when implementations are discovered noreturn we end
up DCEing the calls anyway, leaving blocks without termination and
without outgoing edges which is both invalid IL and wrong-code when
as in the example the
On Thu, 12 Oct 2023, ??? wrote:
> Thanks Richi point it out.
>
> I found this patch can't make conditional gather load succeed on SLP.
>
> I am considering change MASK_LEN_GATHER_LOAD in pattern recognization:
>
> If no condition mask, in tree-vect-patterns.cc, I build MASK_LEN_GATHER_LOAD
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111782
Bug ID: 111782
Summary: [11/12/13/14 Regression] Extra move in complex double
multiplication
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Keywords:
"Richard Earnshaw (lists)" writes:
> On 09/10/2023 14:12, Victor Do Nascimento wrote:
>>
>>
>> On 10/7/23 12:53, Richard Sandiford wrote:
>>> Richard Earnshaw writes:
On 03/10/2023 16:18, Victor Do Nascimento wrote:
> In implementing the ACLE read/write system register builtins it was
This patch fixes this following FAILs in RISC-V regression:
FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects scan-tree-dump vect
"Loop contains only SLP stmts"
FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only SLP
stmts"
FAIL: gcc.dg/vect/vect-gather-3.c -flto
Hi!
The following testcase started FAILing recently after the
https://sourceware.org/git/?p=glibc.git;a=commit;h=64b1a44183a3094672ed304532bedb9acc707554
glibc change which marked vfscanf with nonnull (1) attribute.
While vfwscanf hasn't been marked similarly (strangely), the patch changes
that
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111780
Bug ID: 111780
Summary: Missed optimization of '(t*4)/(t*2) -> 2'
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111764
--- Comment #7 from CVS Commits ---
The master branch has been updated by Richard Biener :
https://gcc.gnu.org/g:05f98310b54da95e468d799f4a910174320cccbb
commit r14-4588-g05f98310b54da95e468d799f4a910174320cccbb
Author: Richard Biener
Date:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111764
Richard Biener changed:
What|Removed |Added
Priority|P3 |P2
Known to work|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #9 from Alexander Monakov ---
(In reply to Arsen Arsenović from comment #8)
> indeed (but I believe it did happen with Alder Lake already, by accident,
> with AVX512 on P-cores but not on E-cores).
AFAIK on those Alder Lake CPUs
The following handles byte-aligned, power-of-two and byte-multiple
sized BIT_FIELD_REF reads in SRA. In particular this should cover
BIT_FIELD_REFs created by optimize_bit_field_compare.
For gcc.dg/tree-ssa/ssa-dse-26.c we now SRA the BIT_FIELD_REF
appearing there leading to more DSE, fully
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111779
Richard Biener changed:
What|Removed |Added
Assignee|unassigned at gcc dot gnu.org |rguenth at gcc dot
gnu.org
On Thu, 12 Oct 2023, juzhe.zh...@rivai.ai wrote:
> Hi, Richi.
>
> I restrict as you said into vect_external_def.
>
> Then this condition made SLP failed:
>
> - if (mask_index >= 0
> + if (mask_index >= 0 && internal_fn_len_index (ifn) < 0
> && !vect_check_scalar_mask
HAO CHEN GUI writes:
> Hi,
> Vector mode instructions are efficient on some targets (e.g. ppc64).
> This patch enables vector mode for compare_by_pieces. The non-member
> function widest_fixed_size_mode_for_size takes by_pieces_operation
> as the second argument and decide whether vector mode
On Thursday, 12 October 2023, Jakub Jelinek wrote:
> Hi!
>
> The following testcase started FAILing recently after the
>
https://sourceware.org/git/?p=glibc.git;a=commit;h=64b1a44183a3094672ed304532bedb9acc707554
> glibc change which marked vfscanf with nonnull (1) attribute.
> While vfwscanf
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated.
Synced with latest trunk sources and modify the sinking pass accordingly.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
"Jose E. Marchesi" writes:
> Hi Richard.
> Thanks for looking at this! :)
>
>
>> "Jose E. Marchesi" writes:
>>> ping
>>
>> I don't know this code very well, and have AFAIR haven't worked
>> with an assembler that requires external declarations, but since
>> it's at a second ping :)
>>
>>>
LGTM but I'm not a maintainer ;-)
On Thu, 12 Oct 2023 at 04:22, Hans-Peter Nilsson wrote:
>
> Ping.
>
> > From: Hans-Peter Nilsson
> > Date: Wed, 4 Oct 2023 19:08:16 +0200
> >
> > s/atomic-exchange/atomic-cmpxchg-word/g.
> > Tested as v1.
> >
> > Ok to commit?
> > -- >8 --
> > These tests
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111777
--- Comment #9 from seurer at gcc dot gnu.org ---
That patch works fine on a system where the build was failing.
This patch improves the documentation by completing the description of
the remaining so far undocumented OpenMP Memory-Management Routines
(except for the two function added in TR11, which are also unimplmeneted).
Current online version:
In tree-vect-stmts.cc
vect_check_scalar_mask
Failed here:
/* If the caller is not prepared for adjusting an external/constant
SLP mask vector type fail. */
if (slp_node
&& !mask_node
&& SLP_TREE_DEF_TYPE (mask_node_1) != vect_internal_def)
{
if (dump_enabled_p
On Thu, Oct 12, 2023 at 11:54:14AM +0100, Richard Sandiford wrote:
> Jakub Jelinek writes:
> > @@ -2036,11 +2075,20 @@ wi::lrshift_large (HOST_WIDE_INT *val, c
> >unsigned int xlen, unsigned int xprecision,
> >unsigned int precision, unsigned int shift)
> > {
> >
Hi,
Thanks for your quick fix!
Michael Meissner writes:
> I was building a cross compiler to PowerPC on my x86_86 workstation with the
> latest version of GCC on October 11th. I could not build the compiler on the
> x86_64 system as it died in building libgcc. I looked into it, and I
>
The mask node is NULL since the caller :
if (mask_index >= 0
&& !vect_check_scalar_mask (vinfo, stmt_info, slp_node, mask_index,
, NULL, _dt, _vectype))
return false;
pass NULL to mask_node.
juzhe.zh...@rivai.ai
From: Richard
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #11 from Alexander Monakov ---
(In reply to Hongtao.liu from comment #10)
> > indeed (but I believe it did happen with Alder Lake already, by accident,
> > with AVX512 on P-cores but not on E-cores).
>
> AVX512 is physically fused
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
Richard Biener changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Ever confirmed|0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90608
Mikael Morin changed:
What|Removed |Added
Attachment #56091|0 |1
is obsolete|
Hi Richard,
being the one who wrote the surrounding code:
The fortran part looks good to me.
Ok for merge from the fortran side.
- Andre
On Thu, 12 Oct 2023 11:44:01 + (UTC)
Richard Biener wrote:
> On Thu, 12 Oct 2023, Richard Biener wrote:
>
> > The following handles byte-aligned,
This patch improves code sinking pass to sink statements before call to reduce
register pressure.
Review comments are incorporated. Synced with latest sources and modify the
code changes
accordingly.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e, int f)
{
int l;
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111784
Bug ID: 111784
Summary: [14 Regression] aarch64: ldp_stp_{15,16,17,18}.c test
failures
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111786
Bug ID: 111786
Summary: No tail recursion for simple program
Product: gcc
Version: 13.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Robin Dapp via Gcc-patches writes:
> Hi,
>
> as Juzhe noticed in gcc.dg/pr92301.c there was still something missing in
> the last patch. The attached v2 makes sure we always have a COND_LEN
> operation
> before returning true and initializes len and bias even if they are unused.
>
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102989
--- Comment #112 from CVS Commits ---
The master branch has been updated by Jakub Jelinek :
https://gcc.gnu.org/g:0d00385eaf72ccacff17935b0d214a26773e095f
commit r14-4592-g0d00385eaf72ccacff17935b0d214a26773e095f
Author: Jakub Jelinek
Date:
From: Pan Li
This patch would like to support the FP lceil/lceilf auto vectorization.
* long lceil (double) for rv64
* long lceilf (float) for rv32
Due to the limitation that only the same size of data type are allowed
in the vectorier, the standard name lceilmn2 only act on DF => DI for
rv64,
I would prefer first approach since it no changes other than adding
testcase, that might confusing other people.
Li, Pan2 於 2023年10月11日 週三 23:12 寫道：
> Sorry for misleading here.
>
> When implement the llrint after lrint, I realize llrint (DF => SF) are
> supported by the lrint already in the
On Wed, 11 Oct 2023, Robin Dapp wrote:
> > It wasn't very clear, sorry, but it was the last sentence I was asking
> > for clarification on, not the other bits. Why do we want to avoid
> > generating a COND_ADD when the operand is a vectorisable call?
>
> Ah, I see, apologies. Upon thinking
Hi Richard.
Thanks for looking at this! :)
> "Jose E. Marchesi" writes:
>> ping
>
> I don't know this code very well, and have AFAIR haven't worked
> with an assembler that requires external declarations, but since
> it's at a second ping :)
>
>>
>>> ping
>>>
[Differences from V1:
-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111768
--- Comment #13 from David C. Manuelda ---
I'd suggest for now to pick a common value in order to prevent the compilation
failure (in stage comparison) while a proper fix/workaround is picked.
This implements atan2 which was missing from LibF7.
Johann
--
LibF7: Implement atan2.
libgcc/config/avr/libf7/
* libf7.c (F7MOD_atan2_, f7_atan2): New module and function.
* libf7.h: Adjust comments.
* libf7-common.mk (CALL_PROLOGUES): Add atan2.
diff --git
> "Jose E. Marchesi" writes:
>> Hi Richard.
>> Thanks for looking at this! :)
>>
>>
>>> "Jose E. Marchesi" writes:
ping
>>>
>>> I don't know this code very well, and have AFAIR haven't worked
>>> with an assembler that requires external declarations, but since
>>> it's at a second ping :)
"Jose E. Marchesi" writes:
>> "Jose E. Marchesi" writes:
>>> Hi Richard.
>>> Thanks for looking at this! :)
>>>
>>>
"Jose E. Marchesi" writes:
> ping
I don't know this code very well, and have AFAIR haven't worked
with an assembler that requires external declarations,
Hi All,
At the moment, trying to use -march=armv9-a with any ACLE header such as
arm_neon.h results in rows and rows of warnings saying:
: warning: "__ARM_ARCH" redefined
: note: this is the location of the previous definition
This is obviously not useful and happens because the header was
From: Christoph Müllner
Fixes: c1bc7513b1d7 ("RISC-V: const: hide mvconst splitter from IRA")
A recent change broke the xtheadcondmov-indirect tests, because the order of
emitted instructions changed. Since the test is too strict when testing for
a fixed instruction order, let's change the
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111786
Jakub Jelinek changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52994
Paul Thomas changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=39627
Bug 39627 depends on bug 52994, which changed state.
Bug 52994 Summary: [OOP] [F08] internal compiler error: in
gfc_trans_assignment_1, at fortran/trans-expr.c:6881
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=52994
What|Removed
LGTM but I'm not a maintainer ;-)
On Thu, 12 Oct 2023 at 04:21, Hans-Peter Nilsson wrote:
>
> Ping.
>
> > From: Hans-Peter Nilsson
> > Date: Wed, 4 Oct 2023 19:04:55 +0200
> >
> > > From: Hans-Peter Nilsson
> > > Date: Wed, 4 Oct 2023 17:15:28 +0200
> >
> > > New version coming up.
> >
> >
Tamar Christina writes:
> Hi All,
>
> At the moment, trying to use -march=armv9-a with any ACLE header such as
> arm_neon.h results in rows and rows of warnings saying:
>
> : warning: "__ARM_ARCH" redefined
> : note: this is the location of the previous definition
>
> This is obviously not useful
Jakub Jelinek writes:
> @@ -2036,11 +2075,20 @@ wi::lrshift_large (HOST_WIDE_INT *val, c
> unsigned int xlen, unsigned int xprecision,
> unsigned int precision, unsigned int shift)
> {
> - unsigned int len = rshift_large_common (val, xval, xlen, xprecision,
>
On Thu, 12 Oct 2023, juzhe.zh...@rivai.ai wrote:
> In tree-vect-stmts.cc
>
> vect_check_scalar_mask
>
> Failed here:
>
> /* If the caller is not prepared for adjusting an external/constant
> SLP mask vector type fail. */
> if (slp_node
> && !mask_node
^^^
where's the
On Thu, 12 Oct 2023, juzhe.zh...@rivai.ai wrote:
> Oh. I see.
>
> Here make vect_constant_def failed to SLP:
>
> tree-vect-slp.cc:
> vect_build_slp_tree_2
> line 2354:
>
> if (oprnd_info->first_dt == vect_external_def
> || oprnd_info->first_dt == vect_constant_def)
> {
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