[no subject]

Good morning Can I get the last version of an application of gcc for Windows ? Thanks

Re:

在 2024/1/5 18:34, Jonathan Wakely via Gcc 写道: There are also the https://nuwen.net/mingw.html and https://jmeubank.github.io/tdm-gcc/download/ projects, but they both use outdated versions of GCC at the moment. Wrong mailing list; but anyway, for bleeding-edge updates, with other well managed

Re: Re: No subject

Since you mentioned windows 7 specifically, some of the suggestions aren't really appropriate. I don't believe msys2 supports windows 7 anymore. I'm also not the biggest fan of msys2, I think it brings in way too much complexity for what it is. It's useful if you would like to obtain some

Re:

On Fri, 5 Jan 2024 at 10:33, Nani Rodrigue via Gcc wrote: > > Good morning > > Can I get the last version of an application of gcc for Windows ? Not from here, no. See https://gcc.gnu.org/install/binaries.html There are also the https://nuwen.net/mingw.html and

Re: No subject

5 Jan 2024 5:00:03 pm LIU Hao : 在 2024/1/5 21:44, Peter0x44 via Gcc 写道: Since you mentioned windows 7 specifically, some of the suggestions aren't really appropriate. I don't believe msys2 supports windows 7 anymore. Nobody mentioned Windows 7... maybe you mistook the question mark? :|

Re: Update on GCC 14 C type safety changes/warnings as errors

Hello, On Thu, Nov 30 2023, Florian Weimer via Gcc wrote: > The patch series is currently under review: > > [PATCH v3 00/11] : More warnings as errors by default > > > > Jeff as a global reviewer has

Re: No subject

在 2024/1/5 21:44, Peter0x44 via Gcc 写道: Since you mentioned windows 7 specifically, some of the suggestions aren't really appropriate. I don't believe msys2 supports windows 7 anymore. Nobody mentioned Windows 7... maybe you mistook the question mark? :| MSYS2 itself no longer supports

gcc-12-20240105 is now available

Snapshot gcc-12-20240105 is now available on https://gcc.gnu.org/pub/gcc/snapshots/12-20240105/ and on various mirrors, see https://gcc.gnu.org/mirrors.html for details. This snapshot has been generated from the GCC 12 git branch with the following options: git://gcc.gnu.org/git/gcc.git branch

Re: Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function.

2024-01-05 16:55 juzhe.zhong wrote: >--- a/gcc/config/riscv/vector.md >+++ b/gcc/config/riscv/vector.md >@@ -864,9 +864,9 @@ >  vnclip,vicmp,vfalu,vfmul,vfminmax,vfdiv,vfwalu,vfwmul,\ >  vfsgnj,vfcmp,vslideup,vslidedown,vislide1up,\ > 

[PATCH] RISC-V: Fix avl-type operand index error for ZVBC

This patch fix the rtl-checking error for crypto vector. The root cause is the avl-type index of zvbc ins is error,it should be operand[8] not operand[5]. gcc/ChangeLog: * config/riscv/vector.md: Modify avl_type operand index of zvbc ins. --- gcc/config/riscv/vector.md | 4 ++-- 1 file

Re: [PATCH] RISC-V: Fix avl-type operand index error for ZVBC

LGTM. juzhe.zh...@rivai.ai From: Feng Wang Date: 2024-01-05 17:23 To: gcc-patches CC: kito.cheng; jeffreyalaw; juzhe.zhong; Feng Wang Subject: [PATCH] RISC-V: Fix avl-type operand index error for ZVBC This patch fix the rtl-checking error for crypto vector. The root cause is the avl-type

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

在 2024/1/5 下午4:37, Xi Ruoyao 写道: On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote:  bool  loongarch_explicit_relocs_p (enum loongarch_symbol_type type)  { +  /* Instructions pcalau12i, addi.d, lu32i.d and lu52i.d must be adjancent + so that the linker can infer the PC of pcalau12i

Re: [PATCH] RISC-V: Teach liveness computation loop invariant shift amount[Dynamic LMUL]

> 1). We not only have vashl_optab,vashr_optab,vlshr_optab which vectorize > shift with vector shift amount, > that is, vectorization of 'a[i] >> x[i]', the shift amount is loop variant. > 2). But also, we have ashl_optab, ashr_optab, lshr_optab which can vectorize > shift with scalar shift

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote: >  bool >  loongarch_explicit_relocs_p (enum loongarch_symbol_type type) >  { > +  /* Instructions pcalau12i, addi.d, lu32i.d and lu52i.d must be adjancent > + so that the linker can infer the PC of pcalau12i to apply relocations > + to

[committed] RISC-V: Clean up unused variable [NFC]

gcc/ChangeLog: * config/riscv/riscv-v.cc (expand_load_store): Remove `value`. (expand_cond_len_op): Ditto. (expand_gather_scatter): Ditto. (expand_lanes_load_store): Ditto. (expand_fold_extract_last): Ditto. --- gcc/config/riscv/riscv-v.cc | 5

[PATCH v7 1/2] RISC-V: Add crypto vector builtin function.

Patch v7:Fix avl_type operand index of zvbc ins. Patch v6:Remove unused code. Patch v5:Rebase. Patch v4:Merge crypto vector function.def into vector. Patch v3:Define a shape for vaesz and merge vector-crypto-types.def into riscv-vector-builtins-types.def. Patch v2:Optimize function_shape

[committed] RISC-V: Clean up testsuite for multi-lib testing [NFC]

- Drop unnecessary including for stdlib.h and math.h - Drop assert.h / assert, use __builtin_abort instead. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h: Use __builtin_abort instead of assert. *

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

在 2024/1/5 下午4:37, Xi Ruoyao 写道: On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote:  bool  loongarch_explicit_relocs_p (enum loongarch_symbol_type type)  { +  /* Instructions pcalau12i, addi.d, lu32i.d and lu52i.d must be adjancent + so that the linker can infer the PC of pcalau12i

Re: [PATCH v7 1/2] RISC-V: Add crypto vector builtin function.

--- a/gcc/config/riscv/vector.md +++ b/gcc/config/riscv/vector.md @@ -864,9 +864,9 @@ vnclip,vicmp,vfalu,vfmul,vfminmax,vfdiv,vfwalu,vfwmul,\ vfsgnj,vfcmp,vslideup,vslidedown,vislide1up,\ vislide1down,vfslide1up,vfslide1down,vgather,viwmuladd,vfwmuladd,\ -

[Bug rtl-optimization/113048] [13/14 Regression] ICE: in lra_split_hard_reg_for, at lra-assigns.cc:1862 (unable to find a register to spill) {*andndi3_doubleword_bmi} with -march=cascadelake since r13

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113048 Uroš Bizjak changed: What|Removed |Added Component|target |rtl-optimization --- Comment #5 from

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

On Fri, 2024-01-05 at 17:57 +0800, chenglulu wrote: > > 在 2024/1/5 下午4:37, Xi Ruoyao 写道: > > On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote: > > >   bool > > >   loongarch_explicit_relocs_p (enum loongarch_symbol_type type) > > >   { > > > +  /* Instructions pcalau12i, addi.d, lu32i.d and

[Bug rtl-optimization/111267] [14 Regression] Codegen regression from i386 argument passing changes

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111267 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

RE: [PATCH]middle-end: Don't apply copysign optimization if target does not implement optab [PR112468]

> -Original Message- > From: Xi Ruoyao > Sent: Thursday, January 4, 2024 10:39 PM > To: Palmer Dabbelt ; Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; rguent...@suse.de; Jeff Law > > Subject: Re: [PATCH]middle-end: Don't apply copysign optimization if target > does > not

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

On Fri, 2024-01-05 at 18:25 +0800, Xi Ruoyao wrote: > On Fri, 2024-01-05 at 17:57 +0800, chenglulu wrote: > > > > 在 2024/1/5 下午4:37, Xi Ruoyao 写道: > > > On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote: > > > >   bool > > > >   loongarch_explicit_relocs_p (enum loongarch_symbol_type type) > >

Re: [PATCH] aarch64: Further fix for throwing insns in ldp/stp pass [PR113217]

Alex Coplan writes: > As the PR shows, the fix in > r14-6916-g057dc349021660c40699fb5c98fd9cac8e168653 was not complete. > That fix was enough to stop us trying to move throwing accesses above > nondebug insns, but due to this code in try_fuse_pair: > > // Placement strategy: push loads down

[Bug tree-optimization/113145] [14 regression] ICE in verify_dominators when building mit-krb5-1.21.2 since r14-6822-g01f4251b8775c8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113145 Tamar Christina changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug middle-end/26163] [meta-bug] missed optimization in SPEC (2k17, 2k and 2k6 and 95)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26163 Bug 26163 depends on bug 113145, which changed state. Bug 113145 Summary: [14 regression] ICE in verify_dominators when building mit-krb5-1.21.2 since r14-6822-g01f4251b8775c8 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113145 What

RE: [PATCH]middle-end: Don't apply copysign optimization if target does not implement optab [PR112468]

> On Fri, 2024-01-05 at 11:02 +, Tamar Christina wrote: > > Ok, so something like: > > > > > > ([istarget loongarch*-*-*] && > > > > ([check_effective_target_loongarch_sx] || > > > > [check_effective_target_hard_float])) > > ? > > We don't need "[check_effective_target_loongarch_sx] ||"

[committed] libstdc++: Use if-constexpr in std::__try_use_facet [PR113099]

Tested x86_64-linux. Pushed to trunk. -- >8 -- As noted in the PR, we can use if-constexpr for the explicit instantantiation definitions that are compiled with -std=gnu++11. We just need to disable the -Wc++17-extensions diagnostics. libstdc++-v3/ChangeLog: PR libstdc++/113099

[Bug libstdc++/113200] std::char_traits::move is not constexpr when the argument is a string literal

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113200 Jonathan Wakely changed: What|Removed |Added Target Milestone|--- |12.4

Re: [PATCH v3 3/3] aarch64: Add explicit checks for implicit LSE/LSE2 requirements.

Richard Sandiford writes: > Victor Do Nascimento writes: >> At present, Evaluation of both `has_lse2(hwcap)' and >> `has_lse128(hwcap)' may require issuing an `mrs' instruction to query >> a system register. This instruction, when issued from user-space >> results in a trap by the kernel which

[Bug middle-end/113228] [14 Regression] ICE: recalculate_side_effects, at gimplify.cc:3347 since r14-6420

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113228 --- Comment #12 from Jakub Jelinek --- The reason why late gimplification/regimplification generally works fine with SSA_NAMEs is that the case SSA_NAME: /* Allow callbacks into the gimplifier during optimization. */

Re: [pushed][PATCH] LoongArch: Fixed the problem of incorrect judgment of the immediate field of the [x]vld/[x]vst instruction.

Pushed to r14-6955. 在 2024/1/4 上午10:37, Lulu Cheng 写道: The [x]vld/[x]vst directive is defined as follows: [x]vld/[x]vst {x/v}d, rj, si12 When not modified, the immediate field of [x]vld/[x]vst is between 10 and 14 bits depending on the type. However, in loongarch_valid_offset_p, the

Re: [PATCH 1/4] LoongArch: Handle ISA evolution switches along with other options

On Fri, Jan 05, 2024 at 08:12:08PM +0800, Xi Ruoyao wrote: > On Fri, 2024-01-05 at 14:55 +0800, Yang Yujie wrote: > > +#define ISA_HAS_FRECIPE \ > > +  (la_target.isa.evolution & OPTION_MASK_ISA_FRECIPE) > > +#define ISA_HAS_DIV32 \ > > +  (la_target.isa.evolution & OPTION_MASK_ISA_DIV32) > >

Re: [PATCH] RISC-V: Allow simplification non-vlmax with len = NUNITS reg to reg move

> +/* Return true it is whole register-register move. */ > +bool > +whole_reg_to_reg_move_p (rtx *ops, machine_mode mode) > +{ > + if (register_operand (ops[0], mode) > + && register_operand (ops[3], mode) > + && satisfies_constraint_vu (ops[2]) > + && satisfies_constraint_Wc1

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

On Fri, 2024-01-05 at 20:45 +0800, chenglulu wrote: > > 在 2024/1/5 下午7:55, Xi Ruoyao 写道: > > On Fri, 2024-01-05 at 18:25 +0800, Xi Ruoyao wrote: > > > On Fri, 2024-01-05 at 17:57 +0800, chenglulu wrote: > > > > 在 2024/1/5 下午4:37, Xi Ruoyao 写道: > > > > > On Fri, 2024-01-05 at 11:40 +0800, Lulu

[Bug tree-optimization/111268] [14 Regression] internal compiler error: in to_constant, at poly-int.h:504

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111268 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org

[committed] libstdc++: Do not use __is_convertible unconditionally [PR113241]

Tested x86_64-linux. Pushed to trunk, backport to gcc-13 needed too. -- >8 -- The new __is_convertible built-in should only be used after checking that it's supported. libstdc++-v3/ChangeLog: PR libstdc++/113241 * include/std/type_traits (is_convertible_v): Guard use of

[Bug libstdc++/113241] [13/14 Regression] Unguarded use of __is_convertible built-in

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113241 --- Comment #1 from GCC Commits --- The master branch has been updated by Jonathan Wakely : https://gcc.gnu.org/g:57fa5b60bbbf8038b8a699d2bcebd2a9b2e29aa4 commit r14-6958-g57fa5b60bbbf8038b8a699d2bcebd2a9b2e29aa4 Author: Jonathan Wakely

Re: [PATCH v3] AArch64: Cleanup memset expansion

Wilco Dijkstra writes: > v3: rebased to latest trunk > > Cleanup memset implementation. Similar to memcpy/memmove, use an offset and > bytes throughout. Simplify the complex calculations when optimizing for size > by using a fixed limit. > > Passes regress & bootstrap. > > gcc/ChangeLog: >

[Bug target/113217] [14 Regression][aarch64] ICE in rtl_verify_bb_insns, at cfgrtl.cc:2796 since r14-6605-gc0911c6b357ba9

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113217 --- Comment #6 from GCC Commits --- The master branch has been updated by Alex Coplan : https://gcc.gnu.org/g:4b67ec7ff5b1aa9b3b70e9b58afc594b890abeb0 commit r14-6947-g4b67ec7ff5b1aa9b3b70e9b58afc594b890abeb0 Author: Alex Coplan Date: Fri

[Bug target/113217] [14 Regression][aarch64] ICE in rtl_verify_bb_insns, at cfgrtl.cc:2796 since r14-6605-gc0911c6b357ba9

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113217 Alex Coplan changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[PATCH] LoongArch: Implement option save/restore

LTO option streaming and target attributes both require per-function target configuration, which is achieved via option save/restore. We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target context in addition to other automatically maintained option states (via the "Save" option

[Bug tree-optimization/113201] [14 Regression] internal compiler error: tree check: expected ssa_name, have integer_cst in replace_uses_by, at tree-cfg.cc:2058

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113201 Jakub Jelinek changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: Ping^3: [PATCH] Add a late-combine pass [PR106594]

I have tested this patch on mips64el: No regression.

[Bug tree-optimization/90693] Missing popcount simplifications

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90693 --- Comment #10 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:0152637c74c9eab7658483b1cca4e3d584dd4262 commit r14-6940-g0152637c74c9eab7658483b1cca4e3d584dd4262 Author: Jakub Jelinek Date:

[Bug libstdc++/113099] locale without RTTI uses dynamic_cast before gcc 13.2 or has ODR violation since gcc 13.2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113099 --- Comment #16 from GCC Commits --- The master branch has been updated by Jonathan Wakely : https://gcc.gnu.org/g:9f3eb93e72703f6ea30aa27d0b6fc6db62cb4a04 commit r14-6942-g9f3eb93e72703f6ea30aa27d0b6fc6db62cb4a04 Author: Jonathan Wakely

[Bug libstdc++/113200] std::char_traits::move is not constexpr when the argument is a string literal

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113200 --- Comment #10 from GCC Commits --- The master branch has been updated by Jonathan Wakely : https://gcc.gnu.org/g:15cc291887dc9dd92b2c93f4545e20eb6c190122 commit r14-6944-g15cc291887dc9dd92b2c93f4545e20eb6c190122 Author: Jonathan Wakely

Re: [PATCH v3 3/3] aarch64: Add explicit checks for implicit LSE/LSE2 requirements.

Victor Do Nascimento writes: > At present, Evaluation of both `has_lse2(hwcap)' and > `has_lse128(hwcap)' may require issuing an `mrs' instruction to query > a system register. This instruction, when issued from user-space > results in a trap by the kernel which then returns the value read in >

Re: [pushed][PATCH v2 0/7] LoongArch:Enable testing for common

Pushed 2-7 to r14-6955...r14-6961. 在 2024/1/5 上午11:43, chenxiaolong 写道: v1->v2: On the basis of v1, the reason of the analysis problem is described in detail. When using binutils, which does not support vectorization, and the gcc compiler toolchain, which does support vectorization, the

[Bug c++/113242] New: g++ rejects-valid template argument of class type containing an lvalue reference

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113242 Bug ID: 113242 Summary: g++ rejects-valid template argument of class type containing an lvalue reference Product: gcc Version: 14.0 Status: UNCONFIRMED

Re: Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc

>>This is a small change to libstdc++ which does not change any behavior. > > Please CC the libstd...@gcc.gnu.org list on all libstdc++ patches, as > documented at https://gcc.gnu.org/lists.html Acknowledged. Sorry. >>This change has two, ihmo positive, implications: >> >> - The implicit

[Bug modula2/112923] gm2 runs out of memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112923 --- Comment #2 from Gaius Mulley --- Created attachment 56992 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=56992=edit Tiny example code showing the problem The attached source will compile but consumes vast amounts of ram. $ time gm2

Re: [PATCH] libstdc++: Fix testsuite with -Wformat

On 06/12/23 15:34 +0100, Gwenole Beauchesne wrote: Tested on x86_64-pc-linux-gnu with --enable-languages=c,c++ and additional -Wformat to CXXFLAGS. Please CC the libstd...@gcc.gnu.org list on all libstdc++ patches, as documented at https://gcc.gnu.org/lists.html Otherwise I won't see the

[committed] libstdc++: Remove UB from month and weekday additions and subtractions.

From: Cassio Neri Tested x86_64-linux. Pushed to trunk. This seems suitable for backporting too, at least to gcc-13. -- >8 -- The following invoke signed integer overflow (UB) [1]: month + months{MAX} // where MAX is the maximum value of months::rep month + months{MIN} // where MIN

Re: [PATCH v3 1/3] libatomic: atomic_16.S: Improve ENTRY, END and ALIAS macro interface

Victor Do Nascimento writes: > The introduction of further architectural-feature dependent ifuncs > for AArch64 makes hard-coding ifunc `_i' suffixes to functions > cumbersome to work with. It is awkward to remember which ifunc maps > onto which arch feature and makes the code harder to maintain

[Bug middle-end/113228] [14 Regression] ICE: recalculate_side_effects, at gimplify.cc:3347 since r14-6420

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113228 Jakub Jelinek changed: What|Removed |Added Priority|P3 |P1 Summary|[14 Regression]

[Bug libstdc++/113241] [13/14 Regression] Unguarded use of __is_convertible built-in

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113241 Jonathan Wakely changed: What|Removed |Added Target Milestone|--- |13.3 Status|UNCONFIRMED

[Bug libstdc++/113241] New: [13/14 Regression] Unguarded use of __is_convertible built-in

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113241 Bug ID: 113241 Summary: [13/14 Regression] Unguarded use of __is_convertible built-in Product: gcc Version: 13.2.1 Status: UNCONFIRMED Severity: normal

Re: [PATCH 1/4] LoongArch: Handle ISA evolution switches along with other options

On Fri, 2024-01-05 at 14:55 +0800, Yang Yujie wrote: > +#define ISA_HAS_FRECIPE \ > +  (la_target.isa.evolution & OPTION_MASK_ISA_FRECIPE) > +#define ISA_HAS_DIV32 \ > +  (la_target.isa.evolution & OPTION_MASK_ISA_DIV32) > +#define ISA_HAS_LAM_BH \ > +  (la_target.isa.evolution &

[Bug middle-end/113228] [14 Regression] ICE: recalculate_side_effects, at gimplify.cc:3347 since r14-6420

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113228 Jakub Jelinek changed: What|Removed |Added Status|NEW |ASSIGNED Assignee|unassigned

Re: [PATCH v2 2/2] LoongArch: When the code model is extreme, the symbol address is obtained through macro instructions regardless of the value of -mexplicit-relocs.

在 2024/1/5 下午7:55, Xi Ruoyao 写道: On Fri, 2024-01-05 at 18:25 +0800, Xi Ruoyao wrote: On Fri, 2024-01-05 at 17:57 +0800, chenglulu wrote: 在 2024/1/5 下午4:37, Xi Ruoyao 写道: On Fri, 2024-01-05 at 11:40 +0800, Lulu Cheng wrote:   bool   loongarch_explicit_relocs_p (enum loongarch_symbol_type

[Bug tree-optimization/113144] [14 regression] ICE when building dpkg-1.21.15 in verify_dominators (error: dominator of 9 should be 48, not 12)

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113144 --- Comment #9 from Tamar Christina --- *** Bug 113145 has been marked as a duplicate of this bug. ***

[Bug modula2/112923] gm2 runs out of memory

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112923 Gaius Mulley changed: What|Removed |Added Last reconfirmed||2024-01-05 Ever confirmed|0

[Bug tree-optimization/113201] [14 Regression] internal compiler error: tree check: expected ssa_name, have integer_cst in replace_uses_by, at tree-cfg.cc:2058

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113201 --- Comment #3 from GCC Commits --- The master branch has been updated by Jakub Jelinek : https://gcc.gnu.org/g:b8faf1fca42a9b987fec0992ca5d63995b2640b3 commit r14-6941-gb8faf1fca42a9b987fec0992ca5d63995b2640b3 Author: Jakub Jelinek Date:

[Bug tree-optimization/113201] [14 Regression] internal compiler error: tree check: expected ssa_name, have integer_cst in replace_uses_by, at tree-cfg.cc:2058

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113201 --- Comment #4 from Jakub Jelinek --- Should be fixed now.

Ping #2 [patch,avr] PR112944: Support .rodata in RAM for AVR64* and AVR128* devices

Ping #2 https://gcc.gnu.org/pipermail/gcc-patches/2023-December/640140.html FYI, Binutils https://sourceware.org/PR31124 is upstream. Johann This is a patch that locates .rodata in flash for some AVR devices that can support it. All new functionality depends on Binutils PR31124 and is

[committed] libstdc++: Fix std::char_traits::move [PR113200]

Tested x86_64-linux. Pushed to trunk. Backports needed too. -- >8 -- The current constexpr implementation of std::char_traits::move relies on being able to compare the pointer parameters, which is not allowed for unrelated pointers. We can use __builtin_constant_p to determine whether it's safe

[PATCH] aarch64: Further fix for throwing insns in ldp/stp pass [PR113217]

As the PR shows, the fix in r14-6916-g057dc349021660c40699fb5c98fd9cac8e168653 was not complete. That fix was enough to stop us trying to move throwing accesses above nondebug insns, but due to this code in try_fuse_pair: // Placement strategy: push loads down and pull stores up, this should

Re: [PATCH v3 2/3] libatomic: Enable LSE128 128-bit atomics for armv9.4-a

Victor Do Nascimento writes: > The armv9.4-a architectural revision adds three new atomic operations > associated with the LSE128 feature: > > * LDCLRP - Atomic AND NOT (bitclear) of a location with 128-bit > value held in a pair of registers, with original data loaded into > the same 2

Re: [PATCH]middle-end: Don't apply copysign optimization if target does not implement optab [PR112468]

On Fri, 2024-01-05 at 11:02 +, Tamar Christina wrote: > Ok, so something like: > > > > ([istarget loongarch*-*-*] && > > > ([check_effective_target_loongarch_sx] ||  > > > [check_effective_target_hard_float])) > ? We don't need "[check_effective_target_loongarch_sx] ||" because SIMD requires

Re: [pushed][PATCH v3] LoongArch: testsuite:Added support for vector object detection.

pushed to r14-6954. 在 2024/1/5 下午2:05, chenxiaolong 写道: - Change the default vectorization "-mlasx" option to "-mlsx" because there are many non-aligned memory accesses when using 256-bit vectorization. - The following detection procedure is added to the target-supports.exp file:

Re: Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc

On 18/12/23 09:36 +0100, Martin Küttler wrote: This is a small change to libstdc++ which does not change any behavior. Please CC the libstd...@gcc.gnu.org list on all libstdc++ patches, as documented at https://gcc.gnu.org/lists.html Otherwise I won't see the patches unless I happen to glance

Re: Patch: Remove unneeded double operation in libstdc++-v3/src/c++17/fs_path.cc

On Fri, 5 Jan 2024 at 13:00, Martin Küttler wrote: > > > >>This is a small change to libstdc++ which does not change any behavior. > > > > Please CC the libstd...@gcc.gnu.org list on all libstdc++ patches, as > > documented at https://gcc.gnu.org/lists.html > > Acknowledged. Sorry. > > >>This

[Bug tree-optimization/113145] [14 regression] ICE in verify_dominators when building mit-krb5-1.21.2 since r14-6822-g01f4251b8775c8

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113145 Martin Jambor changed: What|Removed |Added Summary|[14 regression] ICE when|[14 regression] ICE in

[Bug middle-end/113205] [14 Regression] internal compiler error: in backward_pass, at tree-vect-slp.cc:5346

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113205 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

Re: [EXTERNAL] Re: Fw: [RFC] Either fix or disable SME feature for `aarch64-w64-mingw32` target?

Hello, Andrew. Thank you for your input. I've updated the "fixing" patch according to your feedback. Please let me know if I understood it correctly. Radek From: Andrew Pinski Sent: Thursday, January 4, 2024 8:11 PM To: Radek Barton ; Andrew Pinski (QUIC)

[committed] libstdc++: Avoid overflow when appending to std::filesystem::path

Tested x86_64-linux. Pushed to trunk. -- >8 -- This prevents a std::filesystem::path from exceeding INT_MAX/4 components (which is unlikely to ever be a problem except on 16-bit targets). That limit ensures that the capacity*1.5 calculation doesn't overflow. We should also check that we don't

[Bug target/110796] builtin_iseqsig fails some tests in armv8l-linux-gnueabihf

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110796 Xi Ruoyao changed: What|Removed |Added CC||xry111 at gcc dot gnu.org --- Comment #13

[Bug c++/113242] g++ rejects-valid template argument of class type containing an lvalue reference

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113242 Patrick Palka changed: What|Removed |Added Ever confirmed|0 |1 Last reconfirmed|

[PATCH] libgccjit: Add support for setting the comment ident

Hi. This patch adds support for setting the comment ident (analogous to #ident "comment" in C). Thanks for the review. From 1af4e77540001cce8c30e86040c1da785e435810 Mon Sep 17 00:00:00 2001 From: Antoni Boucher Date: Fri, 27 Oct 2023 17:36:03 -0400 Subject: [PATCH] libgccjit: Add support for

[Bug target/113229] [14 Regression] gcc.dg/torture/pr70083.c ICEs when compiled with -march=armv9-a+sve2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113229 --- Comment #5 from avieira at gcc dot gnu.org --- Oh forgot to mention, this is triggering because of the div optimization in: https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=c69db3ef7f7d82a50f46038aa5457b7c8cc2d643 But I suspect that too is

[Bug target/113229] [14 Regression] gcc.dg/torture/pr70083.c ICEs when compiled with -march=armv9-a+sve2

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113229 --- Comment #6 from avieira at gcc dot gnu.org --- Oh forgot to mention, this is triggering because of the div optimization in: https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=c69db3ef7f7d82a50f46038aa5457b7c8cc2d643 But I suspect that too is

[PATCH v2 2/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops

Respin after comments on first version. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 2f5ca79ed8d..4f164c54740 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -65,8 +65,8 @@ extern void arm_emit_speculation_barrier_function (void);

Re: [middle-end PATCH take #2] Only call targetm.truly_noop_truncation for truncations.

"Roger Sayle" writes: > Very many thanks (and a Happy New Year) to the pre-commit > patch testing folks at linaro.org. Their testing has revealed that > although my patch is clean on x86_64, it triggers some problems > on aarch64 and arm. The issue (with the previous version of my > patch) is

[Bug target/113243] New: mips: Wrong code for pr91323.c

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113243 Bug ID: 113243 Summary: mips: Wrong code for pr91323.c Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target

[PATCH] Keep track of the FUNCTION_BEG note

function.cc emits a NOTE_FUNCTION_BEG after all arguments have been copied to pseudos. It then records this note in parm_birth_insn. Various other pieces of code use this insn as a convenient place to insert things at the start of the function. However, cfgexpand later changes parm_birth_insn as

[Bug sanitizer/113244] New: Potential thread sanitizer false positive with future exception

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113244 Bug ID: 113244 Summary: Potential thread sanitizer false positive with future exception Product: gcc Version: 13.2.1 Status: UNCONFIRMED Severity: normal

[Bug rtl-optimization/113048] [13/14 Regression] ICE: in lra_split_hard_reg_for, at lra-assigns.cc:1862 (unable to find a register to spill) {*andndi3_doubleword_bmi} with -march=cascadelake since r13

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113048 --- Comment #6 from Manuel Lauss --- After be977db17c91ad6627dee70a1904a95d229aa1be I don't see this ICE any longer on either x64 or mips bootstrap.

Re: [RFA] [V3] new pass for sign/zero extension elimination

On 1/4/24 13:44, Xi Ruoyao wrote: I have successfully bootstrapped and regtested the patch on loongarch64- linux-gnu. The test cases in the patch (intended for RISC-V) also works on LoongArch per my manual testing. I find myself wondering if we should create some kind of target-supports

[Bug tree-optimization/113104] Suboptimal loop-based slp node splicing across iterations

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113104 --- Comment #5 from GCC Commits --- The trunk branch has been updated by Richard Sandiford : https://gcc.gnu.org/g:7328faf89e9b4953baaff10e18262c70fbd3e578 commit r14-6961-g7328faf89e9b4953baaff10e18262c70fbd3e578 Author: Richard Sandiford

[PATCH] c++: address of NTTP object as targ [PR113242]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk and perhaps 13? -- >8 -- invalid_tparm_referent_p was rejecting using the address of a class NTTP object as a template argument, but this should be fine. PR c++/113242 gcc/cp/ChangeLog: * pt.cc

Re: [PATCH] Add a late-combine pass [PR106594]

Jeff Law writes: > On 10/24/23 12:49, Richard Sandiford wrote: >> This patch adds a combine pass that runs late in the pipeline. >> There are two instances: one between combine and split1, and one >> after postreload. > So have you done any investigation on cases caught by your new pass >

[PATCH v2 1/2] arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns

Respin of first version to address comments and make it buildable on its own. diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index a9c2752c0ea..f0b01b7461f 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -2375,6 +2375,21 @@ extern int making_const_table; else if

[PATCH v2 0/2] arm: Add support for MVE Tail-Predicated Low Overhead Loops

Hi, Resending series version 2 addression comments on first version, also moved parts of the first patch to the second so it can be built without the second patch. Andre Vieira (2): arm: Add define_attr to to create a mapping between MVE predicated and unpredicated insns arm: Add support

Re: [committed] RISC-V: Add crypto vector builtin function.

On 1/4/24 20:24, Palmer Dabbelt wrote: On Thu, 04 Jan 2024 19:17:21 PST (-0800), juzhe.zh...@rivai.ai wrote: Hi, Wang Feng. Your patch has some ICEs: FAIL: gcc.target/riscv/rvv/base/zvbc-intrinsic.c (internal compiler error: RTL check: expected code 'const_int', have 'reg' in

[pushed] aarch64: Extend VECT_COMPARE_COSTS to !SVE [PR113104]

When SVE is enabled, we try vectorising with multiple different SVE and Advanced SIMD approaches and use the cost model to pick the best one. Until now, we've not done that for Advanced SIMD, since "the first mode that works should always be the best". The testcase is a counterexample. Each

[Bug libstdc++/108976] codecvt for Unicode allows surrogate code points

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108976 --- Comment #9 from Dimitrij Mijoski --- I believe this bug report should closed as resolved. Are there maybe plans for back-porting?

[Bug debug/78100] DWARF symbols for an array sometimes missing the array length

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78100 --- Comment #4 from Dima Kogan --- I just tried again, and I see that this bug has been fixed. I'm using gcc (Debian 13.2.0-2) 13.2.0 Should we close this report?

[Bug tree-optimization/113210] [14 Regression] ICE: tree check: expected integer_cst, have cond_expr in get_len, at tree.h:6481

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113210 Jakub Jelinek changed: What|Removed |Added CC||jakub at gcc dot gnu.org --- Comment

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