Hello All:
Common infrastructure using generic code for pair mem fusion of different
targets.
rs6000 target specific specific code implements virtual functions defined
by generic code.
Code is implemented with pure virtual functions to interface with target
code.
Target specific code are added
Hello Richard:
On 30/05/24 4:44 pm, Richard Sandiford wrote:
> Thanks for the update. Some comments below, but looks very close
> to ready.
>
Thanks a lot.
> Ajit Agarwal writes:
>> diff --git a/gcc/pair-fusion.cc b/gcc/pair-fusion.cc
>> new file mode 100644
>>
e changes, but you'll need Richard S to approve.
>
> Thanks a lot for doing this.
>
> On 22/05/2024 00:16, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments are addressed.
>>
>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
>
Hello Alex:
On 21/05/24 10:22 pm, Alex Coplan wrote:
> Hi Ajit,
>
> I've left some more comments below. It's getting there now, thanks for
> your patience.
>
> On 21/05/2024 20:32, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments are address
Hello Alex:
On 21/05/24 6:50 pm, Alex Coplan wrote:
> On 20/05/2024 21:50, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
>> to support multiple targets.
>>
>> Common infrastructu
Hello Alex:
On 21/05/24 6:02 pm, Alex Coplan wrote:
> On 21/05/2024 16:02, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 21/05/24 1:16 am, Alex Coplan wrote:
>>> On 20/05/2024 18:44, Alex Coplan wrote:
>>>> Hi Ajit,
>>>>
>>>>
Hello Alex:
On 21/05/24 1:16 am, Alex Coplan wrote:
> On 20/05/2024 18:44, Alex Coplan wrote:
>> Hi Ajit,
>>
>> On 20/05/2024 21:50, Ajit Agarwal wrote:
>>> Hello Alex/Richard:
>>>
>>> Move pair fusion pass from aarch64-ldp-fusion.cc to middle-end
Hello Alex/Richard:
Renaming of generic code is done to make target independent
and target dependent code to support multiple targets.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Target dependent code is the
gt;probably there are other bits too).
> - Move the generic parts out of gcc/config/aarch64 to a .cc file in the
>middle-end.
>
> I'll let Richard S make the final judgement on that. I don't really
> mind either way.
>
> On 15/05/2024 15:06, Ajit Agarwal wrote:
>&
Hello Richard:
On 17/05/24 11:07 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Alex/Richard:
>>
>> All review comments are addressed.
>>
>> Common infrastructure of load store pair fusion is divided into target
>> independent and targ
Hello Alex/Richard:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface between target independent and dependent
Hello Alex:
On 17/05/24 6:22 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 17/05/2024 18:05, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 16/05/24 10:21 pm, Alex Coplan wrote:
>>> Hi Ajit,
>>>
>>> Thanks a lot for working through the review f
n that. I don't really
> mind either way.
Sure.
Thanks & Regards
Ajit
>
> On 15/05/2024 15:06, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All review comments are addressed.
>>
>> Common infrastructure of load store pair fusion is divided
ew.
>
Sorry for the inconvenience caused. Hopefully I have incorporated
all the comments in v6 version of the patch.
> On 14/05/2024 15:08, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All comments are addressed.
>>
>> Common infrastructure of load store p
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface between target independent and
>
There were issues sending the patch through thunderbird, hence multople
pacthes. Sorry for inconvenience caused.
> Mostly the comments below are just style nits and things you missed from
> the last review(s) (please try not to miss so many in the future).
>
Addressed.
> On
Hello Alex/Richard:
All review comments are incorporated.
Changes since v4:
- changed prototype of destructure_pair from rti parameter to pattern
parameter.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target
Hello Alex/Richard:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent
Hello Alex/Richard:
All comments are addressed.
There were some issues in sending the patch sending it again.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Hello Alex:
All comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and dependent code.
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and
omments. It's important to have good clear comments for
> functions with the parameters (and return value, if any) clearly
> described. See https://www.gnu.org/prep/standards/standards.html#Comments
>
> Note that this now needs a little rebasing, too.
>
Done.
> On 21/04/202
Hello Alex:
On 14/04/24 10:29 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 11:02 pm, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 12/04/24 8:15 pm, Alex Coplan wrote:
>>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>>> Hello Alex:
Hello Alex/Richard:
All review comments are addressed and changes are made to transform_for_base
function as per consensus.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure
Hello Alex:
On 12/04/24 11:02 pm, Ajit Agarwal wrote:
> Hello Alex:
>
> On 12/04/24 8:15 pm, Alex Coplan wrote:
>> On 12/04/2024 20:02, Ajit Agarwal wrote:
>>> Hello Alex:
>>>
>>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>>> On
Hello Alex:
On 12/04/24 8:15 pm, Alex Coplan wrote:
> On 12/04/2024 20:02, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 11/04/24 7:55 pm, Alex Coplan wrote:
>>> On 10/04/2024 23:48, Ajit Agarwal wrote:
>>>> Hello Alex:
>>>>
>
Hello Alex:
On 11/04/24 7:55 pm, Alex Coplan wrote:
> On 10/04/2024 23:48, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 10/04/24 7:52 pm, Alex Coplan wrote:
>>> Hi Ajit,
>>>
>>> On 10/04/2024 15:31, Ajit Agarwal wrote:
>>>> Hello Alex
Hello Alex:
On 10/04/24 7:52 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 10/04/2024 15:31, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 10/04/24 1:42 pm, Alex Coplan wrote:
>>> Hi Ajit,
>>>
>>> On 09/04/2024 20:59, Ajit Agarwal wrote:
>>>
Hello Alex/Richard:
All comments are addressed in this version-1 of the patch.
Common infrastructure of load store pair fusion is divded into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target
Hello Alex:
On 10/04/24 1:42 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 09/04/2024 20:59, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 09/04/24 8:39 pm, Alex Coplan wrote:
>>> On 09/04/2024 20:01, Ajit Agarwal wrote:
>>>> Hello Alex:
>>>>
Hello Alex:
On 09/04/24 8:39 pm, Alex Coplan wrote:
> On 09/04/2024 20:01, Ajit Agarwal wrote:
>> Hello Alex:
>>
>> On 09/04/24 7:29 pm, Alex Coplan wrote:
>>> On 09/04/2024 17:30, Ajit Agarwal wrote:
>>>>
>>>>
>>>> On 05/04/24 10
Hello Alex:
On 09/04/24 7:29 pm, Alex Coplan wrote:
> On 09/04/2024 17:30, Ajit Agarwal wrote:
>>
>>
>> On 05/04/24 10:03 pm, Alex Coplan wrote:
>>> On 05/04/2024 13:53, Ajit Agarwal wrote:
>>>> Hello Alex/Richard:
>>>>
>>>>
On 05/04/24 10:03 pm, Alex Coplan wrote:
> On 05/04/2024 13:53, Ajit Agarwal wrote:
>> Hello Alex/Richard:
>>
>> All review comments are incorporated.
>
> Thanks, I was kind-of expecting you to also send the renaming patch as a
> preparatory patch as we discusse
Hello Alex/Richard:
All review comments are addressed.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and
Hello Alex:
On 03/04/24 8:51 pm, Alex Coplan wrote:
> On 23/02/2024 16:41, Ajit Agarwal wrote:
>> Hello Richard/Alex/Segher:
>
> Hi Ajit,
>
> Sorry for the delay and thanks for working on this.
>
> Generally this looks like the right sort of approach (IMO) but I've
Hello Alex/Richard:
All review comments are incorporated.
Common infrastructure of load store pair fusion is divided into target
independent and target dependent changed code.
Target independent code is the Generic code with pure virtual function
to interface betwwen target independent and
On 23/03/24 9:33 pm, Peter Bergner wrote:
> On 3/23/24 4:33 AM, Ajit Agarwal wrote:
>>>> - else if (align_words < GP_ARG_NUM_REG)
>>>> + else if (align_words < GP_ARG_NUM_REG
>>>> + || (cum->hidden_string_length
>>>
Hello Peter:
Sent version-3 of the patch addressing below review comments.
Thanks & Regards
Ajit
On 23/03/24 3:03 pm, Ajit Agarwal wrote:
> Hello Peter:
>
> On 23/03/24 10:07 am, Peter Bergner wrote:
>> On 3/22/24 5:15 AM, Ajit Agarwal wrote:
>>> When using FlexiB
Hello All:
When using FlexiBLAS with OpenBLAS, we noticed corruption of the caller
stack frame when calling OpenBLAS functions. This was caused by the
FlexiBLAS C/C++ caller and OpenBLAS Fortran callee disagreeing on the
number of function parameters in the callee due to hidden Fortran
Hello Peter:
On 23/03/24 10:07 am, Peter Bergner wrote:
> On 3/22/24 5:15 AM, Ajit Agarwal wrote:
>> When using FlexiBLAS with OpenBLAS we noticed corruption of
>> the parameters passed to OpenBLAS functions. FlexiBLAS
>> basically provides a BLAS interface where each
Hello Jakub:
Thanks for review. Addressed below review comments and sent
version 2 of the patch for review.
Thanks & Regards
Ajit
On 22/03/24 3:06 pm, Jakub Jelinek wrote:
> On Fri, Mar 22, 2024 at 02:55:43PM +0530, Ajit Agarwal wrote:
>> rs6000: Stackoverflow in optimized code on
Hello All:
This is version-2 of the patch with review comments addressed.
When using FlexiBLAS with OpenBLAS we noticed corruption of
the parameters passed to OpenBLAS functions. FlexiBLAS
basically provides a BLAS interface where each function
is a stub that forwards the arguments to a real
Hello Jakub:
Addressed the below comments and sent version 1 of the patch
for review.
Thanks & Regards
Ajit
On 22/03/24 1:15 pm, Jakub Jelinek wrote:
> On Fri, Mar 22, 2024 at 01:00:21PM +0530, Ajit Agarwal wrote:
>> When using FlexiBLAS with OpenBLAS we noticed corruption of
>
Hello Jakub:
When using FlexiBLAS with OpenBLAS we noticed corruption of
the parameters passed to OpenBLAS functions. FlexiBLAS
basically provides a BLAS interface where each function
is a stub that forwards the arguments to a real BLAS lib,
like OpenBLAS.
Fixes the corruption of caller frame
Hello All:
When using FlexiBLAS with OpenBLAS we noticed corruption of
the parameters passed to OpenBLAS functions. FlexiBLAS
basically provides a BLAS interface where each function
is a stub that forwards the arguments to a real BLAS lib,
like OpenBLAS.
Fixes the corruption of caller frame
Hello Richard/Alex:
Ping!
Please reply.
Thanks & Regards
Ajit
On 27/02/24 12:33 pm, Ajit Agarwal wrote:
> Hello Richard/Alex:
>
> This patch has better diff with changed and unchanged code.
> Unchanged code and some of the changed code will be extracted
> into target
Hello All:
Common infrastructure using generic code for load store fusion of rs6000
target.
Generic code are implemented and defined that can be used in target specific
code for aarch64 and rs6000 target.
Generic code are implemeneted in gcc/pair-fusion-base.h,
gcc/pair-fusion-common.cc
and
Hello All:
Common infrastructure using generic code for load store fusion of rs6000
target.
This patch is split-patch 0 which uses generic code are implemented and defined
that can be used in target specific code for aarch64 and rs6000 target.
Generic code are implemeneted in
Hello All:
Common infrastructure using generic code for load store fusion of rs6000
target.
Generic code are implemented and defined that can be used in target specific
code for aarch64 and rs6000 target.
Generic code are implemeneted in gcc/pair-fusion-base.h,
gcc/pair-fusion-common.cc
and
Hello All:
Common infrastructure using generic code for load store fusion of rs6000
target.
This patch is split-patch 0 which uses generic code are implemented and defined
that can be used in target specific code for aarch64 and rs6000 target.
Generic code are implemeneted in
Hello Richard:
Currently, code sinking will sink code at the use points with loop having same
nesting depth. The following patch improves code sinking by placing the sunk
code in begining of the block after the labels.
For example :
void bar();
int j;
void foo(int a, int b, int c, int d, int e,
Hello All:
For rs6000 target we see redundant zero and sign extension and done to improve
ree pass to eliminate such redundant zero and sign extension. Support of
zero_extend/sign_extend/AND. Also support of AND with extension with different
constants like 0x7/0x7F/0x7 other than 1.
Changes
Hello All:
Currently, code sinking will sink code at the use points with loop having same
nesting depth. The following patch improves code sinking by placing the sunk
code in immediate dominator with same loop nest depth.
Changes since v11:
Reorganization of the code.
For example :
void
Hello Segher:
On 01/03/24 3:02 am, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Feb 19, 2024 at 04:24:37PM +0530, Ajit Agarwal wrote:
>> --- a/gcc/config.gcc
>> +++ b/gcc/config.gcc
>> @@ -518,7 +518,7 @@ or1k*-*-*)
>> ;;
>> powerpc*-*-*)
>>
-fusion
Please review.
Thanks & Regards
Ajit
On 23/02/24 4:41 pm, Ajit Agarwal wrote:
> Hello Richard/Alex/Segher:
>
> This patch adds the changed code for target independent and
> dependent code for load store fusion.
>
> Common infrastructure of load store pair fusion is
Hello Richard:
On 23/02/24 1:19 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Alex/Richard:
>>
>> I have placed target indpendent and target dependent code in
>> aarch64-ldp-fusion for load store fusion.
>>
>> Common infrastructu
Hello Richard/Alex/Segher:
This patch adds the changed code for target independent and
dependent code for load store fusion.
Common infrastructure of load store pair fusion is
divided into target independent and target dependent
changed code.
Target independent code is the Generic code with
Hello All:
Changes in V3 since V2 patch.
Fdllowing changes are done in this patch.
a) Remove commented asserted code in rtl-ssa/changes.cc
b) Handle such code in rs6000-vecload-fusion.cc.
Same as V2:
Common infrastructure using generic code for load store fusion of rs6000
target.
Generic
Hello All:
This patch is for load store fusion for rs6000 target using common
infrastructure.
Common infrastructure using generic code for load store fusion of rs6000
target.
Generic code are implemented and defined that can be used in target specific
code for aarch64 and rs6000 target.
Hello Alex/Richard:
I have placed target indpendent and target dependent code in
aarch64-ldp-fusion for load store fusion.
Common infrastructure of load store pair fusion is divided into
target independent and target dependent code.
Target independent code is the Generic code with pure virtual
On 15/02/24 10:43 pm, Alex Coplan wrote:
> So IIUC Richard was suggesting splitting into target-independent and
> target-dependent pieces within aarch64-ldp-fusion.cc as a first step,
> i.e. you introduce the abstractions (virtual functions) needed within
> that file. That should hopefully be
Hello Alex:
On 15/02/24 10:12 pm, Alex Coplan wrote:
> On 15/02/2024 21:24, Ajit Agarwal wrote:
>> Hello Richard:
>>
>> As per your suggestion I have divided the patch into target independent
>> and target dependent for aarch64 target. I kept aarch64-ldp-fusion
Hello Richard:
As per your suggestion I have divided the patch into target independent
and target dependent for aarch64 target. I kept aarch64-ldp-fusion same
and did not change that.
Common infrastructure of load store pair fusion is divided into
target independent and target dependent code for
Hello Richard:
On 15/02/24 2:21 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> Hello Richard:
>>
>>
>> On 14/02/24 10:45 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> diff --git a/gcc/emit-rtl.cc b/gcc/em
Hello Richard:
On 15/02/24 1:14 am, Richard Sandiford wrote:
> Ajit Agarwal writes:
>> On 14/02/24 10:56 pm, Richard Sandiford wrote:
>>> Ajit Agarwal writes:
>>>>>> diff --git a/gcc/df-problems.cc b/gcc/df-problems.cc
>>>>>> index 88ee0dd67
Hello Richard:
On 14/02/24 10:45 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>> diff --git a/gcc/emit-rtl.cc b/gcc/emit-rtl.cc
>>>> index 1856fa4884f..ffc47a6eaa0 100644
>>>> --- a/gcc/emit-rtl.cc
>>>> +++ b/gcc/emit-rtl.cc
>>&
On 14/02/24 10:56 pm, Richard Sandiford wrote:
> Ajit Agarwal writes:
>>>> diff --git a/gcc/df-problems.cc b/gcc/df-problems.cc
>>>> index 88ee0dd67fc..a8d0ee7c4db 100644
>>>> --- a/gcc/df-problems.cc
>>>> +++ b/gcc/df-problems.cc
>>>
Hello Sam:
On 14/02/24 10:50 pm, Sam James wrote:
>
> Ajit Agarwal writes:
>
>> Hello Richard:
>>
>>
>> On 14/02/24 4:03 pm, Richard Sandiford wrote:
>>> Hi,
>>>
>>> Thanks for working on this.
>>>
>>> You posted
On 14/02/24 7:22 pm, Ajit Agarwal wrote:
> Hello Richard:
>
>
> On 14/02/24 4:03 pm, Richard Sandiford wrote:
>> Hi,
>>
>> Thanks for working on this.
>>
>> You posted a version of this patch on Sunday too. If you need to repost
>> to fix bug
Hello Richard:
On 14/02/24 4:03 pm, Richard Sandiford wrote:
> Hi,
>
> Thanks for working on this.
>
> You posted a version of this patch on Sunday too. If you need to repost
> to fix bugs or make other improvements, could you describe the changes
> that you've made since the previous
Hello Alex:
On 24/01/24 10:13 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 21/01/2024 19:57, Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> New pass to replace adjacent memory addresses lxv with lxvp.
>> Added common infrastructure for load store fusio
Hello Alex:
Thanks for your valuable review comments.
I am incorporating the comments and would send the patch with rs6000 and
AARCH64 changes.
Thanks & Regards
Ajit
On 24/01/24 10:13 pm, Alex Coplan wrote:
> Hi Ajit,
>
> On 21/01/2024 19:57, Ajit Agarwal wrote:
>>
>
Hello All:
New pass to replace adjacent memory addresses lxv with lxvp.
Added common infrastructure for load store fusion for
different targets.
Common routines are refactored in fusion-common.h.
AARCH64 load/store fusion pass is not changed with the
common infrastructure.
For AARCH64
Hello All:
New pass to replace adjacent memory addresses lxv with lxvp.
Added common infrastructure for load store fusion for
different targets.
Common routines are refactored in fusion-common.h.
AARCH64 load/store fusion pass is not changed with the
common infrastructure.
For AARCH64
Hello Michael:
On 17/01/24 7:58 pm, Michael Matz wrote:
> Hello,
>
> On Wed, 17 Jan 2024, Ajit Agarwal wrote:
>
>>> first is even, since OOmode is only ok for even vsx register and its
>>> size makes it take two consecutive vsx registers.
>>>
&g
Hello Kewen:
On 17/01/24 12:32 pm, Kewen.Lin wrote:
> on 2024/1/16 06:22, Ajit Agarwal wrote:
>> Hello Richard:
>>
>> On 15/01/24 6:25 pm, Ajit Agarwal wrote:
>>>
>>>
>>> On 15/01/24 6:14 pm, Ajit Agarwal wrote:
>>>> Hello Richard:
>&
Hello Richard:
On 15/01/24 6:25 pm, Ajit Agarwal wrote:
>
>
> On 15/01/24 6:14 pm, Ajit Agarwal wrote:
>> Hello Richard:
>>
>> On 15/01/24 3:03 pm, Richard Biener wrote:
>>> On Sun, Jan 14, 2024 at 4:29 PM Ajit Agarwal wrote:
>>>>
>>&
On 15/01/24 6:14 pm, Ajit Agarwal wrote:
> Hello Richard:
>
> On 15/01/24 3:03 pm, Richard Biener wrote:
>> On Sun, Jan 14, 2024 at 4:29 PM Ajit Agarwal wrote:
>>>
>>> Hello All:
>>>
>>> This patch add the vecload pass to replace adjacent
Hello Richard:
On 15/01/24 3:03 pm, Richard Biener wrote:
> On Sun, Jan 14, 2024 at 4:29 PM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> This patch add the vecload pass to replace adjacent memory accesses lxv with
>> lxvp
>> instructions. This pass is ad
Hello All:
Following performance gains for spec2017 FP benchmarks.
554.roms_r 16% gains
544.nab_r 9.98% gains
521.wrf_r 6.89% gains.
Thanks & Regards
Ajit
On 14/01/24 8:55 pm, Ajit Agarwal wrote:
> Hello All:
>
> This patch add the vecload pass to replace adjacent memory
Hello All:
This patch add the vecload pass to replace adjacent memory accesses lxv with
lxvp
instructions. This pass is added before ira pass.
vecload pass removes one of the defined adjacent lxv (load) and replace with
lxvp.
Due to removal of one of the defined loads the allocno is has only
Hello All:
This pass is registered before ira rtl pass.
Bootstrapped and regtested for powerpc64-linux-gnu.
No regressions for spec 2017 benchmarks and improvements for some of the
FP and INT benchmarks.
Vladimir:
I did modify IRA and LRA register Allocators. Please review.
Thanks & Regards
Hello Kewen:
On 12/12/23 11:58 am, Kewen.Lin wrote:
> Hi Ajit,
>
> on 2023/12/8 16:01, Ajit Agarwal wrote:
>> Hello Kewen:
>>
>
> [snip...]
>
>> With UNSPEC_MMA_EXTRACT I could generate the register pair but functionally
>> here is the
>> below
Hello Kewen:
On 07/12/23 4:31 pm, Ajit Agarwal wrote:
> Hello Kewen:
>
> On 06/12/23 7:52 am, Kewen.Lin wrote:
>> on 2023/12/6 02:01, Ajit Agarwal wrote:
>>> Hello Kewen:
>>>
>>>
>>> On 05/12/23 7:13 pm, Ajit Agarwal wrote:
>>>&
Hello Kewen:
On 06/12/23 7:52 am, Kewen.Lin wrote:
> on 2023/12/6 02:01, Ajit Agarwal wrote:
>> Hello Kewen:
>>
>>
>> On 05/12/23 7:13 pm, Ajit Agarwal wrote:
>>> Hello Kewen:
>>>
>>> On 04/12/23 7:31 am, Kewen.Lin wrote:
>>>> Hi A
Hello Kewen:
On 05/12/23 7:13 pm, Ajit Agarwal wrote:
> Hello Kewen:
>
> On 04/12/23 7:31 am, Kewen.Lin wrote:
>> Hi Ajit,
>>
>> on 2023/12/1 17:10, Ajit Agarwal wrote:
>>> Hello Kewen:
>>>
>>> On 24/11/23 3:01 pm, Kewen.Lin wrote:
&
Hello Kewen:
On 04/12/23 7:31 am, Kewen.Lin wrote:
> Hi Ajit,
>
> on 2023/12/1 17:10, Ajit Agarwal wrote:
>> Hello Kewen:
>>
>> On 24/11/23 3:01 pm, Kewen.Lin wrote:
>>> Hi Ajit,
>>>
>>> Don't forget to CC David (CC-ed) :), some commen
On 28/11/23 3:14 pm, Kewen.Lin wrote:
> on 2023/11/28 15:05, Michael Meissner wrote:
>> I tried using this patch to compare with the vector size attribute patch I
>> posted. I could not build it as a cross compiler on my x86_64 because the
>> assembler gives the following error:
>>
>> Error:
Hello Kewen:
On 24/11/23 3:01 pm, Kewen.Lin wrote:
> Hi Ajit,
>
> Don't forget to CC David (CC-ed) :), some comments are inlined below.
>
> on 2023/10/8 03:04, Ajit Agarwal wrote:
>> Hello All:
>>
>> This patch add new pass to replace contiguous addre
Hello All:
I am working on fixing the below issues and incorporating comments from Kewen
and
Michael.
Thanks & Regards
Ajit
On 28/11/23 9:11 pm, Michael Meissner wrote:
> On Tue, Nov 28, 2023 at 05:44:43PM +0800, Kewen.Lin wrote:
>> on 2023/11/28 15:05, Michael Meissner wrote:
>>> I tried
Ping ^3!
Thanks & Regards
Ajit
Forwarded Message
Subject: [PING ^3][PATCH v2] rs6000: Add new pass for replacement of contiguous
addresses vector load lxv with lxvp
Date: Mon, 27 Nov 2023 10:15:26 +0530
From: Ajit Agarwal
To: Kewen.Lin , Segher Boessenkool
, Peter Ber
Ping^2!
Forwarded Message
Subject: [PING ^1] [PATCH v2 3/4] Improve functionality of ree pass with
various constants with AND operation.
Date: Fri, 10 Nov 2023 12:39:02 +0530
From: Ajit Agarwal
To: gcc-patches
CC: Jeff Law , Vineet Gupta ,
Richard Biener , Segher
Ping ^2!
Ok for trunk?
Thanks & Regards
Ajit
Forwarded Message
Subject: [PING][PATCH V15 4/4] ree: Improve ree pass using defined abi
interfaces
Date: Fri, 10 Nov 2023 12:37:25 +0530
From: Ajit Agarwal
To: Vineet Gupta , Jeff Law ,
Bernhard Reutner-Fischer
CC: Ric
On 21/11/23 3:15 pm, Ajit Agarwal wrote:
>
>
> On 21/11/23 3:02 pm, Richard Biener wrote:
>> On Tue, Nov 21, 2023 at 9:30 AM Ajit Agarwal wrote:
>>>
>>> Hello All:
>>>
>>> This patch marked LOOP_DATA->live as the livein at the loop header
On 21/11/23 3:02 pm, Richard Biener wrote:
> On Tue, Nov 21, 2023 at 9:30 AM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> This patch marked LOOP_DATA->live as the livein at the loop header basic
>> block. This is because Livein at each basic blo
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