Re: [PATCH] cache compute_objsize results in strlen/sprintf (PR 97373)

On Thu, Nov 5, 2020 at 1:59 AM Martin Sebor via Gcc-patches wrote: > > To determine the target of a pointer expression and the offset into > it, the increasingly widely used compute_objsize function traverses > the IL following the DEF statements of pointer variables, aggregating > offsets from

Re: [PATCH 4/4] IBM Z: Test long doubles in vector registers

On 04.11.20 23:19, Ilya Leoshkevich wrote: > On Wed, 2020-11-04 at 18:28 +0100, Andreas Krebbel wrote: >> These tests all use the -mzvector option but do not appear to make >> use of the z vector languages >> extensions. I think that option could be removed. Then these tests >> should be moved to

Re: [PATCH] middle-end: Store and use the SLP instance kind when aborting load/store lanes

On Thu, 5 Nov 2020, Tamar Christina wrote: > Hi All, > > This patch stores the SLP instance kind in the SLP instance so that we can use > it later when detecting load/store lanes support. > > This also changes the load/store lane support check to only check if the SLP > kind is a store. This

Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

On 04.11.20 23:12, Ilya Leoshkevich wrote: > On Wed, 2020-11-04 at 18:16 +0100, Andreas Krebbel wrote: >> On 03.11.20 22:45, Ilya Leoshkevich wrote: >>> On z14+, there are instructions for working with 128-bit floats >>> (long >>> doubles) in vector registers. It's beneficial to use them instead

Re: [00/32] C++ 20 Modules

Nathan Sidwell writes: > Here is the implementation of C++20 modules that I have been developing > on the devel/c++-modules branch over the last few years. Congrats on reaching this point. > It is not a complete implementation. The major missing pieces are: > > [...] Building C++20

Re: [PATCH v3] pass: Run cleanup passes before SLP [PR96789]

Hi Lyon, Thanks for reporting and sorry for the failure. >> The patch was updated as your comments above, re-tested on Power8 >> and committed in r11-4637. >> > > The new test gcc.dg/tree-ssa/pr96789.c fails on arm: > FAIL: gcc.dg/tree-ssa/pr96789.c scan-tree-dump dse3 "Deleted dead

[PATCH] Replace dep_list_size with dep_list_costs for better scheduling

gcc/ * haifa-sched.c (dep_list_costs): New. (rank_for_schedule): Use dep_list_costs. --- gcc/haifa-sched.c | 26 -- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c index 350178c82b8..62d1816a55d

RE: [PATCH 1/5] [PR target/96342] Change field "simdlen" into poly_uint64

> > Thanks for installing the patch. As you mentioned in the PR, stage1 of > > GCC 11 is going to close in a few weeks, and GCC Development Plan > > describes the stage3 as " During this two-month period, the only > (non-documentation) changes that may be made are changes that fix bugs or > new

Re: PowerPC: Map IEEE 128-bit long double built-in functions

On Wed, Nov 04, 2020 at 06:13:57PM -0600, Segher Boessenkool wrote: > Hi! > > On Thu, Oct 22, 2020 at 06:03:46PM -0400, Michael Meissner wrote: > > To map the scanf functions, is mapped to __isoc99_ieee128. > > Is that correct? What if you are compiling for c90? That is the name in GLIBC. >

Ping: [PATCH 0/4] rs6000: Enable variable vec_insert with IFN VEC_SET

Ping. On 2020/10/10 16:08, Xionghu Luo wrote: Originated from https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554240.html with patch split and some refinement per review comments. Patch of IFN VEC_SET for ARRAY_REF(VIEW_CONVERT_EXPR) is committed, this patch set enables expanding IFN

[PATCH] cache compute_objsize results in strlen/sprintf (PR 97373)

To determine the target of a pointer expression and the offset into it, the increasingly widely used compute_objsize function traverses the IL following the DEF statements of pointer variables, aggregating offsets from POINTER_PLUS assignments along the way. It does that for many statements that

builtins: Add DFP signaling NaN built-in functions

Add built-in functions __builtin_nansd32, __builtin_nansd64 and __builtin_nansd128 to return signaling NaNs of decimal floating-point types, analogous to the functions already present for binary floating-point types. This patch, independent of

Re: PowerPC: Map IEEE 128-bit long double built-in functions

Hi! On Thu, Oct 22, 2020 at 06:03:46PM -0400, Michael Meissner wrote: > To map the scanf functions, is mapped to __isoc99_ieee128. Is that correct? What if you are compiling for c90? > * config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add > support for mapping built-in

[PATCH] middle-end: Store and use the SLP instance kind when aborting load/store lanes

Hi All, This patch stores the SLP instance kind in the SLP instance so that we can use it later when detecting load/store lanes support. This also changes the load/store lane support check to only check if the SLP kind is a store. This means that in order for the load/lanes to work all

Re: [PATCH] "used" attribute saves decl from linker garbage collection

n xyzzy <<<<<<<<< What does it do? .local xyzzy .comm xyzzy,4,4 .ident "GCC: (GNU) 11.0.0 20201103 (experimental)" .section .note.GNU-stack,"",@progbits [hjl@gnu-cfl-2 gcc]$ A symbol directive should operate on the symbol table. With 'R' flag, we got .file "x.c" .text .section .bss.xyzzy,"awR",@nobits .align 4 .type xyzzy, @object .size xyzzy, 4 xyzzy: .zero 4 .ident "GCC: (GNU) 11.0.0 20201104 (experimental)" .section .note.GNU-stack,"",@progbits -- H.J.

Re: [PATCH] libstdc++: Implement C++20 features for

On 04/11/20 21:45 +, Jonathan Wakely wrote: On 04/11/20 12:43 -0800, Thomas Rodgers wrote: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97719 On Nov 4, 2020, at 11:54 AM, Stephan Bergmann wrote: On 07/10/2020 18:55, Thomas Rodgers wrote: From: Thomas Rodgers New ctors and ::view()

Re: [PATCH] i386: Cleanup i386/i386elf.h and align it's return convention with the SVR4 ABI

> So, since the unpatched compiler crashes with an example that would > make a difference, I think the patch is OK as it is. Thanks for taking the time to look at that Uros, and apologies for not getting back to you sooner. With regards to your other question: > So, is it necessary to define

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, 4 Nov 2020, H.J. Lu wrote: > On Wed, Nov 4, 2020 at 1:56 PM Hans-Peter Nilsson wrote: > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > > > > On Wed, Nov 4, 2020 at 1:03 PM Hans-Peter Nilsson > > > wrote: > > > > > > > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > > > > On Wed, Nov 4, 2020 at 10:09

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

On 04.11.20 20:00, Segher Boessenkool wrote: But why are tests in gcc.target/i386/ run for other targets at all?! Those under gcc.target/i386/ contain assembler checks – and are only for x86 and are (hence) also only suitable for x86. But the failing ones for PowerPC (PR97680) and ARM

Re: [PATCH 4/4] IBM Z: Test long doubles in vector registers

On Wed, 2020-11-04 at 18:28 +0100, Andreas Krebbel wrote: > These tests all use the -mzvector option but do not appear to make > use of the z vector languages > extensions. I think that option could be removed. Then these tests > should be moved to the vector subdir. Will change, thanks! > You

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, Nov 4, 2020 at 1:56 PM Hans-Peter Nilsson wrote: > > > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > > On Wed, Nov 4, 2020 at 1:03 PM Hans-Peter Nilsson wrote: > > > > > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > > > On Wed, Nov 4, 2020 at 10:09 AM Hans-Peter Nilsson > > > > wrote: > > > > >

Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

On Wed, 2020-11-04 at 18:16 +0100, Andreas Krebbel wrote: > On 03.11.20 22:45, Ilya Leoshkevich wrote: > > On z14+, there are instructions for working with 128-bit floats > > (long > > doubles) in vector registers. It's beneficial to use them instead > > of > > instructions that operate on

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

On Wed, Nov 04, 2020 at 01:58:26PM -0600, Qing Zhao wrote: > > On Nov 4, 2020, at 1:00 PM, Segher Boessenkool > > wrote: > > On Wed, Nov 04, 2020 at 01:20:58PM +, Richard Sandiford wrote: > >> Tobias Burnus writes: > >>> Three of the testcases fail on PowerPC: > >>>

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, 4 Nov 2020, H.J. Lu wrote: > On Wed, Nov 4, 2020 at 1:03 PM Hans-Peter Nilsson wrote: > > > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > > On Wed, Nov 4, 2020 at 10:09 AM Hans-Peter Nilsson > > > wrote: > > > > > > > > On Wed, 4 Nov 2020, Jozef Lawrynowicz wrote: > > > > > I personally

Re: [PATCH] libstdc++: Implement C++20 features for

On 04/11/20 12:43 -0800, Thomas Rodgers wrote: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97719 On Nov 4, 2020, at 11:54 AM, Stephan Bergmann wrote: On 07/10/2020 18:55, Thomas Rodgers wrote: From: Thomas Rodgers New ctors and ::view() accessor for - * basic_stingbuf *

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, Nov 4, 2020 at 1:03 PM Hans-Peter Nilsson wrote: > > On Wed, 4 Nov 2020, H.J. Lu wrote: > > On Wed, Nov 4, 2020 at 10:09 AM Hans-Peter Nilsson > > wrote: > > > > > > On Wed, 4 Nov 2020, Jozef Lawrynowicz wrote: > > > > I personally do not see the problem with the .retain attribute,

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Wed, 4 Nov 2020, Richard Biener wrote: > AFAICS you do nothing to marshall with the actually used libc > implementation which AFAIU can choose arbitrary values for > the FE_* macros. I'm not sure we require the compiler to be > configured for one specific C library and for example require >

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Wed, 4 Nov 2020, Raoni Fassina Firmino via Gcc-patches wrote: > IMHO, It seems like it is not necessary if there not a libc that have > different values for the FE_* macros. I didn't check other archs, but if > is the case for some other arch I think it could be changed if and when > some

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, 4 Nov 2020, H.J. Lu wrote: > On Wed, Nov 4, 2020 at 10:09 AM Hans-Peter Nilsson wrote: > > > > On Wed, 4 Nov 2020, Jozef Lawrynowicz wrote: > > > I personally do not see the problem with the .retain attribute, however > > > if it is going to be a barrier to getting the functionality

Re: [PATCH] PowerPC: PR libgcc/97543, build libgcc with -mno-gnu-attribute

Hi! On Tue, Nov 03, 2020 at 10:25:05PM -0500, Michael Meissner wrote: > On Sat, Oct 31, 2020 at 11:39:23PM +1030, Alan Modra wrote: > > Why is this is wrong? If you are configuring using > > --without-long-double-128 then that doesn't mean 128-bit long doubles > > are unsupported, it just

Re: [PATCH] libstdc++: Implement C++20 features for

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=97719 > On Nov 4, 2020, at 11:54 AM, Stephan Bergmann wrote: > > On 07/10/2020 18:55, Thomas Rodgers wrote: >> From: Thomas Rodgers >> New ctors and ::view() accessor for - >> * basic_stingbuf >> * basic_istringstream >> * basic_ostringstream

[PATCH, rs6000] Update instruction attributes for Power10

Update instruction attributes for Power10. This patch updates the type/prefixed/dot/size attributes for various new instructions (and a couple existing that were incorrect) in preparation for the Power10 scheduling patch that will be following. Bootstrap/regtest on powerpc64le

Re: [PATCH] arm: Implement vceqq_p64, vceqz_p64 and vceqzq_p64 intrinsics

ping? https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556299.html On Fri, 23 Oct 2020 at 19:20, Christophe Lyon wrote: > > ping? > > On Fri, 16 Oct 2020 at 10:41, Christophe Lyon > wrote: > > > > On Thu, 15 Oct 2020 at 20:10, Andrea Corallo wrote: > > > > > > Hi Christophe, > > > > > >

Re: [Patch][i386][PR97715]: Fix a bug when adding -fzero-call-used-regs=all with -mno-80387

On Wed, Nov 4, 2020 at 9:16 PM Qing Zhao wrote: > > As we discussed in the bug report, we should not zero stack registers when > there is no x87 registers available. > > The following is the fix per Jakub’s suggestion. > > And I have tested it on X86. > > Okay for commit? > > thanks. > > Qing >

[Patch][i386][PR97715]: Fix a bug when adding -fzero-call-used-regs=all with -mno-80387

As we discussed in the bug report, we should not zero stack registers when there is no x87 registers available. The following is the fix per Jakub’s suggestion. And I have tested it on X86. Okay for commit? thanks. Qing From 0080f104df2dc752969a1949981ba343f276e802 Mon Sep 17 00:00:00

Re: [PATCH] [PING] Asan changes for RISC-V.

On Wed, Oct 28, 2020 at 4:59 PM Jim Wilson wrote: > We have only riscv64 asan support, there is no riscv32 support as yet. So > I > need to be able to conditionally enable asan support for the riscv > target. I > implemented this by returning zero from the asan_shadow_offset function. > This >

Go patch committed: Turn off -fipa-icf-functions

Go code expects to be able to do a reliable backtrace and get correct file/line information of callers. This is broken by -fipa-icf-functions, so this Go frontend patch disables that option by default. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian *

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

> On Nov 4, 2020, at 1:00 PM, Segher Boessenkool > wrote: > > On Wed, Nov 04, 2020 at 01:20:58PM +, Richard Sandiford wrote: >> Tobias Burnus writes: >>> Three of the testcases fail on PowerPC: >>> gcc.target/i386/zero-scratch-regs-{9,10,11}.c >>>

Re: [PATCH] libstdc++: Implement C++20 features for

On 07/10/2020 18:55, Thomas Rodgers wrote: From: Thomas Rodgers New ctors and ::view() accessor for - * basic_stingbuf * basic_istringstream * basic_ostringstream * basic_stringstreamm New ::get_allocator() accessor for basic_stringbuf. I found that this

Re: [PATCH] libstdc++: Add support for C++20 barriers

> On Nov 4, 2020, at 10:50 AM, Jonathan Wakely wrote: > > On 04/11/20 09:29 -0800, Thomas Rodgers wrote: >> From: Thomas Rodgers >> >> Adds >> >> libstdc++/ChangeLog: >> >> * include/Makefile.am (std_headers): Add new header. >> * include/Makefile.in: Regenerate. >> *

[10/32] config

I managed to flub sending this yesterday. This is the gcc/configure.ac changes (rebuild configure and config.h.in after applying). Generally just checking for network-related functionality. If it's not available, those features of the module mapper will be unavailable. nathan -- Nathan

[PATCH] c++: Use two levels of caching in satisfy_atom

[ This patch depends on c++: Reuse identical ATOMIC_CONSTRs during normalization https://gcc.gnu.org/pipermail/gcc-patches/2020-November/557929.html ] This improves the effectiveness of caching in satisfy_atom by querying the cache again after we've instantiated the atom's parameter

Re: [patch] Add dg-require-effective-target fpic to an aarch64 specific test in gcc.dg

Olivier Hainque writes: > Hello, > > This patch adds dg-require-effective-target fpic > to an aarch64 specific gcc.dg test using -fPIC, > which helps circumvent a failure we observed while > testing the aarch64 port for VxWorks. > > ok to commit ? OK, thanks. Also OK for any other current or

Re: [ping] aarch64: move and adjust PROBE_STACK_*_REG

Olivier Hainque writes: > Ping, please ? > > Patch re-attached for convenience. Looks OK to me, and I assume Richard would have spoken up by now if he didn't think the patch did what he wanted. > +;; The pair of scratch registers used for stack probing with > -fstack-check. > +;; Leave

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

On Wed, Nov 04, 2020 at 01:20:58PM +, Richard Sandiford wrote: > Tobias Burnus writes: > > Three of the testcases fail on PowerPC: > > gcc.target/i386/zero-scratch-regs-{9,10,11}.c > >powerpc64le-linux-gnu/default/gcc.d/zero-scratch-regs-10.c:77:1: sorry, > > unimplemented:

Re: [PATCH] libstdc++: Add support for C++20 barriers

> On Nov 4, 2020, at 10:52 AM, Jonathan Wakely wrote: > > On 04/11/20 10:41 -0800, Thomas Rodgers wrote: >> From: Thomas Rodgers >> >> IGNORE the previous version of this patch please. > > OK, but all my comments seem to apply to this one too. > Sure :) >> Adds >> >>

Re: [PATCH] libstdc++: Add support for C++20 barriers

On 04/11/20 10:41 -0800, Thomas Rodgers wrote: From: Thomas Rodgers IGNORE the previous version of this patch please. OK, but all my comments seem to apply to this one too. Adds libstdc++/ChangeLog: * include/Makefile.am (std_headers): Add new header. *

Re: [PATCH] libstdc++: Add support for C++20 barriers

On 04/11/20 09:29 -0800, Thomas Rodgers wrote: From: Thomas Rodgers Adds libstdc++/ChangeLog: * include/Makefile.am (std_headers): Add new header. * include/Makefile.in: Regenerate. * include/std/barrier: New file. * testsuite/30_thread/barrier/1.cc: New

[ping*n] aarch64: move and adjust PROBE_STACK_*_REG

Hello, Another ping for this as a new end of stage1 approaches, please ? While this may ring the bell of a more involved issue with ABIs and the use of R18, this particular change doesn't have that kind of implication. Thanks a lot in advance! With Kind Regards, Olivier > On 26 Oct 2020, at

Re: [PATCH][AArch64] Use intrinsics for upper saturating shift right

Thanks for the patch, looks good. David Candler writes: > diff --git a/gcc/config/aarch64/aarch64-builtins.c > b/gcc/config/aarch64/aarch64-builtins.c > index 4f33dd936c7..f93f4e29c89 100644 > --- a/gcc/config/aarch64/aarch64-builtins.c > +++ b/gcc/config/aarch64/aarch64-builtins.c > @@ -254,6

[PATCH] libstdc++: Add support for C++20 barriers

From: Thomas Rodgers IGNORE the previous version of this patch please. Adds libstdc++/ChangeLog: * include/Makefile.am (std_headers): Add new header. * include/Makefile.in: Regenerate. * include/std/barrier: New file. * testsuite/30_thread/barrier/1.cc: New

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, Nov 4, 2020 at 10:09 AM Hans-Peter Nilsson wrote: > > On Wed, 4 Nov 2020, Jozef Lawrynowicz wrote: > > I personally do not see the problem with the .retain attribute, however > > if it is going to be a barrier to getting the functionality committed, I > > am happy to change it, since I

[PATCH] Add Ranger temporal cache

PR 97515 highlighted a bit of silliness that results when we calculate a bunch of ranges by traversing a back edge, and set some values.  Then we eventually visit that block during the DOM walk, and discover the value can be improved, sometimes dramatically.  It is already cached, so

Re: [PATCH,rs6000] Add patterns for combine to support p10 fusion

Ping. Aaron Sawdey, Ph.D. saw...@linux.ibm.com IBM Linux on POWER Toolchain > On Oct 26, 2020, at 4:44 PM, acsaw...@linux.ibm.com wrote: > > From: Aaron Sawdey > > This patch adds the first couple patterns to support p10 fusion. These > will allow combine to create a single insn for a pair

Re: [PATCH, rs6000] Optimize pcrel access of globals (updated, ping)

From: Aaron Sawdey Ping, as it has been a while. This also includes a slight fix to make sure that all references can get optimized. This patch implements a RTL pass that looks for pc-relative loads of the address of an external variable using the PCREL_GOT relocation and a single load or store

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, 4 Nov 2020, Jozef Lawrynowicz wrote: > I personally do not see the problem with the .retain attribute, however > if it is going to be a barrier to getting the functionality committed, I > am happy to change it, since I really just want the functionality in > upstream sources. > > If a

[PATCH] libstdc++: Add support for C++20 barriers

From: Thomas Rodgers Adds libstdc++/ChangeLog: * include/Makefile.am (std_headers): Add new header. * include/Makefile.in: Regenerate. * include/std/barrier: New file. * testsuite/30_thread/barrier/1.cc: New test. * testsuite/30_thread/barrier/2.cc:

Re: [PATCH 4/4] IBM Z: Test long doubles in vector registers

These tests all use the -mzvector option but do not appear to make use of the z vector languages extensions. I think that option could be removed. Then these tests should be moved to the vector subdir. You could do the asm scanning also in dg-do run tests. Andreas On 03.11.20 22:46, Ilya

Re: [PATCH 3/4] IBM Z: Store long doubles in vector registers when possible

On 03.11.20 22:45, Ilya Leoshkevich wrote: > On z14+, there are instructions for working with 128-bit floats (long > doubles) in vector registers. It's beneficial to use them instead of > instructions that operate on floating point register pairs, because it > allows to store 4 times more data in

Re: [PATCH 2/4] IBM Z: Unhardcode NR_C_MODES

On 03.11.20 22:45, Ilya Leoshkevich wrote: > gcc/ChangeLog: > > 2020-11-03 Ilya Leoshkevich > > * config/s390/s390.c (NR_C_MODES): Unhardcode. > (s390_alloc_pool): Use size_t for iterating from 0 to > NR_C_MODES. > (s390_add_constant): Likewise. >

Re: [PATCH 1/4] IBM Z: Remove unused RRe and RXe mode_attrs

On 03.11.20 22:36, Ilya Leoshkevich wrote: > gcc/ChangeLog: > > 2020-11-03 Ilya Leoshkevich > > * config/s390/s390.md (RRe): Remove. > (RXe): Remove. Ok. Thanks! Andreas

RE: [PATCH] rs6000, vector integer multiply/divide/modulo instructions

David: I have reworked the patch moving the new vector instruction patterns to vsx.md. Also, cleaned up the vector division instructions. The div3 pattern definitions are the only ones that should be defined. I have retested the patch on: powerpc64le-unknown-linux-gnu (Power 9 LE) with

Re: [PATCH 5/X] libsanitizer: mid-end: Introduce stack variable handling for HWASAN

Matthew Malcomson writes: > Hi Richard, > > I'm sending up the revised patch 5 (introducing stack variable handling) > without the other changes to other patches. > > I figure there's been quite a lot of changes to this patch and I wanted > to give you time to review them while I worked on

[committed] libstdc++: Fix test failure with --disable-linux-futex

As noted in PR 96817 this new test fails if the library is built without futexes. That's expected of course, but we might as well fail more obviously than a deadlock that eventually times out. libstdc++-v3/ChangeLog: * testsuite/18_support/96817.cc: Fail fail if the library is

RE: [PATCH v2 10/18]middle-end simplify lane permutes which selects from loads from the same DR.

> -Original Message- > From: rguent...@c653.arch.suse.de On > Behalf Of Richard Biener > Sent: Wednesday, November 4, 2020 3:12 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > Subject: RE: [PATCH v2 10/18]middle-end simplify lane permutes which > selects

RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching scaffolding.

On Wed, 4 Nov 2020, Tamar Christina wrote: > > -Original Message- > > From: rguent...@c653.arch.suse.de On > > Behalf Of Richard Biener > > Sent: Wednesday, November 4, 2020 2:04 PM > > To: Tamar Christina > > Cc: Richard Sandiford ; nd ; > > gcc-patches@gcc.gnu.org > > Subject: RE:

RE: [PATCH v2 10/18]middle-end simplify lane permutes which selects from loads from the same DR.

On Wed, 4 Nov 2020, Tamar Christina wrote: > Hi Richi, > > > -Original Message- > > From: rguent...@c653.arch.suse.de On > > Behalf Of Richard Biener > > Sent: Wednesday, November 4, 2020 1:36 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > > Subject: Re:

Re: [PATCH v5] rtl: builtins: (not just) rs6000: Add builtins for fegetround, feclearexcept and feraiseexcept [PR94193]

On Wed, Nov 04, 2020 at 10:35:03AM +0100, Richard Biener wrote: > > +/* Expand call EXP to the fegetround builtin (from C99 fenv.h), returning > > the > > + result and setting it in TARGET. Otherwise return NULL_RTX on failure. > > */ > > +static rtx > > +expand_builtin_fegetround (tree exp,

Re: [00/32] C++ 20 Modules

On 11/4/20 9:15 AM, Jason Merrill wrote: On Wed, Nov 4, 2020 at 8:50 AM Nathan Sidwell > wrote: We can; apparently the necessary incantation is to #define INCLUDE_ALGORITHM thanks that's fixed the build problem. And working around the i386 error I get a working

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, Nov 4, 2020 at 6:41 AM Jozef Lawrynowicz wrote: > > On Wed, Nov 04, 2020 at 05:47:28AM -0800, H.J. Lu wrote: > > On Tue, Nov 3, 2020 at 2:11 PM H.J. Lu wrote: > > > > > > On Tue, Nov 3, 2020 at 1:57 PM Jozef Lawrynowicz > > > wrote: > > > > > > > > On Tue, Nov 03, 2020 at 01:09:43PM

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Wed, Nov 04, 2020 at 05:47:28AM -0800, H.J. Lu wrote: > On Tue, Nov 3, 2020 at 2:11 PM H.J. Lu wrote: > > > > On Tue, Nov 3, 2020 at 1:57 PM Jozef Lawrynowicz > > wrote: > > > > > > On Tue, Nov 03, 2020 at 01:09:43PM -0800, H.J. Lu via Gcc-patches wrote: > > > > On Tue, Nov 3, 2020 at 1:00 PM

RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching scaffolding.

> -Original Message- > From: rguent...@c653.arch.suse.de On > Behalf Of Richard Biener > Sent: Wednesday, November 4, 2020 2:04 PM > To: Tamar Christina > Cc: Richard Sandiford ; nd ; > gcc-patches@gcc.gnu.org > Subject: RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching >

Re: deprecations in OpenMP 5.0

On Wed, Nov 04, 2020 at 02:23:17PM +, Kwok Cheung Yeung wrote: > I have used Tobias' recently added patch for Fortran deprecation support to > mark omp_get_nested and omp_set_nested as deprecated. If the omp_lock_hint_* > integer parameters are marked though, then the deprecation warnings will

Re: deprecations in OpenMP 5.0

On 28/10/2020 4:06 pm, Jakub Jelinek wrote: On Wed, Oct 28, 2020 at 03:41:25PM +, Kwok Cheung Yeung wrote: What if we made the definition of __GOMP_DEPRECATED in the original patch conditional on the current value of __OPENMP__? i.e. Something like: +#if defined(__GNUC__) && __OPENMP__ >=

Re: [PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

Christophe Lyon writes: > On Tue, 3 Nov 2020 at 11:27, Kyrylo Tkachov via Gcc-patches > wrote: >> >> Hi Andrea, >> >> > -Original Message- >> > From: Andrea Corallo >> > Sent: 26 October 2020 15:59 >> > To: gcc-patches@gcc.gnu.org >> > Cc: Kyrylo Tkachov ; Richard Earnshaw >> > ; nd

Re: [00/32] C++ 20 Modules

On Wed, Nov 4, 2020 at 8:50 AM Nathan Sidwell wrote: > On 11/4/20 7:30 AM, Nathan Sidwell wrote: > > > rechecking the compile-farm page, I see gcc45 is a 686 machine, I'll try > > that. > > yeah, that didn't work. There's compilation errors in > ../../../src/gcc/config/i386/x86-tune-costs.h

Re: [PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

Christophe Lyon writes: > On Wed, 4 Nov 2020 at 14:29, Christophe Lyon > wrote: >> >> On Tue, 3 Nov 2020 at 11:27, Kyrylo Tkachov via Gcc-patches >> wrote: >> > >> > Hi Andrea, >> > >> > > -Original Message- >> > > From: Andrea Corallo >> > > Sent: 26 October 2020 15:59 >> > > To:

RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching scaffolding.

On Wed, 4 Nov 2020, Tamar Christina wrote: > > -Original Message- > > From: rguent...@c653.arch.suse.de On > > Behalf Of Richard Biener > > Sent: Wednesday, November 4, 2020 12:41 PM > > To: Tamar Christina > > Cc: Richard Sandiford ; nd ; > > gcc-patches@gcc.gnu.org > > Subject: RE:

RE: [PATCH v2 10/18]middle-end simplify lane permutes which selects from loads from the same DR.

Hi Richi, > -Original Message- > From: rguent...@c653.arch.suse.de On > Behalf Of Richard Biener > Sent: Wednesday, November 4, 2020 1:36 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > Subject: Re: [PATCH v2 10/18]middle-end simplify lane permutes which >

Re: [00/32] C++ 20 Modules

On 11/4/20 7:30 AM, Nathan Sidwell wrote: rechecking the compile-farm page, I see gcc45 is a 686 machine, I'll try that. yeah, that didn't work. There's compilation errors in ../../../src/gcc/config/i386/x86-tune-costs.h about missing initializers. and then ... In file included from

Re: [PATCH] "used" attribute saves decl from linker garbage collection

On Tue, Nov 3, 2020 at 2:11 PM H.J. Lu wrote: > > On Tue, Nov 3, 2020 at 1:57 PM Jozef Lawrynowicz > wrote: > > > > On Tue, Nov 03, 2020 at 01:09:43PM -0800, H.J. Lu via Gcc-patches wrote: > > > On Tue, Nov 3, 2020 at 1:00 PM H.J. Lu wrote: > > > > > > > > On Tue, Nov 3, 2020 at 12:46 PM Jozef

[PATCH] testsuite: Clean up lto and offload dump files

Hi, Dump files produced from an offloading compiler through "-foffload=-fdump-..." do not get removed by gcc-dg.exp and other exp-files of the testsuite that use the cleanup code from this file (e.g. libgomp). This can lead to problems if scan-dump detects leftover dumps from previous runs of a

RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching scaffolding.

> -Original Message- > From: rguent...@c653.arch.suse.de On > Behalf Of Richard Biener > Sent: Wednesday, November 4, 2020 12:41 PM > To: Tamar Christina > Cc: Richard Sandiford ; nd ; > gcc-patches@gcc.gnu.org > Subject: RE: [PATCH v2 3/16]middle-end Add basic SLP pattern matching >

Re: [PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

On Wed, 4 Nov 2020 at 14:29, Christophe Lyon wrote: > > On Tue, 3 Nov 2020 at 11:27, Kyrylo Tkachov via Gcc-patches > wrote: > > > > Hi Andrea, > > > > > -Original Message- > > > From: Andrea Corallo > > > Sent: 26 October 2020 15:59 > > > To: gcc-patches@gcc.gnu.org > > > Cc: Kyrylo

[committed] libstdc++: Define new C++17 std::search overload for Parallel Mode [PR 94971]

libstdc++-v3/ChangeLog: PR libstdc++/94971 * include/bits/stl_algo.h (search(FIter, FIter, const Searcher): Adjust #if condition. * include/parallel/algo.h (search(FIter, FIter, const Searcher&): Define new overload for C++17. Tested powerpc64le-linux.

[patch, committed] targhooks.c: Fix -fzero-call-used-regs 'sorry' typo

As also remarked in Christophe in PR97699. Committed as obvious. Tobias - Mentor Graphics (Deutschland) GmbH, Arnulfstraße 201, 80634 München / Germany Registergericht München HRB 106955, Geschäftsführer: Thomas Heurung, Alexander Walter commit

Re: [PATCH v2 10/18]middle-end simplify lane permutes which selects from loads from the same DR.

On Tue, 3 Nov 2020, Tamar Christina wrote: > Hi All, > > This change allows one to simplify lane permutes that select from multiple > load > leafs that load from the same DR group by promoting the VEC_PERM node into a > load itself and pushing the lane permute into it as a load permute. > >

Re: [PATCH 1/x] arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics

On Tue, 3 Nov 2020 at 11:27, Kyrylo Tkachov via Gcc-patches wrote: > > Hi Andrea, > > > -Original Message- > > From: Andrea Corallo > > Sent: 26 October 2020 15:59 > > To: gcc-patches@gcc.gnu.org > > Cc: Kyrylo Tkachov ; Richard Earnshaw > > ; nd > > Subject: [PATCH 1/x] arm: Add

[5/7] LTO Dead field elimination and field reordering

From bad08833616e9dd7a212e55b93503200393da942 Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Sun, 30 Aug 2020 10:21:35 +0200 Subject: [PATCH 5/7] Abort if Gimple produced from C++ or Fortran sources is found. 2020-11-04 Erick Ochoa * gcc/ipa-field-reorder: Add flag to exit

[2/7] LTO Dead field elimination and field reordering

From 09feb1cc82a5d9851a6b524e37c32554b923b1c4 Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Thu, 6 Aug 2020 14:07:20 +0200 Subject: [PATCH 2/7] Add Dead Field Elimination Using the Dead Field Analysis, Dead Field Elimination automatically transforms gimple to eliminate fields that are never

[6/7] LTO Dead field elimination and field reordering

From 1609f4713b6d0ab2e84e52b4fbd6f645f10a95e7 Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Fri, 16 Oct 2020 08:49:08 +0200 Subject: [PATCH 6/7] Add heuristic to take into account void* pattern. We add a heuristic in order to be able to transform functions which receive void* arguments as a

[7/7] LTO Dead field elimination and field reordering

From 747b13bf2c6f5b17bc46316998f01483f8039548 Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Wed, 4 Nov 2020 13:42:35 +0100 Subject: [PATCH 7/7] Getting rid of warnings 2020-11-04 Erick Ochoa * gcc/ipa-dfe.c : Change const_tree to tree * gcc/ipa-dfe.h : same *

[3/7] LTO Dead field elimination and field reordering

From 91947eea01a41bd7b17e501ad7d53dfb6499eefc Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Sun, 9 Aug 2020 10:22:49 +0200 Subject: [PATCH 3/7] Add Field Reordering Field reordering of structs at link-time 2020-11-04 Erick Ochoa * gcc/Makefile.in: add new file to list of sources

[4/7] LTO Dead field elimination and field reordering

From a8c4d5b99d5c4168ede79054396cba514fdf23b5 Mon Sep 17 00:00:00 2001 From: Erick Ochoa Date: Mon, 10 Aug 2020 09:10:37 +0200 Subject: [PATCH 4/7] Add documentation for dead field elimination 2020-11-04 Erick Ochoa * gcc/Makefile.in: Add file to documentation sources *

[0/7] LTO Dead field elimination and field reordering

Hi, I've been working on several implementations of data layout optimizations for GCC, and I am again kindly requesting for a review of the type escape based dead field elimination and field reorg. This patchset is organized in the following way: * Adds a link-time warning if dead fields

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

Tobias Burnus writes: > Three of the testcases fail on PowerPC: > gcc.target/i386/zero-scratch-regs-{9,10,11}.c >powerpc64le-linux-gnu/default/gcc.d/zero-scratch-regs-10.c:77:1: sorry, > unimplemented: '-fzero-call-used_regs' not supported on this target > > Did you miss some

Re: [PATCH v3] pass: Run cleanup passes before SLP [PR96789]

On Tue, 3 Nov 2020 at 07:39, Kewen.Lin via Gcc-patches wrote: > > Hi Richard, > > Thanks again for your review! > > on 2020/11/2 下午6:23, Richard Sandiford wrote: > > "Kewen.Lin" writes: > >> diff --git a/gcc/function.c b/gcc/function.c > >> index 2c8fa217f1f..3e92ee9c665 100644 > >> ---

RE: [PATCH v2 9/18]middle-end optimize slp simplify back to back permutes.

On Wed, 4 Nov 2020, Tamar Christina wrote: > Hi Richi, > > > -Original Message- > > From: rguent...@c653.arch.suse.de On > > Behalf Of Richard Biener > > Sent: Wednesday, November 4, 2020 1:00 PM > > To: Tamar Christina > > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > > Subject: Re:

RE: [PATCH v2 9/18]middle-end optimize slp simplify back to back permutes.

Hi Richi, > -Original Message- > From: rguent...@c653.arch.suse.de On > Behalf Of Richard Biener > Sent: Wednesday, November 4, 2020 1:00 PM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; o...@ucw.cz > Subject: Re: [PATCH v2 9/18]middle-end optimize slp simplify back to back

Re: Testsuite fails on PowerPC with: Re: [PATCH][middle-end][i386][version 6]Add -fzero-call-used-regs=[skip|used-gpr-arg|used-arg|all-gpr-arg|all-arg|used-gpr|all-gpr|used|all])

On Wed, 4 Nov 2020 at 11:54, Tobias Burnus wrote: > > Three of the testcases fail on PowerPC: > gcc.target/i386/zero-scratch-regs-{9,10,11}.c >powerpc64le-linux-gnu/default/gcc.d/zero-scratch-regs-10.c:77:1: sorry, > unimplemented: '-fzero-call-used_regs' not supported on this target > >

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