Re: [PATCH] Fix PR 106560: Another ICE after conflicting types of redeclaration

On Sun, Nov 20, 2022 at 2:26 AM apinski--- via Gcc-patches wrote: > > From: Andrew Pinski > > This another one of these ICE after error issues with the > gimplifier and a fallout from r12-3278-g823685221de986af. > The problem here is gimplify_modify_expr does not > check if either from or to was

Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

On 20/11/2022 17:57, Jeff Law wrote: On 10/26/22 03:34, Sebastian Huber wrote: On 04/10/2022 11:47, Sebastian Huber wrote: On 08/09/2022 07:33, Sebastian Huber wrote: On 04/08/2022 15:02, Sebastian Huber wrote: On 22/07/2022 15:02, Sebastian Huber wrote: gcc/ChangeLog: * gcc.cc

[PATCH v2 2/2] RTEMS: Use local-exec TLS model by default

gcc/ChangeLog: * config/rtems.h (SUBTARGET_CC1_SPEC): Undef and define. --- gcc/config/rtems.h | 4 1 file changed, 4 insertions(+) diff --git a/gcc/config/rtems.h b/gcc/config/rtems.h index 95bcdc41b2f..4742b1f3722 100644 --- a/gcc/config/rtems.h +++ b/gcc/config/rtems.h @@ -56,3

[PATCH v2 1/2] Allow subtarget customization of CC1_SPEC

gcc/ChangeLog: * gcc.cc (SUBTARGET_CC1_SPEC): Define if not defined. (cc1_spec): Append SUBTARGET_CC1_SPEC. --- v2: Append SUBTARGET_CC1_SPEC directly to cc1_spec and not through CC1_SPEC. This avoids having to modify all the CC1_SPEC definitions in the targets. gcc/gcc.cc |

Re: [PATCH] [x86] Some tidy up for RA related hooks.

On Mon, Nov 21, 2022 at 6:24 AM Hongtao Liu wrote: > > On Mon, Nov 21, 2022 at 10:13 AM liuhongt wrote: > > > > When i'm working at [1] for ix86_can_change_mode_class, > > I notice there're some incorrectness/misoptimization in current RA-related > > hook. > > This patch tries to do some fix

Re: [PATCH 3/3] Add '--oslib=' option when default C library is picolibc

On 03/09/2022 08:07, Keith Packard via Gcc-patches wrote: diff --git a/gcc/config/arm/elf.h b/gcc/config/arm/elf.h index 3d111433ede..dc5b9374814 100644 --- a/gcc/config/arm/elf.h +++ b/gcc/config/arm/elf.h @@ -150,3 +150,8 @@ #undef L_floatundisf #endif +#if DEFAULT_LIBC == LIBC_PICOLIBC

Re: [PATCHv2, rs6000] Enable have_cbranchcc4 on rs6000

Hi Segher, 在 2022/11/18 20:18, Segher Boessenkool 写道: > I don't think we should pretend we have any conditional jumps the > machine does not actually have, in cbranchcc4. When would this ever be > useful? cror;beq can be quite expensive, compared to the code it would > replace anyway. > > If

Re: [PATCH] i386: Only enable small loop unrolling in backend [PR 107602]

> It's not necessarily right. unroll_factor will be set as 1 when > -fno-unroll-loops, which is exactly -fno-unroll-loops means. Not that exactly, -fno-unroll-loops previously will prevent the pass from running, and on the current trunk the pass still runs. Actually I think the implementation on

Re: [PATCH] [x86] Some tidy up for RA related hooks.

On Mon, Nov 21, 2022 at 10:13 AM liuhongt wrote: > > When i'm working at [1] for ix86_can_change_mode_class, > I notice there're some incorrectness/misoptimization in current RA-related > hook. > This patch tries to do some fix and tidy up for them: > > 1. We also need to guard size of TO to be

Re: [PATCH 7/7] riscv: Add support for str(n)cmp inline expansion

> > I would like to have a unified option interface, > > maybe -m[no-]inline-str[n]cmp and -minline-str[n]cmp-limit. > > For the basic option (-m[no-]inline-str[n]cmp), I would punt to > -fno-builtin-str[n]cmp. -fno-bulitin-* will also suppress middle-end optimization for those builtins. see:

Re: [PATCH] RISC-V: Optimise adding a (larger than simm12) constant

> @@ -464,6 +464,60 @@ >[(set_attr "type" "arith") > (set_attr "mode" "DI")]) > > +(define_expand "add3" > + [(set (match_operand:GPR 0 "register_operand" "=r,r") > + (plus:GPR (match_operand:GPR 1 "register_operand" " r,r") > + (match_operand:GPR

Re: [PATCH V2] Use subscalar mode to move struct block for parameter

Jiufu Guo writes: > Hi, > > As mentioned in the previous version patch: > https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604646.html > The suboptimal code is generated for "assigning from parameter" or > "assigning to return value". > This patch enhances the assignment from parameters

[PATCH] [x86] Some tidy up for RA related hooks.

When i'm working at [1] for ix86_can_change_mode_class, I notice there're some incorrectness/misoptimization in current RA-related hook. This patch tries to do some fix and tidy up for them: 1. We also need to guard size of TO to be less than TARGET_SSE2 ? 2 : 4 in ix86_can_change_mode_class. 2.

Re: [PATCH 1/2] rs6000: Emit vector fp comparison directly in rs6000_emit_vector_compare

Hi Segher, on 2022/11/18 23:10, Segher Boessenkool wrote: > Hi! > > On Thu, Nov 17, 2022 at 02:59:00PM +0800, Kewen.Lin wrote: >> on 2022/11/17 02:44, Segher Boessenkool wrote: >>> On Wed, Nov 16, 2022 at 02:48:25PM +0800, Kewen.Lin wrote: * config/rs6000/rs6000.cc

Re: [PATCH] RISC-V: Add the Zihpm and Zicntr extensions

> So the idea here is just to define the extension so that it gets defined > in the ISA strings and passed through to the assembler, right? That will also define arch test marco: https://github.com/riscv-non-isa/riscv-c-api-doc/blob/master/riscv-c-api.md#architecture-extension-test-macro On

Re: [PATCH] i386: Only enable small loop unrolling in backend [PR 107602]

On Mon, Nov 21, 2022 at 9:01 AM Liu, Hongtao via Gcc-patches wrote: > > > > > -Original Message- > > From: Wang, Hongyu > > Sent: Saturday, November 19, 2022 2:26 PM > > To: gcc-patches@gcc.gnu.org > > Cc: richard.guent...@gmail.com; ubiz...@gmail.com; Liu, Hongtao > > > > Subject:

Re: [PATCH] i386: Uglify some local identifiers in *intrin.h [PR107748]

On Sat, Nov 19, 2022 at 4:38 PM Jakub Jelinek wrote: > > Hi! > > While reporting PR107748 (where is a problem with non-uglified names, > but I've left it out because it needs fixing anyway), I've noticed > various spots where identifiers in *intrin.h headers weren't uglified. > The following

RE: [PATCH] i386: Only enable small loop unrolling in backend [PR 107602]

> -Original Message- > From: Wang, Hongyu > Sent: Saturday, November 19, 2022 2:26 PM > To: gcc-patches@gcc.gnu.org > Cc: richard.guent...@gmail.com; ubiz...@gmail.com; Liu, Hongtao > > Subject: [PATCH] i386: Only enable small loop unrolling in backend [PR 107602] > > Hi, > >

Re: [PATCH] Fix in _GLIBCXX_INLINE_VERSION mode

On Sun, 20 Nov 2022, 20:45 François Dumont, wrote: > On 19/11/22 14:11, Jonathan Wakely wrote: > > On Sat, 19 Nov 2022 at 13:03, François Dumont via Libstdc++ > > wrote: > >> Without this qualification I have this in _GLIBCXX_INLINE_VERSION mode: > >> > >> >

[Patch Arm] Add neon_fcmla and neon_fcadd as neon_type instructions.

[AArch64 folks CC'd fyi as this is common between both backends.] Hi, The design in the backend used to be that advanced simd types are generally added to is_neon_type in the backend. It appears that neon_fcmla and neon_fcadd aren't added in as neon_type instructions. Applying this to the tree

Re: [PATCH 15/35] arm: Explicitly specify other float types for _Generic overloading [PR107515]

On Fri, Nov 18, 2022 at 4:59 PM Kyrylo Tkachov via Gcc-patches wrote: > > > > > -Original Message- > > From: Andrea Corallo > > Sent: Thursday, November 17, 2022 4:38 PM > > To: gcc-patches@gcc.gnu.org > > Cc: Kyrylo Tkachov ; Richard Earnshaw > > ; Stam Markianos-Wright >

Re: [PATCH][GCC] arm: Add support for new frame unwinding instruction "0xb5".

On Fri, Nov 18, 2022 at 9:33 AM Srinath Parvathaneni wrote: > > Hi, > > > -Original Message- > > From: Ramana Radhakrishnan > > Sent: Thursday, November 17, 2022 8:27 PM > > To: Srinath Parvathaneni > > Cc: gcc-patches@gcc.gnu.org; Richard Earnshaw > > ; Kyrylo Tkachov > > Subject: Re:

Re: [PATCH] Fix in _GLIBCXX_INLINE_VERSION mode

On 19/11/22 14:11, Jonathan Wakely wrote: On Sat, 19 Nov 2022 at 13:03, François Dumont via Libstdc++ wrote: Without this qualification I have this in _GLIBCXX_INLINE_VERSION mode: /home/fdt/dev/gcc/build_versioned_ns/x86_64-pc-linux-gnu/libstdc++-v3/include/bits/locale_facets.h:2649: note:

Re: PING^1 [PATCH] cpp/remap: Only override if string matched

On 11/2/22 12:21, Torbjorn SVENSSON via Gcc-patches wrote: Hi, Ping, https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604062.html Ok for trunk? OK.  Sorry for the delay. jeff

[PATCH] libgccjit: Fix float vector comparison

Hi. This fixes bug 107770. Thanks for the review. From 1112e92624d41ec96c366fdb60101e1040462522 Mon Sep 17 00:00:00 2001 From: Antoni Boucher Date: Sun, 20 Nov 2022 10:22:53 -0500 Subject: [PATCH] libgccjit: Fix float vector comparison Fix float vector comparison and add comparison tests didn't

Re: Making gcc toolchain installs relocatable

On 9/23/22 12:40, Keith Packard via Gcc-patches wrote: I submitted the referenced patch to extend the 'getenv' .specs function back in August and didn't see any response, so I wanted to provide a bit more context to see if that would help people understand why I wrote this. I think most

Re: [PATCH] Add __builtin_iseqsig()

Hi, > Joseph's reply earlier in this thread has indicated a desire to verify that > verifies FE_INVALID is raised when appropriate and not raised when > inappropriate when the arguments come from volatile variables rather than > directly from constants. > > The patch itself looks pretty

Re: [PATCH] Add __builtin_iseqsig()

On 10/31/22 13:15, FX wrote: Hi, Just adding, from the Fortran 2018 perspective, things we will need to implement for which I think support from the middle-end might be necessary: - rounded conversions: converting, from an integer or floating point type, into another floating point type,

Re: [PATCH 2/5] c++: Set the locus of the function result decl

Hi Jason! The "meh" of result-decl-plugin-test-2.C should likely be omitted, grokdeclarator would need some changes to add richloc hints and we would not be able to make a reliable guess what to remove precisely. C.f. /* Check all other uses of type modifiers. */ Furthermore it is unrelated to

Re: [PATCH 1/2] Allow subtarget customization of CC1_SPEC

On 10/26/22 03:34, Sebastian Huber wrote: On 04/10/2022 11:47, Sebastian Huber wrote: On 08/09/2022 07:33, Sebastian Huber wrote: On 04/08/2022 15:02, Sebastian Huber wrote: On 22/07/2022 15:02, Sebastian Huber wrote: gcc/ChangeLog: * gcc.cc (SUBTARGET_CC1_SPEC): Define if not

Re: [PATCH v2] Add -gcodeview option

On 20/11/22 16:43, Jeff Law wrote: On 10/26/22 21:38, Mark Harmstone wrote: Changed to double dashes as per https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604287.html. What value is there in providing this option now?  IIUC we don't have any of the bits yet to actually produce PDB

Re: [PATCH v2] Add -gcodeview option

On 10/26/22 21:38, Mark Harmstone wrote: Changed to double dashes as per https://gcc.gnu.org/pipermail/gcc-patches/2022-October/604287.html. What value is there in providing this option now?  IIUC we don't have any of the bits yet to actually produce PDB records.   It seems to me like this

Re: [RFC] postreload cse'ing vector constants

On 11/3/22 06:38, Robin Dapp wrote: Should we go ahead with this, i.e. push the change and wait for fallout? I guess we're still early enough in the cycle for that. There are no regressions anymore on s390, Power9, x86 and aarch64 (at least on the farm machines I checked). That would be

Re: [PATCH v3] RISC-V: Replace zero_extendsidi2_shifted with generalized split

On 11/9/22 16:10, Philipp Tomsich wrote: The current method of treating shifts of extended values on RISC-V frequently causes sequences of 3 shifts, despite the presence of the 'zero_extendsidi2_shifted' pattern. Consider: unsigned long f(unsigned int a, unsigned long b) {

Re: [PATCH] testsuite: Add filter for target socket support

On 11/20/22 03:02, Dimitar Dimitrov wrote: The new analyzer tests for sockets are failing on embedded targets. The newlib and avr-libc C libraries do not support sockets. At first I considered a coarse filtering on the existing effective_target_freestanding check. But seeing how

Re: [PATCH] RISC-V: Add the Zihpm and Zicntr extensions

On 11/8/22 20:00, Palmer Dabbelt wrote: These extensions were recently frozen [1]. As per Andrew's post [2] we're meant to ignore these in software, this just adds them to the list of allowed extensions and otherwise ignores them. I added these under SPEC_CLASS_NONE even though the PDF lists

Re: [PATCH] riscv: implement TARGET_MODE_REP_EXTENDED

On 11/4/22 17:00, Philipp Tomsich wrote: Alexander, I had missed your comment until now. On Tue, 6 Sept 2022 at 13:39, Alexander Monakov wrote: On Mon, 5 Sep 2022, Philipp Tomsich wrote: +riscv_mode_rep_extended (scalar_int_mode mode, scalar_int_mode mode_rep) +{ + /* On 64-bit

Re: [PATCH v2] tree-object-size: Support strndup and strdup

On 11/4/22 06:48, Siddhesh Poyarekar wrote: Use string length of input to strdup to determine the usable size of the resulting object. Avoid doing the same for strndup since there's a chance that the input may be too large, resulting in an unnecessary overhead or worse, the input may not be

Re: [PATCH 1/3] Compute a table of DWARF register sizes at compile

On 11/8/22 11:05, Florian Weimer via Gcc-patches wrote: The sizes are compile-time constants. Create a vector with them, so that they can be inspected at compile time. * gcc/dwarf2cfi.cc (init_return_column_size): Remove. (init_one_dwarf_reg_size): Adjust.

Re: [PATCH] configure: Implement --enable-host-bind-now

On 11/10/22 19:53, Marek Polacek via Gcc-patches wrote: This is a rebased version of the patch I posted in February: . Fortunately it is much simpler than the patch implementing --enable-host-pie. I've converted the

Re: [PATCH] configure: Implement --enable-host-pie

On 11/10/22 19:52, Marek Polacek via Gcc-patches wrote: This is a rebased version of the patch I posted in March: which Alex sort of approved here: but it was

Re: [PATCH] reg-stack: Fix a -fcompare-debug bug in reg-stack [PR107183]

On 11/19/22 02:15, Jakub Jelinek wrote: Hi! As the following testcase shows, the swap_rtx_condition function in reg-stack can result in different code generation between -g and -g0. The function is doing the changes as it goes, so does analysis and changes together, which makes it harder to

[PATCH] testsuite: Add filter for target socket support

The new analyzer tests for sockets are failing on embedded targets. The newlib and avr-libc C libraries do not support sockets. At first I considered a coarse filtering on the existing effective_target_freestanding check. But seeing how lib/target-supports.exp is slowly turning into a copy of

Re: [PATCH] RISC-V: Add RVV registers register spilling

FAIL: gcc.target/riscv/rvv/base/spill-1.c (internal compiler error: in to_constant, at poly-int.h:504) FAIL: gcc.target/riscv/rvv/base/spill-1.c (test for excess errors) FAIL: gcc.target/riscv/rvv/base/spill-2.c (internal compiler error: in to_constant, at poly-int.h:504) FAIL:

[r13-3931 Regression] FAIL: libgomp.oacc-fortran/optional-data-copyin-by-value.f90 -DACC_DEVICE_TYPE_host=1 -DACC_MEM_SHARED=1 -foffload=disable -Os (test for excess errors) on Linux/x86_64

On Linux/x86_64, 59a63247992eb13153b82c4902aadf111460eac2 is the first bad commit commit 59a63247992eb13153b82c4902aadf111460eac2 Author: Harald Anlauf Date: Thu Nov 10 22:30:27 2022 +0100 Fortran: fix treatment of character, value, optional dummy arguments [PR107444] caused FAIL: