On Mon, 13 Nov 2023, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Tuesday, November 7, 2023 3:04 PM
> > To: Tamar Christina
> > Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> > Subject: Re: [PATCH 5/21]middle-end: update vectorizer's
On Fri, Nov 3, 2023 at 11:51 PM Marek Polacek wrote:
>
> On Thu, Oct 26, 2023 at 05:55:56PM +0200, Richard Biener wrote:
> >
> >
> > > Am 24.10.2023 um 21:09 schrieb Marek Polacek :
> > >
> > > On Tue, Oct 24, 2023 at 09:22:25AM +0200, Richard Biener wrote:
> > >>> On Mon, Oct 23, 2023 at 9:26
* Florian Weimer:
> It turns out that permerror_opt is not directly usable for
> -fpermissive in the C front end. The front end uses pedwarn
> extensively, and pedwarns are not overridable by -Wno-* options,
> yet permerrors are. Add new pedpermerror helpers that turn into
> pedwarns if
Hi!
The following testcase ICEs because BITINT_TYPE isn't handled in
type_contains_placeholder_1. Given that Ada doesn't emit it, it doesn't
matter that much where exactly we handle it as right now it should never
contain a placeholder; I've picked the same spot as INTEGER_TYPE, but if
you
> > > > I wonder whether adoption could be made easier by also providing a
> > > > -mavx10[.0] level that removes some of the more obscure sub-ISA
> > > > requirements to cover more existing implementations (I'd not add
> > > > -mavx10.0-512 here).
> > > > I'd require only skylake-AVX512 features
I'll also note that the comments above the parsing functions here no
longer exactly match with the grammar in the standard, should they be
updated as well?
Bootstrapped and regtested on x86_64-pc-linux-gnu. I don't have write
access.
-- >8 --
Currently we allow declarations like 'import A:B',
Hi Vladimir,
On 2023/11/14 3:37, Vladimir Makarov wrote:
On 11/12/23 07:08, Lehua Ding wrote:
V3 Changes:
1. fix three ICE.
2. rebase
Hi,
These patchs try to support subreg coalesce feature in
register allocation passes (ira and lra).
I've started review of v3 patches and here is my
On Monday, November 13th, 2023 at 8:48 PM, Jason Merrill
wrote:
>
>
> On 11/11/23 05:43, waffl3x wrote:
>
> > > [combined reply to all three threads]
> > >
> > > On 11/9/23 23:24, waffl3x wrote:
> > >
> > > > > > There are a few known issues still present in this patch. Most
> > > > > >
Hi, Richard. Thanks for review.
I have splited patch into 2 patches for easier review
1. Add mask_len_strided_load/mask_len_strided_store optab/ifn:
https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636416.html
2. Apply mask_len_strided load/store into loop vectorizer:
On 11/13/23 06:50, Jakub Jelinek wrote:
The following patch implements C++26 P2864R2 by emitting pedwarn enabled by
the same options as the C++20 and later warnings (i.e. -Wenum-compare,
-Wdeprecated-enum-enum-conversion and -Wdeprecated-enum-float-conversion
which are all enabled by default).
On 11/11/23 05:43, waffl3x wrote:
[combined reply to all three threads]
On 11/9/23 23:24, waffl3x wrote:
There are a few known issues still present in this patch. Most importantly,
the implicit object argument fails to convert when passed to by-value xobj
parameters. This occurs both for xobj
This patch support generating MASK_LEN_STRIDED_LOAD/MASK_LEN_STRIDED_STORE IR
for invariant stride memory access.
It's a special optimization for targets like RVV.
RVV has both indexed load/store and stride load/store.
In RVV, we always have gather/scatter and strided optab at the same time.
This patch adds mask_len_strided_load/mask_len_strided_store.
Document already has been reviewed.
This patch adds OPTAB/IFN support as follows:
1. strided load
GIMPLE level:
v = MASK_LEN_STRIDED_LOAD (ptr, stride, mask, len, bias)
be expand (by internal-fn.cc) into:
v = mask_len_strided_load
Strided load/store has been approved.
Rebase on V3 and adapt for middle-end IR change.
Will commit after middle-end patche is approved.
gcc/ChangeLog:
* config/riscv/autovec.md (mask_len_strided_load_): New pattern.
(mask_len_strided_store_): Ditto.
*
Notice the assembly check of init-2.c is wrong.
Committed.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls/init-2.c: Fix vid.v check.
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/init-2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Mon, Nov 13, 2023 at 7:25 PM Richard Biener
wrote:
>
> On Mon, Nov 13, 2023 at 7:58 AM Hongtao Liu wrote:
> >
> > On Fri, Nov 10, 2023 at 6:15 PM Richard Biener
> > wrote:
> > >
> > > On Fri, Nov 10, 2023 at 2:42 AM Haochen Jiang
> > > wrote:
> > > >
> > > > Hi all,
> > > >
> > > > This
Hi Peter,
on 2023/11/11 07:51, Peter Bergner wrote:
> On 8/27/23 9:06 PM, Kewen.Lin wrote:
>> Assuming we only have ELFv2_ABI_CHECK in PCREL_SUPPORTED_BY_OS, we
>> can have either TARGET_PCREL or !TARGET_PCREL after the checking.
>> For the latter, it's fine and don't need any checks. For the
Hi,
on 2023/11/10 17:22, HAO CHEN GUI wrote:
> Hi,
> Originally 16-byte memory to memory is expanded via pattern.
> expand_block_move does an optimization on P8 LE to leverage V2DI reversed
> load/store for memory to memory move. Now it's done by 16-byte by pieces
> move and the optimization is
On 11/10/23 20:13, Marek Polacek wrote:
On Thu, Nov 09, 2023 at 07:07:03PM -0500, Jason Merrill wrote:
On 11/9/23 14:58, Marek Polacek wrote:
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk?
-- >8 --
Here we are wrongly parsing
int y(auto(42));
which uses the C++23
在 2023/11/14 上午7:18, Xi Ruoyao 写道:
/* snip */
(define_insn "mem_thread_fence_1"
[(set (match_operand:BLK 0 "" "")
(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))
(match_operand:SI 1 "const_int_operand" "")] ;; model
""
- "dbar\t0")
+ {
+enum memmodel model =
On 11/13/23 14:01, Jonathan Wakely wrote:
Tested x86_64-linux. Does this make sense for trunk?
OK, thanks.
These forbidden conversions are defined as narrowing conversions, and we
already use -Wnarrowing to control other "ill-formed, but only warn by
default" diagnostics required by the
On 11/6/23 17:34, Marek Polacek wrote:
On Fri, Nov 03, 2023 at 01:51:07PM -0400, Jason Merrill wrote:
On 11/2/23 11:28, Marek Polacek wrote:
On Sat, Oct 14, 2023 at 12:56:11AM -0400, Jason Merrill wrote:
On 10/10/23 13:20, Marek Polacek wrote:
I suppose some
functions cannot possibly be
if (TREE_CODE (init_expr) == INTEGER_CST)
init_expr = fold_convert (TREE_TYPE (vectype), init_expr);
else
gcc_assert (tree_nop_conversion_p (TREE_TYPE (vectype),
TREE_TYPE (init_expr)));
and init_expr is a 24 bit integer type while vectype has
On Sun, 12 Nov 2023, Iain Sandoe wrote:
> This adds the ability to defer the validation of numeric attribute
> arguments until the sequence is parsed if the attribute being
> handled is one known to be 'clang form'.
This is only for __attribute__ and not [[]]-style attributes, is that as
On Fri, 10 Nov 2023, Lewis Hyatt wrote:
> Hello-
>
> The PR may be 20 years old, but by now it only needs a one-line fix :). Is
> it OK please? Bootstrapped + regtested all langauges on x86-64 Linux.
> Thanks!
OK.
--
Joseph S. Myers
jos...@codesourcery.com
The current implementation calls __detail::__modulo which is relatively
expensive.
A better implementation is possible if we assume that x.ok() && y.ok() == true,
so that n = x.c_encoding() - y.c_encoding() is in [-6, 6]. In this case, it
suffices to return n >= 0 ? n : n + 7.
The above is
On Fri, 10 Nov 2023, Sam James wrote:
> Joseph Myers writes:
>
> > On Thu, 2 Nov 2023, Sam James wrote:
> >
> >> maintainer-scripts/
> >>* gcc_release: Cleanup whitespace.
> >
> > OK.
>
> Thanks. Would you mind pushing the two you approved?
Done.
--
Joseph S. Myers
The previous commit did not include regenerating files maintained by
autoheader.
libcpp/ChangeLog:
* config.in: Regenerate.
---
Pushed as obvious in response to the quite neat buildbot:
https://builder.sourceware.org/buildbot/#/builders/269/builds/56
libcpp/config.in | 17
On Fri, 10 Nov 2023, David Malcolm wrote:
> The .opt.urls files it generates become part of the source tree, and
> would be regenerated by maintainers whenever new options are added.
> Forgetting to update the files (or not having Python 3 handy) merely
> means that URLs might be missing or out
On 11/12/23 09:52, Richard Sandiford wrote:
SME has various instructions that require aligned register tuples.
However, the associated tuple modes are already widely used and do
not need to be aligned in other contexts. It therefore isn't
appropriate to force alignment in
On Sun, Nov 12, 2023 at 08:02:42PM -1000, Iain Sandoe wrote:
> This adds the ability to defer the validation of numeric attribute
> arguments until the sequence is parsed if the attribute being
> handled is one known to be 'clang form'.
>
> We do this by considering the arguments to be strings
On Fri, 10 Nov 2023, Jakub Jelinek wrote:
> > Besides the above question I'd say OK (I assume Josephs reply is a
> > general ack from his side).
>
> Joseph, what are your thoughts on the above?
It's correct not to promote, since that matches the semantics of the
standard type-generic macros.
Tested x86_64-linux. Pushed to trunk.
-- >8 --
I meant to add these changes as part of r14-4959-g7d06b29f814580 but
missed these files out.
libstdc++-v3/ChangeLog:
* testsuite/std/time/clock/file/io.cc: Double timeout using
dg-timeout-factor.
*
Tested x86_64-linux. Pushed to trunk.
-- >8 --
This small change removes a branch when clearing a std::optional for
types with no-op destructors. For types where the destructor can be
optimized away (e.g. because it's trivial, or empty and can be inlined)
the _M_destroy() function does nothing
LA664 defines DBAR hints 0x1 - 0x1f (except 0xf and 0x1f) as follows [1-2]:
- Bit 4: kind of constraint (0: completion, 1: ordering)
- Bit 3: barrier for previous read (0: true, 1: false)
- Bit 2: barrier for previous write (0: true, 1: false)
- Bit 1: barrier for succeeding read (0: true, 1:
Flags reg is valid only with CC mode.
gcc/ChangeLog:
* config/i386/i386-expand.h (gen_pushfl): New prototype.
(gen_popfl): Ditto.
* config/i386/i386-expand.cc (ix86_expand_builtin)
[case IX86_BUILTIN_READ_FLAGS]: Use gen_pushfl.
[case IX86_BUILTIN_WRITE_FLAGS]: Use gen_popfl.
On 11/12/23 07:08, Lehua Ding wrote:
This patch adds a live_subreg problem to extend the original live_reg to
track the liveness of subreg. We will only try to trace speudo registers
who's mode size is a multiple of nature size and eventually a small portion
of the inside will appear to use
This patch fixes a BTF, which would become invalid when having
smaller then 4 byte definitions of enums.
For example, when using the __attribute__((mode(byte))) in the enum
definition.
Two problems were identified:
- it would incorrectly create an entry for enum64 when the size of the
enum
This patch forces __builtin_memcmp calls upto data sizes of 1024 to
become inline in caller.
This is a requirement by BPF and it mimics the default behaviour of the
clang BPF implementation.
gcc/ChangeLog:
* config/bpf/bpf.cc (bpf_use_by_pieces_infrastructure_p): Added
function to
gcc/ChangeLog:
* config/bpf/core-builtins.cc (core_mark_as_access_index):
Corrected check.
---
gcc/config/bpf/core-builtins.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/bpf/core-builtins.cc b/gcc/config/bpf/core-builtins.cc
index
The parser plugin handler that is responsible for collecting enum values
information was being removed way too early.
bpf_resolve_overloaded_core_builtin is called by the parser.
It was moved to the function execute_lower_bpf_core.
gcc/ChangeLog:
* config/bpf/core-builtins.cc
On 11/12/23 23:02, Iain Sandoe wrote:
This patch set is not actually particualry new, I have been maintaining
it locally one Darwin branches and it has been tested on several versions
of Darwin both with and without Alex's __has_{feature, extension} patch.
This is one of the three most
Combine wants to combine following instructions into an insn that can
perform both an (arithmetic) operation and set the condition code. During
the conversion a new RTX is created, and combine passes the RTX code of the
innermost RTX expression of the CC use insn in which CC reg is used to
On 11/12/23 20:37, Juzhe-Zhong wrote:
This patch optimization of combine 2 duplicate vectors when their elements are
not equal.
typedef char v16qi __attribute__ ((vector_size (16)));
void
foo (char a, char b, char *out)
{
v16qi v = {a, a, a, a, a, b, b, b, b, b, b, b, b, b, b, b};
On 11/13/23 13:22, Maciej W. Rozycki wrote:
On Mon, 16 Oct 2023, Maciej W. Rozycki wrote:
The testcase is generic enough I thought it wouldn't hurt to place it in
a generic part of the testsuite, where it has been verified to pass with
the `powerpc64le-linux-gnu', `riscv64-linux-gnu', and
On Nov 11, 2023, Thomas Schwinge wrote:
> ACK -- but why not likewise "fix" the 'gcc.dg/tree-ssa/scev-4.c' FAIL?
I have evidence from earlier compiler version bumps that there's some
correlation and that scev-4.c also failed in the past, but it wasn't
failing for me this time.
--
Alexandre
On Mon, 16 Oct 2023, Maciej W. Rozycki wrote:
> The testcase is generic enough I thought it wouldn't hurt to place it in
> a generic part of the testsuite, where it has been verified to pass with
> the `powerpc64le-linux-gnu', `riscv64-linux-gnu', and `vax-netbsdelf'
> targets. I'm fine to
> -Original Message-
> From: Richard Biener
> Sent: Tuesday, November 7, 2023 3:04 PM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org; nd ; j...@ventanamicro.com
> Subject: Re: [PATCH 5/21]middle-end: update vectorizer's control update to
> support picking an exit other than loop
On 11/12/23 20:22, pan2...@intel.com wrote:
From: Pan Li
Update in v4:
* Merge upstream and removed some independent changes.
Update in v3:
* Take known_le instead of known_lt for vector size.
* Return NULL_RTX when gap is not equal 0 and not constant.
Update in v2:
* Move vector type
With LSX or LASX, copysign (x[i], -1) (or any negative constant) can be
vectorized using [x]vbitseti.{w/d} instructions to directly set the
signbits.
Inspired by Tamar Christina's "AArch64: Handle copysign (x, -1) expansion
efficiently" (r14-5289).
gcc/ChangeLog:
*
Florian Weimer writes:
> There is a missed opportunity here to issue spelling diagnostics
> in prototype declarations (e.g., for “extern int foo (int32t);”).
>
> gcc/
>
> * doc/invoke.texi (Warning Options): Document changes.
>
> gcc/c/
>
> * c-decl.cc (warn_defaults_to): Call
Florian Weimer writes:
> gcc/
>
> * doc/invoke.texi (Warning Options): Document changes.
>
> gcc/c/
>
> * c-typeck.cc (build_conditional_expr): Use pedpermerror for
> pointer/integer type mismatches, based on -Wint-conversion.
> (pedwarn_pedpermerror_init,
Florian Weimer writes:
> This patch series converts the following warnings into errors by
> default:
>
> -Wint-conversion
> -Wimplicit-function-declaration
> -Wimplicit-int
> -Wreturn-mismatch
> -Wincompatible-pointer-types
>
> As explained in the first commit, I decided not to use
Florian Weimer writes:
> In the future, it may make sense to avoid cascading errors from
> the implicit declaration, especially its assumed int return type.
> This change here only changes the kind of the diagnostic, not
> its wording or consequences.
>
> gcc/c/
>
> * doc/invoke.texi
On 11/12/23 07:08, Lehua Ding wrote:
V3 Changes:
1. fix three ICE.
2. rebase
Hi,
These patchs try to support subreg coalesce feature in
register allocation passes (ira and lra).
I've started review of v3 patches and here is my initial general
criticism of your patches:
* Absence
On 11/13/23 06:11, Florian Weimer wrote:
gcc/
* doc/invoke.texi (Warning Options): Document changes.
gcc/c/
* c-typeck.cc (build_conditional_expr): Use pedpermerror-
equivalent for pointer type mismatches in conditional
expression.
On 11/13/23 06:11, Florian Weimer wrote:
gcc/
* doc/invoke.texi (Warning Options): Document changes.
gcc/c/
* c-typeck.cc (c_finish_return): Issue a permerror
for mismatching pointers to builtins. For mismatching
other pointers, issue a pedpermerror.
On 11/13/23 06:11, Florian Weimer wrote:
There is a missed opportunity here to issue spelling diagnostics
in prototype declarations (e.g., for “extern int foo (int32t);”).
gcc/
* doc/invoke.texi (Warning Options): Document changes.
gcc/c/
* c-decl.cc (warn_defaults_to):
On 11/12/23 07:01, Lehua Ding wrote:
Thanks for the specint performance data. I'll do my best to get the
compile time and memory issues fixed. I'm very curious to know if the
way used to solve the subreg coalesce problem makes sense to you?
If it works, it is ok for me. There is always a
On 11/13/23 06:10, Florian Weimer wrote:
In the future, it may make sense to avoid cascading errors from
the implicit declaration, especially its assumed int return type.
This change here only changes the kind of the diagnostic, not
its wording or consequences.
gcc/c/
*
On 11/13/23 06:10, Florian Weimer wrote:
gcc/
* doc/invoke.texi (Warning Options): Document changes.
gcc/c/
* c-typeck.cc (build_conditional_expr): Use pedpermerror for
pointer/integer type mismatches, based on -Wint-conversion.
(pedwarn_pedpermerror_init,
On 11/13/23 06:09, Florian Weimer wrote:
It turns out that permerror_opt is not directly usable for
-fpermissive in the C front end. The front end uses pedwarn
extensively, and pedwarns are not overridable by -Wno-* options,
yet permerrors are. Add new pedpermerror helpers that turn into
Hi Mary,
GCC tip-of-tree with this patch series applied fails to build glibc with:
--with-arch=rv32imac --with-abi=ilp32
--with-arch=rv32imafdc --with-abi=ilp32d
Failing command:
./bin/riscv32-unknown-elf-gcc
Tested x86_64-linux. Does this make sense for trunk?
These forbidden conversions are defined as narrowing conversions, and we
already use -Wnarrowing to control other "ill-formed, but only warn by
default" diagnostics required by the standard.
-- >8 --
Several users have been confused by the
On 11/12/23 23:53, Richard Biener wrote:
On Sun, Nov 12, 2023 at 12:12 AM Brendan Shanks wrote:
bad-mapper-1.C has been failing since the posix_spawn codepath was added
to libiberty, adjust the check to accept the changed error message.
Patch has been verified on x86_64 Linux.
OK
And
On 11/11/23 5:21 am, Peter Bergner wrote:
> Jeevitha, can you test this patch to see whether it fixes the testsuite
> issue caused by your earlier patch that was approved, but not yet pushed?
> That was the use GPR2 for register allocation, correct? Note, you'll need
> to update the patch to
On 11/13/23 07:47, Robin Dapp wrote:
As per Jeff's remark I'm going to push the attached.
Regards
Robin
Subject: [PATCH v4] RISC-V: vsetvl: Refine REG_EQUAL equality.
This patch enhances the equality check for REG_EQUAL notes in the vsetvl
pass by using the == operator instead of
Hi Richard,
thank you for reviewing the patch.
On Sat, Nov 11, 2023 at 6:57 PM Richard Sandiford
wrote:
> Thanks for the patch.
>
> Manos Anagnostakis writes:
> > This is an RTL pass that detects store forwarding from stores to larger
> loads (load pairs).
> >
> > This optimization is
On Sun, Nov 12, 2023 at 08:08:10PM +0800, Lehua Ding wrote:
> V3 Changes:
> 1. fix three ICE.
> 2. rebase
>
> Hi,
>
> These patchs try to support subreg coalesce feature in
> register allocation passes (ira and lra).
>
Hi Lehua,
V3 indeed fixes the arm-none-eabi build. It's also confirmed
> Am 13.11.2023 um 15:52 schrieb Alexander Monakov :
>
>
>> On Mon, 13 Nov 2023, Richard Biener wrote:
>>
>> Another generic comment - placing a built-in call probably pessimizes code
>> generation unless we handle it specially during alias analysis (or in
>> builtin_fnspec).
>
> But
Hi Rainer,
> On 13 Nov 2023, at 05:27, Rainer Orth wrote:
>
> I happened to notice that make check output is cluttered with the likes
> of
>
> dg set al
> -B/var/gcc/regression/master/11.4-gcc/build/i386-pc-solaris2.11/./libatomic/
>
> >>> OK, I thought there would be some defines that we could use for that, too
> >>> bad if there isn't
> >>> and indeed we might need to perform another runtime check then as
> >>> suggested by Iain.
> >>
> >> I can see a possible interface, operatingSystemVersion in NSProcessInfo.h
> >> -
David Malcolm writes:
>
> The new regenerate-opt-urls.py script only parsed
> buildir/gcc/HTML/gcc-14.0.0/gcc/Option-Index.html
> looking for anchors for options via a regex.
>
> Looking at my build, I don't see any generated Ada HTML docs, so maybe
> I messed this up? Does the generated
On 11 Nov 2023, at 18:10, Iain Sandoe wrote:
>
>> On 11 Nov 2023, at 07:47, Simon Wright wrote:
>>
>> On 6 Nov 2023, at 08:36, Arnaud Charlet wrote:
>>>
> So without changing fundamentally the model, you can't decide dynamically
> for the whole
> system. Making the choice based
Ping.
On Fri, Nov 03, 2023 at 06:51:16PM -0400, Marek Polacek wrote:
> On Thu, Oct 26, 2023 at 05:55:56PM +0200, Richard Biener wrote:
> >
> >
> > > Am 24.10.2023 um 21:09 schrieb Marek Polacek :
> > >
> > > On Tue, Oct 24, 2023 at 09:22:25AM +0200, Richard Biener wrote:
> > >>> On Mon, Oct
On Wed, 2023-11-08 at 16:27 +0800, Xi Ruoyao wrote:
> On Wed, 2023-11-08 at 09:49 +0800, chenglulu wrote:
> >
> > 在 2023/11/6 下午7:36, Xi Ruoyao 写道:
> > > This is isomorphic to the LLVM changes [1-2].
> > >
> > > On LoongArch, the LL and SC instructions has memory barrier semantics:
> > >
> > >
> Le 13 nov. 2023 à 16:24, Jonathan Wakely a écrit :
>
> Yes, I'll do that backport (and most of the other Python improvements
> too, at least for gcc-13).
>
> Thanks for raising it.
>
Cool thanks ! ;)
In the meantime, in my own toolchains I have silenced (without fixing it) the
warnings
Hi Iain,
I happened to notice that make check output is cluttered with the likes
of
dg set al
-B/var/gcc/regression/master/11.4-gcc/build/i386-pc-solaris2.11/./libatomic/
-B/var/gcc/regression/master/11.4-gcc/build/i386-pc-solaris2.11/./libatomic/.libs
ml
On Mon, 13 Nov 2023 at 14:41, Romain GEISSLER
wrote:
>
> > Le 28 sept. 2023 à 22:21, Jonathan Wakely a écrit :
> >
> > Tested x86_64-linux (GDB 13.2, Python 3.11). Pushed to trunk.
> >
> > -- >8 --
> >
> > Some of these changes were suggested by autopep8's --aggressive
> > option, others are for
Ping!
please review.
Thanks & Regards
Jeevitha
On 25/08/23 7:49 am, Peter Bergner wrote:
> On 8/24/23 12:35 PM, Michael Meissner wrote:
>> On Thu, Jul 20, 2023 at 10:05:28AM +0530, jeevitha wrote:
>>> gcc/
>>> PR target/110411
>>> * config/rs6000/rs6000.h (enum
As per Jeff's remark I'm going to push the attached.
Regards
Robin
Subject: [PATCH v4] RISC-V: vsetvl: Refine REG_EQUAL equality.
This patch enhances the equality check for REG_EQUAL notes in the vsetvl
pass by using the == operator instead of rtx_equal_p. With that, in
situations like the
I would prefer you suppress those patterns in riscv.cc rather than
adjust the including order, T-Head extension goes that way too, so I
would prefer to keep it using a consistent way.
you can search !TARGET_XTHEAD in riscv.md
On Mon, Nov 13, 2023 at 9:36 PM Mary Bennett wrote:
>
> Spec:
>
> Le 28 sept. 2023 à 22:21, Jonathan Wakely a écrit :
>
> Tested x86_64-linux (GDB 13.2, Python 3.11). Pushed to trunk.
>
> -- >8 --
>
> Some of these changes were suggested by autopep8's --aggressive
> option, others are for readability.
>
> Break long lines by splitting strings across
On Mon, 13 Nov 2023, Richard Biener wrote:
> Another generic comment - placing a built-in call probably pessimizes code
> generation unless we handle it specially during alias analysis (or in
> builtin_fnspec).
But considering the resulting code is intended to be run under Valgrind,
isn't a
This fixes a bunch more tests that try to override the default architecture;
some partially used the framework for doing this, others just blindly
added a -march option, which was doomed to cause problems. In most cases
we can now run these tests regardless of the users testing options and
the
This test is arm specific and requires neon. To improve compatibility
add a new test for armv7-a with neon and use that.
gcc/testsuite:
* lib/target-supports.exp (v7a_neon): New feature-test target.
* gcc.dg/debug/pr57351.c: Use it.
---
gcc/testsuite/gcc.dg/debug/pr57351.c |
Add +fp to the architecture specification, so that -mfpu=auto works
with the hard-float ABI.
gcc/testsuite:
* gcc.target/arm/pr19599.c: Add +fp to the architecture.
---
gcc/testsuite/gcc.target/arm/pr19599.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
This test is specific to armv7m cores which do not support hardware
floating-point. We can improve its compatibility by having the default
options for this core specify -mfloat-abi=soft.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_arm_arch_FUNC_ok):
Use
Convert these tests to use dg-add-options for increased compatibilty.
Since they also result in an empty translation unit, override the
default testsuite options.
gcc/testsuite:
* gcc.target/arm/macro_defs0.c: Use dg-effective-target and
dg-add-options.
*
Some of the standard Arm architecture tests require the test to use a
specific instruction set (arm or thumb). But although the framework
was checking that the flag was accepted, it wasn't checking that the
flag wasn't somehow being override (eg by run-specific options). We
can improve these
This test was explicitly setting the architecture on the command-line and
in the body of the test. In both cases this causes problems with the auto
FPU setting. Fix by using the testsuite infrastructure correctly and by
adding +fp to the pragma.
gcc/testsuite:
*
Another case where we can make better use of the infrastructure to
improve the compatibility of this test.
gcc/testsuite:
* gcc.target/arm/pr65647-2.c: Use dg-add-options to manage target
flags.
---
gcc/testsuite/gcc.target/arm/pr65647-2.c | 3 ++-
1 file changed, 2
Use dg-require-effective-target/dg-add-options to improve
compatibility of this test with various compiler configurations.
gcc/testsuite:
* gcc.target/arm/pr59575.c: Use dg-require-effective-target and
dg-add-options.
---
gcc/testsuite/gcc.target/arm/pr59575.c | 4 +++-
1 file
Make this test more useful by using dg-require-effective-target/
dg-add-options.
gcc/testsuite:
* gcc.target/arm/scd42-2.c: Use modern dg- flags.
---
gcc/testsuite/gcc.target/arm/scd42-2.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git
These tests use pragmas adn attributes to change the architecture.
Sometimes they simply add a feature using "+crc", but other times they
try to completely reset the architecture using "arch=armv8-a+crc".
The latter fails on a hard-float ABI with -mfpu=auto because it also
clears the FP
This test overrides the architecture, but fails to specify the
floating point architecture. This causes problems if -mfpu=auto is
used.
gcc/testsuite:
* gcc.target/arm/lto/pr96939_1.c: Add +simd to the architecture
specification.
---
This test overrides the architecture, but fails to describe which
floating-point features are needed. This causes problems if the ABI
requires FP for parameter passing and -mfpu=auto is selected, so ensure
that one is specified.
gcc/testsuite:
* gcc.target/arm/attr-crypto.c: Add +simd
These tests deliberately pass invalid option combinations to check
that the compiler is generating the correct diagnostic. Nevertheless,
we can improve their compatibility with other testsuite options. For
optional_thumb-1.c we use a soft-float ABI, while for
optional_thumb2.c we use
Fix another test that was trying to set the architecture directly
rather than using the infrastructure as intended.
gcc/testsuite:
* gcc.target/arm/pr88648-asm-syntax-unified.c: It isn't necessary
to try to override the architecture flags specified by arm_arch_v7a.
---
This test overrides the architecture, but fails to describe which
floating-point features are needed. This causes problems if the ABI
requires FP for parameter passing and -mfpu=auto is selected, so ensure
that one is specified.
gcc/testsuite:
* gcc.target/arm/attr_thumb-static2.c: Add
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