Re: [PATCH] RISC-V: allow bseti on SImode without sign-extension

2022-11-18 Thread Philipp Tomsich
Applied to master. Thanks! Philipp. On Fri, 18 Nov 2022 at 20:26, Jeff Law wrote: > > On 11/8/22 13:03, Philipp Tomsich wrote: > > As long as the SImode operand is not a partial subreg, we can use a > > bseti without postprocessing to or in a bit, as the middle end is > > smart enough to stay

Re: [PATCH] RISC-V: allow bseti on SImode without sign-extension

2022-11-18 Thread Jeff Law via Gcc-patches
On 11/8/22 13:03, Philipp Tomsich wrote: As long as the SImode operand is not a partial subreg, we can use a bseti without postprocessing to or in a bit, as the middle end is smart enough to stay away from the signbit. gcc/ChangeLog: * config/riscv/bitmanip.md (*bsetidisi): New

[PATCH] RISC-V: allow bseti on SImode without sign-extension

2022-11-08 Thread Philipp Tomsich
As long as the SImode operand is not a partial subreg, we can use a bseti without postprocessing to or in a bit, as the middle end is smart enough to stay away from the signbit. gcc/ChangeLog: * config/riscv/bitmanip.md (*bsetidisi): New pattern. gcc/testsuite/ChangeLog: *