On Fri, Nov 5, 2021 at 2:50 PM will schmidt wrote:
>
> On Fri, 2021-11-05 at 00:09 -0400, Michael Meissner wrote:
> > Generate XXSPLTIW on power10.
> >
>
> Hi,
>
>
> > This patch adds support to automatically generate the ISA 3.1 XXSPLTIW
> > instruction for V8HImode, V4SImode, and V4SFmode
Ping patch #2.
| Date: Fri, 5 Nov 2021 00:09:07 -0400
| From: Michael Meissner
| Subject: [PATCH 3/5] Add Power10 XXSPLTIW
| Message-ID:
https://gcc.gnu.org/pipermail/gcc-patches/2021-November/583392.html
Note, I will on-line through December 20th. I will be off-line after that
until January
Ping patch.
| Date: Fri, 5 Nov 2021 00:09:07 -0400
| Subject: [PATCH 3/5] Add Power10 XXSPLTIW
| Message-ID:
--
Michael Meissner, IBM
PO Box 98, Ayer, Massachusetts, USA, 01432
email: meiss...@linux.ibm.com
On Fri, 2021-11-05 at 00:09 -0400, Michael Meissner wrote:
> Generate XXSPLTIW on power10.
>
Hi,
> This patch adds support to automatically generate the ISA 3.1 XXSPLTIW
> instruction for V8HImode, V4SImode, and V4SFmode vectors. It does this by
> adding support for vector constants that can
Generate XXSPLTIW on power10.
This patch adds support to automatically generate the ISA 3.1 XXSPLTIW
instruction for V8HImode, V4SImode, and V4SFmode vectors. It does this by
adding support for vector constants that can be used, and adding a
VEC_DUPLICATE pattern to generate the actual XXSPLTIW