Re: [PATCH v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]

2023-07-22 Thread Vineet Gupta
On 7/21/23 23:05, Jeff Law wrote: On 7/21/23 12:30, Vineet Gupta wrote: Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT") (gcc-13 regression) DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize it. void zd(double *) { *d = 0.0; } currently: |

Re: [PATCH v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]

2023-07-22 Thread Jeff Law via Gcc-patches
On 7/21/23 12:30, Vineet Gupta wrote: Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT") (gcc-13 regression) DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize it. void zd(double *) { *d = 0.0; } currently: | fmv.d.x fa5,zero | fsd fa5,0(a0) |

[PATCH v2] RISC-V: optim const DF +0.0 store to mem [PR/110748]

2023-07-21 Thread Vineet Gupta
Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT") (gcc-13 regression) DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize it. void zd(double *) { *d = 0.0; } currently: | fmv.d.x fa5,zero | fsd fa5,0(a0) | ret With patch | sd zero,0(a0) | ret