Re: [PATCH v3] RISC-V: Replace zero_extendsidi2_shifted with generalized split

2024-04-06 Thread Philipp Tomsich
On Sat 6. Apr 2024 at 06:52, Jeff Law wrote: > > > On 3/27/24 4:55 AM, Philipp Tomsich wrote: > > Jeff, > > > > just a heads-up that that trunk (i.e., the soon-to-be GCC14) still > > generates the suboptimal sequence: > >https://godbolt.org/z/K9YYEPsvY > Realistically it's too late to get

Re: [PATCH 0/2] Condition coverage fixes

2024-04-06 Thread Jørgen Kvalsvik
On 06/04/2024 07:50, Richard Biener wrote: Am 05.04.2024 um 21:59 schrieb Jørgen Kvalsvik : Hi, I propose these fixes for the current issues with the condition coverage. Rainer, I propose to simply delete the test with __sigsetjmp. I don't think it actually detects anything reasonable any

Re: [PATCH] x86: Use explicit shift count in double-precision shifts

2024-04-06 Thread Uros Bizjak
On Fri, Apr 5, 2024 at 5:56 PM H.J. Lu wrote: > > Don't use implicit shift count in double-precision shifts in AT syntax > since they aren't in Intel SDM. Keep the 's' modifier for backward > compatibility with inline asm statements. > > PR target/114590 > * config/i386/i386.md

Re: [PATCH v1] LoongArch: Set default alignment for functions jumps and loops [PR112919].

2024-04-06 Thread Xi Ruoyao
On Tue, 2024-04-02 at 15:03 +0800, Lulu Cheng wrote: > +/* Alignment for functions loops and jumps for best performance.  For new > +   uarchs the value should be measured via benchmarking.  See the > documentation > +   for -falign-functions -falign-loops and -falign-jumps in invoke.texi for >

[PATCH v1] Internal-fn: Introduce new internal function SAT_ADD

2024-04-06 Thread pan2 . li
From: Pan Li This patch would like to add the middle-end presentation for the saturation add. Aka set the result of add to the max when overflow. It will take the pattern similar as below. SAT_ADD (x, y) => (x + y) | (-(TYPE)((TYPE)(x + y) < x)) Take uint8_t as example, we will have: *

[committed] d: Merge upstream dmd, druntime b65767825f, phobos 92dc5a4e9.

2024-04-06 Thread Iain Buclaw
Hi, This patch merges the D front-end and runtime library with upstream dmd b65767825f, and the standard library with phobos 92dc5a4e9. Synchronizing with the upstream release of v2.108.0. D front-end changes: - Import dmd v2.108.0. D runtime changes: - Import druntime

Re: [PATCH] rtl-optimization/101523 - avoid re-combine after noop 2->2 combination

2024-04-06 Thread Richard Biener
On Fri, Apr 5, 2024 at 11:29 PM Segher Boessenkool wrote: > > Hi! > > On Wed, Apr 03, 2024 at 01:07:41PM +0200, Richard Biener wrote: > > The following avoids re-walking and re-combining the instructions > > between i2 and i3 when the pattern of i2 doesn't change. > > > > Bootstrap and regtest

RE: [PATCH v2] DSE: Bugfix ICE after allow vector type in get_stored_val

2024-04-06 Thread Li, Pan2
Kindly ping for this ice. Pan -Original Message- From: Li, Pan2 Sent: Saturday, March 23, 2024 1:45 PM To: Jeff Law ; Robin Dapp ; gcc-patches@gcc.gnu.org Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; richard.guent...@gmail.com; Wang, Yanzhang ; Liu, Hongtao Subject: RE: [PATCH

Re: [pushed] aarch64: Fix bogus cnot optimisation [PR114603]

2024-04-06 Thread Richard Biener
On Fri, Apr 5, 2024 at 3:52 PM Richard Sandiford wrote: > > aarch64-sve.md had a pattern that combined: > > cmpeq pb.T, pa/z, zc.T, #0 > mov zd.T, pb/z, #1 > > into: > > cnotzd.T, pa/m, zc.T > > But this is only valid if pa.T is a ptrue. In other cases, the >

New French PO file for 'gcc' (version 14.1-b20240218)

2024-04-06 Thread Translation Project Robot
Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'gcc' has been submitted by the French team of translators. The file is available at: https://translationproject.org/latest/gcc/fr.po (This file,

Re: [PATCH 0/2] Condition coverage fixes

2024-04-06 Thread Jørgen Kvalsvik
On 06/04/2024 13:15, Jørgen Kvalsvik wrote: On 06/04/2024 07:50, Richard Biener wrote: Am 05.04.2024 um 21:59 schrieb Jørgen Kvalsvik : Hi, I propose these fixes for the current issues with the condition coverage. Rainer, I propose to simply delete the test with __sigsetjmp. I don't

[PATCH] s390: Fix s390_const_int_pool_entry_p and movdi peephole2 [PR114605]

2024-04-06 Thread Jakub Jelinek
Hi! The following testcase is miscompiled, because we have initially a movti which loads the 0x3f803f80ULL TImode constant from constant pool. Later on we split it into a pair of DImode loads. Now, for the first load (why just that?, though not stage4 material) we trigger the peephole2