[PATCH v1] RISC-V: Add xfail test case for highpart register overlap of vx/vf widen

From: Pan Li We reverted below patch for register group overlap, add the related insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. a23415d7572 RISC-V: Support highpart register overlap for widen vx/vf instructions The below test

RE: [PATCH v1] RISC-V: Add xfail test case for incorrect overlap on v0

Committed, thanks Juzhe. Pan From: 钟居哲 Sent: Sunday, April 21, 2024 7:59 AM To: Li, Pan2 ; gcc-patches Cc: kito.cheng ; rdapp.gcc ; Li, Pan2 Subject: Re: [PATCH v1] RISC-V: Add xfail test case for incorrect overlap on v0 lgtm

Re: [PATCH v1] RISC-V: Add xfail test case for incorrect overlap on v0

lgtm juzhe.zh...@rivai.ai From: pan2.li Date: 2024-04-20 23:21 To: gcc-patches CC: juzhe.zhong; kito.cheng; rdapp.gcc; Pan Li Subject: [PATCH v1] RISC-V: Add xfail test case for incorrect overlap on v0 From: Pan Li We reverted below patch for register group overlap, add the related insn

[PATCH v1] RISC-V: Add xfail test case for incorrect overlap on v0

From: Pan Li We reverted below patch for register group overlap, add the related insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. 018ba3ac952 RISC-V: Fix overlap group incorrect overlap on v0 The below test suites are passed. * The

Re: [Patch, fortran] PR103471 - [11/12/13/14 Regression] ICE in gfc_typenode_for_spec, at fortran/trans-types.c:1114

Hi Paul! On 4/20/24 09:54, Paul Richard Thomas wrote: subroutine sub implicit none real, external :: x real :: y(10) integer :: kk print *, [real(x(k))] ! print *, [real(y(k))] end This is another problem, somewhere upstream from resolve.cc, which I have just

RE: [PATCH] RISC-V: Add xfail test case for wv insn highest overlap

Committed, thanks Robin. Pan -Original Message- From: Robin Dapp Sent: Saturday, April 20, 2024 7:46 PM To: Li, Pan2 ; gcc-patches@gcc.gnu.org Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com Subject: Re: [PATCH] RISC-V: Add xfail test case for wv insn highest

Re: [PATCH] RISC-V: Add xfail test case for wv insn highest overlap

LGTM. Regards Robin

Re: [PATCH v2 1/2] LoongArch: Define ISA versions

v1 -> v2: - Fixed build issues of runtime libraries caused by the new header. - Restored the default ARCH of lp64f/lp64s ABI to "abi-default".

[PATCH v2 2/2] LoongArch: Define builtin macros for ISA evolutions

Detailed description of these definitions can be found at https://github.com/loongson/la-toolchain-conventions, which the LoongArch GCC port aims to conform to. gcc/ChangeLog: * config.gcc: Add loongarch-evolution.o. * config/loongarch/genopts/genstr.sh: Enable generation of

[PATCH v2 1/2] LoongArch: Define ISA versions

These ISA versions are defined as -march= parameters and are recommended for building binaries for distribution. Detailed description of these definitions can be found at https://github.com/loongson/la-toolchain-conventions, which the LoongArch GCC port aims to conform to. gcc/ChangeLog:

[PATCH] RISC-V: Add xfail test case for wv insn highest overlap

From: Pan Li We reverted below patch for wv insn overlap, add the related wv insn test and mark it as xfail. And we will remove the xfail after we support the register overlap in GCC-15. 7e854b58084 RISC-V: Support highest overlap for wv instructions The below test suites are passed. * The

[PATCH] c++: Check if allocation functions are xobj members [PR114078]

Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- A class allocation member function is implicitly 'static' by [class.free] p3, so cannot have an explicit object parameter. PR c++/114078 gcc/cp/ChangeLog: * decl.cc (grokdeclarator): Check allocation

[PATCH] c++: Fix ICE with xobj parms and maybe incomplete decl-specifiers

Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk? -- >8 -- This fixes a null dereference issue when decl_specifiers.type is not yet provided. gcc/cp/ChangeLog: * parser.cc (cp_parser_parameter_declaration): Check if decl_specifiers.type is null.

Re: [Patch, fortran] PR103471 - [11/12/13/14 Regression] ICE in gfc_typenode_for_spec, at fortran/trans-types.c:1114

Hi Harald, > > the patch is OK, but I had to manually fix it. I wonder how you managed > to produce: > Yes, I had to use --whitespace fix when I reapplied it a few minutes ago. > > diff --git a/gcc/testsuite/gfortran.dg/pr93484.f90 > I had followed comment 1 in the PR and wrongly named the

Re: [PATCH 1/2] LoongArch: Define ISA versions

On Sat, 2024-04-20 at 11:26 +0800, Lulu Cheng wrote: > > > One LoongArch v1.1 feature "Hardware Page Table Walker" is not > > implemented by LA664. Maybe "all LoongArch v1.1 **unprivileged** > > features"? > > > The description of -march is "+Generate instructions for the machine type >