Michael Maroszek writes:
The code works flawlessly on the Boardwell architecture (and a lot more!).
The issue arises only on the mentioned Celeron.
As I wrote before, GMP's fat mechanism knows of that processor. So it
is not a simple oversight on our part which causes the problems you
On Wed, 28 Apr 2021, Michael Maroszek wrote:
Thread 11 "foo" received signal SIGILL, Illegal instruction.
[Switching to Thread 0x7fffe37fe700 (LWP 9609)]
0x571661db in __gmpn_set_str ()
Did you ask gdb what the illegal instruction is?
--
Marc Glisse
Hi Torbjörn,
sorry for the version confusion. I meant 6.2.0 and 6.2.1.
I am compiling using GitHub Actions which are running on Azure (
https://docs.microsoft.com/de-de/azure/virtual-machines/dv2-dsv2-series#dsv2-series)
which is using Broadwell. Therefore the configure output is correct to
