Op 18-05-15 om 18:28 schreef Ville Syrjälä:
On Mon, May 18, 2015 at 05:49:23PM +0200, Daniel Vetter wrote:
On Wed, May 13, 2015 at 10:23:46PM +0200, Maarten Lankhorst wrote:
intel_crtc-config will be removed eventually, so use crtc-hwmode.
drm_atomic_helper_update_legacy_modeset_state updates
On Mon, May 18, 2015 at 06:27:51PM +0200, Maarten Lankhorst wrote:
Op 18-05-15 om 17:45 schreef Daniel Vetter:
On Wed, May 13, 2015 at 10:23:41PM +0200, Maarten Lankhorst wrote:
From: Ander Conselvan de Oliveira ander.conselvan.de.olive...@intel.com
Now that we can subclass
On Tue, 19 May 2015, Mario Kleiner mario.kleiner...@gmail.com wrote:
On 05/15/2015 11:00 AM, Jani Nikula wrote:
On Fri, 15 May 2015, Mario Kleiner mario.kleiner...@gmail.com wrote:
Hi all,
since Linux 4.0 i experience some massive display flicker problem on my
Intel HD Ironlake mobile (2010
On Mon, May 18, 2015 at 07:28:04PM +0300, Imre Deak wrote:
On ke, 2015-05-13 at 12:20 +0530, Vandana Kannan wrote:
Making lane stagger calculation common for HDMI and DP
v2: Imre's comments addressed
- Remove lane stagger from bxt_clk_div and make it a local variable in
On Wed, May 13, 2015 at 01:10:17AM +0300, Dmitry V. Levin wrote:
On Tue, May 12, 2015 at 07:37:59PM +0200, Gabriel Laskar wrote:
On Tue, 12 May 2015 14:35:28 +0200, Patrik Jakobsson wrote:
On Mon, May 11, 2015 at 08:08:19PM +0200, Gabriel Laskar wrote:
On Mon, 11 May 2015 15:54:24 +0200,
On 05/18/2015 07:07 PM, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote:
On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 11:31:56AM +0300, Abdiel Janulgue wrote:
Also clarify comments on context size that the extra
On Thu, 14 May 2015, Matt Roper matthew.d.ro...@intel.com wrote:
On Thu, May 14, 2015 at 09:16:39AM +0200, Thomas Gummerer wrote:
Commit c9f038a1a592 (drm/i915: Don't assume primary cursor are
always on for wm calculation (v4)) fixes a null pointer dereference.
Setting the primary and cursor
On Fri, May 15, 2015 at 08:15:42PM +0100, Damien Lespiau wrote:
We don't actually do anything different for the A version of the
RGB formats before SKL. Don't let user space think we can support alpha
blending.
v2: Fix the logic to forbid the creation ABGR2101010 fbs (Ville)
On Mon, May 18, 2015 at 06:35:59PM +0200, Maarten Lankhorst wrote:
Op 18-05-15 om 17:30 schreef Daniel Vetter:
On Wed, May 13, 2015 at 10:23:37PM +0200, Maarten Lankhorst wrote:
crtc_state-enable means a crtc is configured, but it may be turned
off for dpms. Until the previous commit
On Tue, May 19, 2015 at 09:58:52AM +0300, Abdiel Janulgue wrote:
On 05/18/2015 07:07 PM, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote:
On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 11:31:56AM +0300, Abdiel
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c | 21 -
1 file
On 05/19/2015 11:26 AM, Daniel Vetter wrote:
On Tue, May 19, 2015 at 09:58:52AM +0300, Abdiel Janulgue wrote:
On 05/18/2015 07:07 PM, Ville Syrjälä wrote:
On Mon, May 18, 2015 at 04:41:51PM +0100, Chris Wilson wrote:
On Mon, May 18, 2015 at 06:36:18PM +0300, Ville Syrjälä wrote:
On Mon,
On Tue, May 19, 2015 at 08:10:46AM +0200, Maarten Lankhorst wrote:
Op 18-05-15 om 18:28 schreef Ville Syrjälä:
On Mon, May 18, 2015 at 05:49:23PM +0200, Daniel Vetter wrote:
On Wed, May 13, 2015 at 10:23:46PM +0200, Maarten Lankhorst wrote:
intel_crtc-config will be removed eventually, so
On Tue, May 19, 2015 at 04:53:16AM +, Kamath, Sunil wrote:
Sure Damien. We will come back with solution for the same.
Please check out my reply to Animesh' patch in
https://tango.freedesktop.org/patch/49084/
I think this is the proper fix and the design much more in-line with other
parts
On Sun, May 17, 2015 at 10:11:01PM -0700, Chandra Konduru wrote:
This patch adds NV12 as supported format to
intel_framebuffer_init and performs various checks.
Signed-off-by: Chandra Konduru chandra.kond...@intel.com
Testcase: igt/kms_nv12
---
drivers/gpu/drm/i915/intel_display.c | 27
On 05/18/2015 05:55 PM, Chris Wilson wrote:
On Mon, May 18, 2015 at 11:31:54AM +0300, Abdiel Janulgue wrote:
Ensures that the batch buffer is executed by the resource streamer
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
1-3:
Reviewed-by: Chris Wilson
On Tue, May 19, 2015 at 11:30:44AM +0300, Abdiel Janulgue wrote:
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
Make sure resource streamer flags works only in correct ring in
addition to checking next flag after the RS boundary fails.
v2: Make sure we reject RS on pre-hsw.
Cc: Daniel Vetter daniel.vet...@ffwll.ch
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
tests/gem_exec_params.c
On 08/05/2015 14:39, Mika Kuoppala wrote:
Hangcheck tries to peek into request list to see
if the ring was busy or not. But that leads to race
against the list addition in request submission.
And hangcheck saw a ring being idle, when in fact work was
just being submitted.
There is strong desire
Fixed variables incorrectly declared as signed instead of unsigned.
Fixed 'unused parameter' warning from signal handlers that were
not using the signal parameter.
Signed-off-by: Derek Morton derek.j.mor...@intel.com
---
lib/igt_core.c | 24 +---
1 file changed, 17
On 08/05/2015 14:39, Mika Kuoppala wrote:
With commit aaecdf611a05 (drm/i915: Stop gathering error
states for CS error interrupts) we only call i915_handle_error()
on call sites where there is a stuck/hung gpu. So there is
no more need to carry around extra information into dmesg.
Emit one loud
I will take a look and submit a test as a separate patch.
//Derek
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Monday, May 18, 2015 4:14 PM
To: Morton, Derek J
Cc: intel-gfx@lists.freedesktop.org; Wood, Thomas
Subject: Re:
On Mon, May 18, 2015 at 04:01:45PM +0300, Jani Nikula wrote:
Turn
[drm:intel_dp_print_rates] source rates: 162000,27,54,
[drm:intel_dp_print_rates] sink rates: 162000,27,
[drm:intel_dp_print_rates] common rates: 162000,27,
into
[drm:intel_dp_print_rates]
diff --git a/drivers/gpu/drm/i915/i915_drv.c
b/drivers/gpu/drm/i915/i915_drv.c
index 5cc57f2..5a9399c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -808,17 +808,17 @@ static int i915_drm_resume_early(struct drm_device
*dev)
ARGB is used for cursors on all platforms so we need to allow it
everywhere.
ABGR is currently only honoured:
- on VLV/CHV in sprite planes
- on SKL+ for primary and sprite planes
so only allow it for those platforms.
Note that we only support ARGB/ABGR on the primary plane
+intel-gfx
On Tue, 19 May 2015, Rainer Koenig rainer.koe...@ts.fujitsu.com wrote:
Hi,
I'm testing the vanilla kernel on prototype boards for Intel Skylake.
The graphics adapter on those boards identifies like this:
00:02.0 0300: 8086:1912 (rev 04) (prog-if 00 [VGA controller])
Ensures that the batch buffer is executed by the resource streamer
Testcase: igt/gem_exec_params
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++
Also clarify comments on context size that the extra state for
Resource Streamer is included.
v2: Don't remove the extended save/restore enabled for older
platforms. (Ville)
Use new MI_SET_CONTEXT defines for HSW RS save/restore state
instead of extended save/restore. (Daniel)
Adds support for executing the resource streamer on BDW and HSW
v2: Add support for Execlists (Minu Mathai minu.mat...@intel.com)
Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 461b9be..2e342db 100644
---
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 840f08f..731b5ce 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++
Also make the WA comment consistent with the rest, where the stepping
info is not shown.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
[ The patchset is a follow-up to:
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 2e342db..0d1522f 100644
---
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6431
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
-Original Message-
From: Tvrtko Ursulin [mailto:tvrtko.ursu...@linux.intel.com]
Sent: Monday, May 18, 2015 3:43 AM
To: Konduru, Chandra; Vetter, Daniel; Lespiau, Damien; Syrjala, Ville
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 00/11] Skylake display NV12
Imre Deak imre.d...@intel.com writes:
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
-Original Message-
From: Morton, Derek J
Sent: Tuesday, May 19, 2015 12:21 PM
To: intel-gfx@lists.freedesktop.org
Cc: Wood, Thomas; Gore, Tim; Morton, Derek J
Subject: [PATCH i-g-t] libs/igt_core.c: Fix compile warnings in igt_core.c
Fixed variables incorrectly declared as
On B0 and C0 steppings the workaround enable bit would be overriden by
default, so the overriding must be disabled.
The WA was added in
commit 83a24979c40ebbf0fa0cd14df16f74142f373cd3
Author: Nick Hoath nicholas.ho...@intel.com
Date: Fri Apr 10 13:12:26 2015 +0100
drm/i915/bxt: Add
v2:
- set the override disable flag too on stepping F0 (mika)
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
On Tue, May 19, 2015 at 12:03:44PM +0100, Tomas Elf wrote:
+if (ring-buffer
+ring-buffer-tail != tail
+waitqueue_active(ring-irq_queue))
+return true;
+
1. For some reason going from one waitqueue_active() check in
i915_hangcheck_elapsed() to two separate
On ti, 2015-05-19 at 16:08 +0300, Mika Kuoppala wrote:
Imre Deak imre.d...@intel.com writes:
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
Hi Dave,
Scattering of random drm core patches. Bunch of atomic prep work too, but
the final bits for blob properties, atomic modesets and lifting the
experimental tag on the atomic ioctl are still blocked on Daniel Stone
finalizing and testing the weston support for it. I hope that we can get
it
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest, where the stepping
info is not shown.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 9 +++--
1 file changed, 3 insertions(+), 6
On Tue, May 19, 2015 at 03:05:00PM +0300, Imre Deak wrote:
Signed-off-by: Imre Deak imre.d...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h
On Tue, May 19, 2015 at 03:39:25PM +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest, where the stepping
info is not shown.
Signed-off-by: Imre Deak imre.d...@intel.com
---
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6427
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
Fixed variables incorrectly declared as signed instead of unsigned.
Fixed 'unused parameter' warning from signal handlers that were
not using the signal parameter.
v2: Addressed comments from Tim Gore
Signed-off-by: Derek Morton derek.j.mor...@intel.com
---
lib/igt_core.c | 20
This is a convenience function to add all planes for a crtc,
similar to add_affected_connectors. This will be used in
drm_atomic_helper_check_modeset, but drivers can call it too
when they need to recalculate all state.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
---
Drivers may need to recalculate plane state when a modeset occurs,
not reliably adding them might cause hard to debug bugs.
Signed-off-by: Maarten Lankhorst maarten.lankho...@linux.intel.com
---
drivers/gpu/drm/drm_atomic_helper.c | 4
1 file changed, 4 insertions(+)
diff --git
drm_atomic_helper_commit_planes calls all atomic_begin's first,
then updates all planes, finally calling atomic_flush.
Some drivers may want to things like disabling irq's
from their atomic_begin, in which case a second call to atomic_begin
will splat. By using commit_planes_on_crtc on each crtc
On Mon, May 11, 2015 at 04:25:52PM +0100, Chris Wilson wrote:
On Mon, May 11, 2015 at 12:34:37PM +0200, Daniel Vetter wrote:
On Mon, May 11, 2015 at 08:51:36AM +0100, Chris Wilson wrote:
With the advent of mmap(wc), we have a path to write directly into
active GPU buffers. When combined
On Tue, May 19, 2015 at 05:52:27PM +0300, Imre Deak wrote:
On ti, 2015-05-19 at 15:46 +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:39:25PM +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest,
On ti, 2015-05-19 at 15:46 +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:39:25PM +0100, Damien Lespiau wrote:
On Tue, May 19, 2015 at 03:04:59PM +0300, Imre Deak wrote:
Also make the WA comment consistent with the rest, where the stepping
info is not shown.
Signed-off-by:
On Fri, May 15, 2015 at 02:07:29AM +0100, Robert Bragg wrote:
On Fri, May 8, 2015 at 5:24 PM, Peter Zijlstra pet...@infradead.org wrote:
On Thu, May 07, 2015 at 03:15:43PM +0100, Robert Bragg wrote:
I've changed the uapi for configuring the i915_oa specific attributes
when calling
On Tue, May 19, 2015 at 04:41:01PM +0200, Maarten Lankhorst wrote:
drm_atomic_helper_commit_planes calls all atomic_begin's first,
then updates all planes, finally calling atomic_flush.
Some drivers may want to things like disabling irq's
from their atomic_begin, in which case a second call
On Tue, May 19, 2015 at 12:29:16PM +0100, Damien Lespiau wrote:
ARGB is used for cursors on all platforms so we need to allow it
everywhere.
ABGR is currently only honoured:
- on VLV/CHV in sprite planes
- on SKL+ for primary and sprite planes
so only allow it for those
From: Jim Bride jim.br...@linux.intel.com
According to the HSW b-spec we need to try clock divisors of 63
and 72, each 3 or more times, when attempting DP AUX channel
communication on a server chipset. This actually wasn't happening
due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Tuesday, May 19, 2015 1:24 AM
To: Konduru, Chandra
Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Syrjala, Ville
Subject: Re: [Intel-gfx] [PATCH 08/12] drm/i915: Add NV12
Useful to understand the warnings the scripts prints.
Signed-off-by: Damien Lespiau damien.lesp...@intel.com
---
scripts/list-workarounds | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/scripts/list-workarounds b/scripts/list-workarounds
index 42af6a3..d11b6a9 100755
From: Ville Syrjälä ville.syrj...@linux.intel.com
We're not using ilk_init_lp_watermarks() on BDW for some reason.
Probably due to the BDW patches and the relevant WM patches landing
roughlly at the same time. Fix it up.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
From: Ville Syrjälä ville.syrj...@linux.intel.com
GEN8_L3SQCREG1 isn't saved in the context (verified by going through
a context dump), and so we shouldn't be using the ring w/a code to
initialize it. Also Bspec explicitly talks about MMIO and writing it
with the CPU.
Additionally there's
From: Ville Syrjälä ville.syrj...@linux.intel.com
GTT caching was disabled by default on gen8 due to not working with
big pages. Some information suggests that it got fixed, but still
GTT caching has been left disabled by default. Or could be it just
meant that the default was changed to off, and
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6428
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
-Original Message-
From: Runyan, Arthur J
Sent: Monday, May 18, 2015 12:19 PM
To: Konduru, Chandra; Ville Syrjälä
Cc: intel-gfx@lists.freedesktop.org; Vetter, Daniel; Syrjala, Ville; Jindal,
Sonika
Subject: RE: [Intel-gfx] [PATCH 2/2] drm/i915: Add 90/270 rotation for NV12
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6430
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
Task id: 6429
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV
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