Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: make assert_device_not_suspended more precise

On ke, 2015-11-18 at 16:01 +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 04:58:46PM +0200, Imre Deak wrote: > > On ke, 2015-11-18 at 16:44 +0200, Imre Deak wrote: > > > On ke, 2015-11-18 at 15:37 +0100, Daniel Vetter wrote: > > > > On Mon, Nov 09, 2015 at 09:13:45PM +0200, Imre Deak wrote:

Re: [Intel-gfx] A wrong DDI encoder override from HDMI to DP at hotplug

On Wed, 18 Nov 2015 16:38:03 +0100, Ville Syrjälä wrote: > > On Wed, Nov 18, 2015 at 04:23:06PM +0100, Takashi Iwai wrote: > > Hi, > > > > currently a DDI port may register both DP and HDMI and it shares the > > same encoder. The bug we've got a report is about this encoder type: > > namely, a

Re: [Intel-gfx] [PATCH] drm/i915/skl: enable PC9/10 power states during suspend-to-idle

On ke, 2015-11-18 at 17:33 +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 05:32:30PM +0200, Imre Deak wrote: > > During suspend-to-idle we need to keep the DMC firmware active and DC6 > > enabled, since otherwise we won't reach deep system power states like > > PC9/10. The lead for this

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Mark uneven memory banks on gen4 desktop as unknown swizzling

On Tue, Nov 17, 2015 at 10:40:51AM +, Chris Wilson wrote: > We have varied reports of swizzling corruption on gen4 desktop, and > confirmation that it is triggered by uneven memory banks. The > implication is that the swizzling various between the paired channels > and the remainder of memory

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

On Wed, Nov 18, 2015 at 5:20 PM, Paulo Zanoni wrote: > 2015-11-18 13:59 GMT-02:00 Daniel Vetter : >> On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: >>> Hello >>> >>> I've been carrying some local IGT patches that reduced the size of buffers >>>

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

On Wed, Nov 18, 2015 at 10:33:55PM +0530, Maiti, Nabendu Bikash wrote: > > > On 11/18/2015 7:00 PM, Ville Syrjälä wrote: > > On Wed, Nov 18, 2015 at 06:48:37PM +0530, Maiti, Nabendu Bikash wrote: > >> > >> > >> On 11/18/2015 6:22 PM, Ville Syrjälä wrote: > >>> On Wed, Nov 18, 2015 at 12:19:06PM

Re: [Intel-gfx] [PATCH i-g-t] Add dmesg capture and dumping to tests and a test for it.

On Wed, Nov 18, 2015 at 04:44:20PM +0100, Daniel Vetter wrote: > On Mon, Nov 16, 2015 at 03:22:23PM +0200, Joonas Lahtinen wrote: > > Cc: Thomas Wood > > Cc: Chris Wilson > > Cc: Damien Lespiau > > Signed-off-by: Joonas

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

On Wed, Nov 18, 2015 at 05:38:47PM +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 5:20 PM, Paulo Zanoni wrote: > > 2015-11-18 13:59 GMT-02:00 Daniel Vetter : > >> On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: > >>> Hello > >>> > >>> I've

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Only spin whilst waiting on the current request

On Wed, Nov 18, 2015 at 09:56:06AM +, Chris Wilson wrote: > Limit busywaiting only to the request currently being processed by the > GPU. If the request is not currently being processed by the GPU, there > is a very low likelihood of it being completed within the 2 microsecond > spin timeout

Re: [Intel-gfx] [PATCH v3] drm/i915: Ensure associated VMAs are inactive when contexts are destroyed

On 17/11/15 17:56, Daniel Vetter wrote: > On Tue, Nov 17, 2015 at 05:24:01PM +, Tvrtko Ursulin wrote: >> >> On 17/11/15 17:08, Daniel Vetter wrote: >>> On Tue, Nov 17, 2015 at 04:54:50PM +, Tvrtko Ursulin wrote: On 17/11/15 16:39, Daniel Vetter wrote: > On Tue, Nov 17, 2015

Re: [Intel-gfx] [PATCH i-g-t] Add dmesg capture and dumping to tests and a test for it.

On 18 November 2015 at 15:44, Daniel Vetter wrote: > On Mon, Nov 16, 2015 at 03:22:23PM +0200, Joonas Lahtinen wrote: >> Cc: Thomas Wood >> Cc: Chris Wilson >> Cc: Damien Lespiau >> Signed-off-by:

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

On 11/18/2015 7:00 PM, Ville Syrjälä wrote: On Wed, Nov 18, 2015 at 06:48:37PM +0530, Maiti, Nabendu Bikash wrote: On 11/18/2015 6:22 PM, Ville Syrjälä wrote: On Wed, Nov 18, 2015 at 12:19:06PM +, Chris Wilson wrote: On Wed, Nov 18, 2015 at 05:43:52PM +0530, Nabendu Maiti wrote:

[Intel-gfx] [PATCH] drm/atomic-helper: Check encoder/crtc constraints

This was totally lost when I originally created the atomic helpers. We probably should also check possible_clones in the helpers, but since the legacy ones didn't do that this is for a separate patch. Reported-by: Ville Syrjälä Cc: Ville Syrjälä

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

Em Qua, 2015-11-18 às 17:38 +0100, Daniel Vetter escreveu: > On Wed, Nov 18, 2015 at 5:20 PM, Paulo Zanoni > wrote: > > 2015-11-18 13:59 GMT-02:00 Daniel Vetter : > > > On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: > > > > Hello > > > > > > >

[Intel-gfx] [PATCH] drm/i915: Move Braswell stop_machine GGTT insertion workaround

There was a silent conflict between commit 0a878716265e9af9f697264dc2e858fcc060d833 Author: Daniel Vetter Date: Thu Oct 15 14:23:01 2015 +0200 drm/i915: restore ggtt double-bind avoidance and commit 5bab6f60cb4d1417ad7c599166bcfec87529c1a2 Author: Chris Wilson

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: > Hello > > I've been carrying some local IGT patches that reduced the size of buffers > created by igt_create_fb() so they would fit the stolen memory, but when I > decided to test the tree without them, I concluded the lack of sane

Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents"

[adding linux-pci] On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä wrote: > On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >> Typing: >> >> # cat /sys/devices/pci:00/:00:02.0/rom >> >> Provokes: >> >> i915 :00:02.0: Invalid ROM contents

Re: [Intel-gfx] [PATCH i-g-t] Add dmesg capture and dumping to tests and a test for it.

On Mon, Nov 16, 2015 at 03:22:23PM +0200, Joonas Lahtinen wrote: > Cc: Thomas Wood > Cc: Chris Wilson > Cc: Damien Lespiau > Signed-off-by: Joonas Lahtinen Given that we have all that

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: make assert_device_not_suspended more precise

On Wed, Nov 18, 2015 at 05:11:03PM +0200, Imre Deak wrote: > On ke, 2015-11-18 at 16:01 +0100, Daniel Vetter wrote: > > On Wed, Nov 18, 2015 at 04:58:46PM +0200, Imre Deak wrote: > > > On ke, 2015-11-18 at 16:44 +0200, Imre Deak wrote: > > > > On ke, 2015-11-18 at 15:37 +0100, Daniel Vetter wrote:

Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents"

Hi, On 18 November 2015 at 15:59, Andy Lutomirski wrote: > On Wed, Nov 18, 2015 at 2:59 AM, Ville Syrjälä > wrote: >> On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: >>> Typing: >>> >>> # cat

Re: [Intel-gfx] A wrong DDI encoder override from HDMI to DP at hotplug

On Wed, Nov 18, 2015 at 04:23:06PM +0100, Takashi Iwai wrote: > Hi, > > currently a DDI port may register both DP and HDMI and it shares the > same encoder. The bug we've got a report is about this encoder type: > namely, a machine using DDI port D for HDMI is screwed up because the > encoder is

[Intel-gfx] [PATCH 2/2] drm/i915: Remove platform specific *_dp_detect() functions

Their logic is exactly the same: check if the digital port is connected and then call intel_dp_detect_dpcd(). So just put that logic in their only caller: intel_dp_detect(). Signed-off-by: Ander Conselvan de Oliveira --- drivers/gpu/drm/i915/intel_dp.c |

Re: [Intel-gfx] [PATCH] lib: Add Skylake Intel Graphics GT4 PCI IDs

On Fri, Nov 06, 2015 at 04:42:10PM +0200, Mika Kuoppala wrote: > Add Skylake Intel Graphics GT4 PCI IDs. > > Signed-off-by: Mika Kuoppala Reviewed-by: Damien Lespiau -- Damien > --- > lib/intel_chipset.h | 12 +++- > 1 file

Re: [Intel-gfx] [PATCH v2 maintainer-tools] dim: Replace git commit --amend from dim_apply with dimrc option

On Mon, Nov 16, 2015 at 12:17:15PM +0200, Ander Conselvan de Oliveira wrote: > Introduce DIM_POST_APPLY_ACTION to dimrc that allows the user to specify > a command to be run after a patch is applied. Use eval so enviroment > variables can be overriden with the option. For example: > >

Re: [Intel-gfx] [PATCH maintainer-tools] dim: Remove git commit --amend from dim_apply

On Fri, Nov 13, 2015 at 05:11:58PM +0200, Ander Conselvan De Oliveira wrote: > On Fri, 2015-11-13 at 15:07 +, Tvrtko Ursulin wrote: > > On 13/11/15 14:40, Ander Conselvan De Oliveira wrote: > > > On Fri, 2015-11-13 at 12:31 +, Tvrtko Ursulin wrote: > > > > On 13/11/15 12:16, Chris Wilson

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915: make assert_device_not_suspended more precise

On ke, 2015-11-18 at 16:47 +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 05:11:03PM +0200, Imre Deak wrote: > > On ke, 2015-11-18 at 16:01 +0100, Daniel Vetter wrote: > > > On Wed, Nov 18, 2015 at 04:58:46PM +0200, Imre Deak wrote: > > > > Otherwise assert_rpm_wakelock_held() also

Re: [Intel-gfx] [PATCH] drm/i915/skl: enable PC9/10 power states during suspend-to-idle

On Wed, Nov 18, 2015 at 05:32:30PM +0200, Imre Deak wrote: > During suspend-to-idle we need to keep the DMC firmware active and DC6 > enabled, since otherwise we won't reach deep system power states like > PC9/10. The lead for this came from Nivedita who noticed that the > kernel's turbostat tool

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Remove platform specific *_dp_detect() functions

On Wed, Nov 18, 2015 at 05:19:30PM +0200, Ander Conselvan de Oliveira wrote: > Their logic is exactly the same: check if the digital port is connected > and then call intel_dp_detect_dpcd(). So just put that logic in their > only caller: intel_dp_detect(). > > Signed-off-by: Ander Conselvan de

Re: [Intel-gfx] i-g-t/libdrm email tagging & patchwork

2015-11-18 8:56 GMT-02:00 Daniel Vetter : > On Sun, Nov 08, 2015 at 12:31:36AM +, Damien Lespiau wrote: >> Hi all, >> >> I've added a feature to sort the patches sent to intel-gfx into 3 >> buckets: i915, intel-gpu-tools and libdrm. This sorting relies on >> tagging patches,

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Remove platform specific *_dp_detect() functions

On Wed, 2015-11-18 at 17:28 +0200, Ville Syrjälä wrote: > On Wed, Nov 18, 2015 at 05:19:30PM +0200, Ander Conselvan de Oliveira wrote: > > Their logic is exactly the same: check if the digital port is connected > > and then call intel_dp_detect_dpcd(). So just put that logic in their > > only

Re: [Intel-gfx] [PATCH igt 00/10] igt_fb buffer sizes + kms_frontbuffer_tracking

2015-11-18 13:59 GMT-02:00 Daniel Vetter : > On Fri, Nov 13, 2015 at 03:12:41PM -0200, Paulo Zanoni wrote: >> Hello >> >> I've been carrying some local IGT patches that reduced the size of buffers >> created by igt_create_fb() so they would fit the stolen memory, but when I >>

Re: [Intel-gfx] [Announcement] 2015-Q3 release of XenGT - a Mediated Graphics Passthrough Solution from Intel

[cc +qemu-devel, +paolo, +gerd] On Tue, 2015-10-27 at 17:25 +0800, Jike Song wrote: > Hi all, > > We are pleased to announce another update of Intel GVT-g for Xen. > > Intel GVT-g is a full GPU virtualization solution with mediated > pass-through, starting from 4th generation Intel Core(TM)

Re: [Intel-gfx] [PATCH 07/31] drm/i915: IPS Sysfs interface.

On Wed, 2015-11-18 at 11:04 +0100, Daniel Vetter wrote: > On Thu, Nov 05, 2015 at 09:04:02PM +, Chris Wilson wrote: > > On Thu, Nov 05, 2015 at 10:49:59AM -0800, Rodrigo Vivi wrote: > > > With the lock in place we can expose ips enabled/disable on sysfs > > > for developing, debugging and

[Intel-gfx] [PATCH] drm/i915/skl: re-enable power well support

Now that the known DMC/DC issues are fixed, let's try again and re-enable the power well support. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/intel_runtime_pm.c | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c

Re: [Intel-gfx] [PATCH 10/31] drm/i915: Detatch i915.enable_psr from psr_ready

On Wed, 2015-11-18 at 11:07 +0100, Daniel Vetter wrote: > On Thu, Nov 05, 2015 at 10:50:02AM -0800, Rodrigo Vivi wrote: > > PSR will be enabled on every post primary update when it is > > ready and parameter allows. > > With this we allow test cases to continue using this parameter > > for

Re: [Intel-gfx] [PATCH 12/31] drm/i915: Fix PSR initialization.

On Wed, 2015-11-18 at 11:12 +0100, Daniel Vetter wrote: > On Thu, Nov 05, 2015 at 10:50:04AM -0800, Rodrigo Vivi wrote: > > PSR is still disabled by default, but even passing > > i915.enable_psr=1 > > at this point we weren't able to get PSR working because with > > fastboot by default in place

[Intel-gfx] [PATCH] Add Kabylake PCI IDs

Add the Kabylake PCI IDs based on the following patches. commit d97044b661d0d56b2a2ae9b2b95ab0b359b417dc Author: Deepak S Date: Wed Oct 28 12:19:51 2015 -0700 drm/i915/kbl: Add Kabylake PCI ID commit 8b10c0cf21ec84618d4bf02c73c0543500ece68d Author: Deepak S

Re: [Intel-gfx] [PATCH 0/5] Sink CRC stabilization

On Wed, 2015-11-18 at 15:55 +0100, Daniel Vetter wrote: > On Mon, Nov 16, 2015 at 03:59:15PM +, Rodrigo Vivi wrote: > > Hi Daniel, > > > > could you please ignore patch 5 in this series and merge the 4 > > first > > patches. > > I merged an earlier instance of the first 4 patches. Has

Re: [Intel-gfx] [PATCH i-g-t] Add dmesg capture and dumping to tests and a test for it.

On ke, 2015-11-18 at 17:41 +, Thomas Wood wrote: > On 18 November 2015 at 15:44, Daniel Vetter wrote: > > On Mon, Nov 16, 2015 at 03:22:23PM +0200, Joonas Lahtinen wrote: > > > Cc: Thomas Wood > > > Cc: Chris Wilson > > > Cc:

Re: [Intel-gfx] [PATCH] drm/i915: Use dpcd read wake for sink crc calls.

On Tue, 2015-11-17 at 15:08 +0100, Daniel Vetter wrote: > On Mon, Nov 16, 2015 at 04:05:42PM +, Rodrigo Vivi wrote: > > Ok, so after trying it we saw that we really cannot trust on aux > > mutex.At > > least not on all SKL/KBL > > It worked in a KBL but failed on a SKL that I have here... > >

Re: [Intel-gfx] [PATCH 28/31] drm/i915: Make Sink crc calculation waiting for counter to reset.

On Wed, 2015-11-18 at 11:25 +0100, Daniel Vetter wrote: > On Tue, Nov 10, 2015 at 07:49:51PM -0200, Paulo Zanoni wrote: > > 2015-11-10 18:31 GMT-02:00 Paulo Zanoni : > > > 2015-11-05 16:50 GMT-02:00 Rodrigo Vivi : > > > > According to VESA DP spec

[Intel-gfx] [PATCH 1/2] drm/i915: PSR: Let's rely more on frontbuffer tracking.

The ultimate goal here is to remove the dependency we currently have on audio driver power to get PSR working. Since with audio driver runtime PM disabled the Hardware tracking believes graphics is fully active and prevent PSR Entry, or in other words continuously exit PSR. So, the idea is to

Re: [Intel-gfx] [PATCH 1/2] drm/i915: PSR: Let's rely more on frontbuffer tracking.

Em Qua, 2015-11-18 às 11:21 -0800, Rodrigo Vivi escreveu: > The ultimate goal here is to remove the dependency we > currently have on audio driver power to get PSR working. > Since with audio driver runtime PM disabled the Hardware tracking > believes graphics is fully active and prevent PSR

[Intel-gfx] [PATCH] drm/i915: Force PSR exit when IRQ_HPD is detected on eDP.

According to VESA spec: "If a Source device receives and IRQ_HPD while in a PSR active state, and cannot identify what caused the IRQ_HPD to be generated, based on Sink device status registers, the Source device can take implementation-specific action. One such action can be to exit and then

[Intel-gfx] [PATCH 2/2] drm/i915: PSR: Mask LPSP hw tracking back again.

When we introduced PSR we let LPSP masked allowing us to get PSR independently from the audio runtime PM. However in one of the attempts to get PSR enabled by default one user reported one specific case where he would miss screen updates if scrolling the firefox in a Gnome environment when i915

Re: [Intel-gfx] [PATCH 2/2] drm/i915: PSR: Mask LPSP hw tracking back again.

Em Qua, 2015-11-18 às 11:21 -0800, Rodrigo Vivi escreveu: > When we introduced PSR we let LPSP masked allowing us to get PSR > independently from the audio runtime PM. However in one of the > attempts to get PSR enabled by default one user reported one specific > case where he would miss screen

Re: [Intel-gfx] [PATCH 2/2] drm/i915: add MISSING_CASE to a few port/aux power domain helpers

On Wed, 2015-11-18 at 15:34 +0100, Patrik Jakobsson wrote: > On Wed, Nov 18, 2015 at 03:57:25PM +0200, Imre Deak wrote: > > MISSING_CASE() would have been useful to track down a recent > > problem in > > intel_display_port_aux_power_domain(), so add it there and a few > > related > > helpers. This

Re: [Intel-gfx] [PATCH 12/31] drm/i915: Fix PSR initialization.

On Thu, Nov 05, 2015 at 10:50:04AM -0800, Rodrigo Vivi wrote: > PSR is still disabled by default, but even passing i915.enable_psr=1 > at this point we weren't able to get PSR working because with > fastboot by default in place we weren't executing the path that enables > encoder and consequently

[Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

Uninitialized variables (width, Height) in intel_check_sprite_plane leads to compilererror in O1 level. Initialize all declared variables to fix this issue. Signed-off-by: Nabendu Maiti --- drivers/gpu/drm/i915/intel_sprite.c | 2 +- 1 file changed, 1

Re: [Intel-gfx] [PATCH v1 1/2] drm/i915:skl: Add WaEnableGapsTsvCreditFix

Hi, Just applying this patch is enough to make gem_ringfill --r render work on my SKL 2+2 DT GT2 system I have at Espoo. I do not need the second patch which seems to be required for Arun's SKL. Also working with just that patch on one SKL Y system here at Egham office. It's some months older

[Intel-gfx] [PATCH v2] PCI / PM: tune down RPM suspend error message with EBUSY and EAGAIN retval

The runtime PM core doesn't treat EBUSY and EAGAIN retvals from the driver suspend hooks as errors, but they still show up as errors in dmesg. Tune them down. One problem caused by this was noticed by Daniel: the i915 driver returns EAGAIN to signal a temporary failure to suspend and as a request

Re: [Intel-gfx] [PATCH i-g-t] tests/gem_reset_stats.c: prepare for per engine resets

On Wed, Nov 18, 2015 at 10:24:43AM +, tim.g...@intel.com wrote: > From: Tim Gore > > when checking to make sure that the driver has performed > the expected number of resets, this test looks at the > reset_count, which is incremented each time the GPU is > reset. Upcoming

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

agreed, this is better On 11/18/2015 5:49 PM, Chris Wilson wrote: On Wed, Nov 18, 2015 at 05:43:52PM +0530, Nabendu Maiti wrote: Uninitialized variables (width, Height) in intel_check_sprite_plane leads to compilererror in O1 level. Initialize all declared variables to fix this issue.

[Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

From: Marius Vlad The power metter was not showing up due to a check over I915_PERF_ENERGY. ENOENT is returned when I915_PERF_ENERGY is not available, and we use that for relaying on debugfs i915_energy_uJ. Signed-off-by: Marius Vlad ---

Re: [Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

On Wed, Nov 18, 2015 at 02:36:22PM +0200, Marius Vlad wrote: > The power metter was not showing up due to a check over I915_PERF_ENERGY. > ENOENT is returned when I915_PERF_ENERGY is not available, and we use > that for relaying on debugfs i915_energy_uJ. > > Signed-off-by: Marius Vlad

Re: [Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

On Wed, Nov 18, 2015 at 12:50:10PM +, Vlad, Marius C wrote: > Just trying to figure out what we have currently. I can redo with with -1, if > that's > OK with you. Already pushed. > Out of curiosity noticed that I915_PERF_ENERGY is not available on my > machine, > is that related to

Re: [Intel-gfx] [PATCH] drm/i915: Add BXT Sprite plane fractional scalings

On Wed, Nov 18, 2015 at 05:13:01PM +0530, Nabendu Maiti wrote: > On older platforms scalers/cliping used to provide destination size an > exact multiple of src size. > Gen-9 and above support fractional ratio of dst/src so that source is > not manipulated to meet the exact multiple factor. > >

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

On Wed, Nov 18, 2015 at 05:43:52PM +0530, Nabendu Maiti wrote: > Uninitialized variables (width, Height) in intel_check_sprite_plane > leads to compilererror in O1 level. Initialize all declared variables > to fix this issue. > > Signed-off-by: Nabendu Maiti Or

[Intel-gfx] [PATCH i-g-t v3] lib/igt_core: Prefer CLOCK_MONOTONIC_RAW

CLOCK_MONOTONIC_RAW is not affected by NTP, so it should be THE clock used for timing execution of tests. When fetching either the starting or ending time of a test, show the time as -1.000s. v3: - Do not exit directly from handler (Chris) - Show elapsed time as -1 if it is not calculable v2: -

Re: [Intel-gfx] [PATCH] drm/i915: Consider SPLL as another shared pll, v2.

On 16.11.2015 17:53, Jani Nikula wrote: On Mon, 16 Nov 2015, Maarten Lankhorst wrote: When diagnosing a unrelated bug for someone on irc, it would seem the hardware can be brought up by the BIOS with the embedded displayport using the SPLL for spread

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

On Wed, Nov 18, 2015 at 12:19:06PM +, Chris Wilson wrote: > On Wed, Nov 18, 2015 at 05:43:52PM +0530, Nabendu Maiti wrote: > > Uninitialized variables (width, Height) in intel_check_sprite_plane > > leads to compilererror in O1 level. Initialize all declared variables > > to fix this issue. >

[Intel-gfx] [PATCH] drm/i915: Add BXT Sprite plane fractional scalings

On older platforms scalers/cliping used to provide destination size an exact multiple of src size. Gen-9 and above support fractional ratio of dst/src so that source is not manipulated to meet the exact multiple factor. Signed-off-by: Nabendu Maiti ---

Re: [Intel-gfx] [PATCH i-g-t v3] lib/igt_core: Prefer CLOCK_MONOTONIC_RAW

On Wed, Nov 18, 2015 at 02:18:52PM +0200, Joonas Lahtinen wrote: > CLOCK_MONOTONIC_RAW is not affected by NTP, so it should be THE clock > used for timing execution of tests. > > When fetching either the starting or ending time of a test, show the > time as -1.000s. > > v3: > - Do not exit

Re: [Intel-gfx] [PATCH] drm/i915: Consider SPLL as another shared pll, v2.

On 18 November 2015 at 13:31, Gabriel Feceoru wrote: > > > On 16.11.2015 17:53, Jani Nikula wrote: >> >> On Mon, 16 Nov 2015, Maarten Lankhorst >> wrote: >>> >>> When diagnosing a unrelated bug for someone on irc, it would seem the

[Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

From: Marius Vlad The power metter was not showing up due to a check over I915_PERF_ENERGY. ENOENT is returned when I915_PERF_ENERGY is not available, and we use that for relaying on debugfs i915_energy_uJ. Signed-off-by: Marius Vlad ---

Re: [Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

Just trying to figure out what we have currently. I can redo with with -1, if that's OK with you. Out of curiosity noticed that I915_PERF_ENERGY is not available on my machine, is that related to i915_oa? (Haswell). -Original Message- From: Chris Wilson

Re: [Intel-gfx] [PATCH] drm/i915: Consider SPLL as another shared pll, v2.

On Wed, 18 Nov 2015, Emil Renner Berthing wrote: > On 18 November 2015 at 13:31, Gabriel Feceoru > wrote: >> >> >> On 16.11.2015 17:53, Jani Nikula wrote: >>> >>> On Mon, 16 Nov 2015, Maarten Lankhorst >>> wrote:

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bxt: Universal plane pixel format support

On Fri, Nov 06, 2015 at 07:34:46PM +0530, Vandita Kulkarni wrote: > From: vandita kulkarni > > This patch adds support for RGB formats on sprites > for BXT (as per Bspec) as we have Universal planes > This patch also adds support for AYUV format on > primary and

Re: [Intel-gfx] i915 Skylake: "Invalid ROM contents"

On Tue, Nov 17, 2015 at 11:43:25AM -0800, Andy Lutomirski wrote: > Typing: > > # cat /sys/devices/pci:00/:00:02.0/rom > > Provokes: > > i915 :00:02.0: Invalid ROM contents Hmm. So there's no PCI option ROM there. I wonder what is there. I get the same on my Braswell BTW. I tried to

[Intel-gfx] [PATCH] drm/i915: Correcting proper src & dst height - width comparision for 90/270 rotation.

On 90/270 rotation case source width and height was not compared properly with destination height and width check plane.Which added erroneous check while doing scaling or normal 90/270 rotation. Signed-off-by: Nabendu Maiti ---

Re: [Intel-gfx] [PATCH] drm/i915/bxt: Fix uninitialized variables in intel_check_sprite_plane

On Wed, Nov 18, 2015 at 05:43:52PM +0530, Nabendu Maiti wrote: > Uninitialized variables (width, Height) in intel_check_sprite_plane > leads to compilererror in O1 level. Initialize all declared variables > to fix this issue. > > Signed-off-by: Nabendu Maiti > ---

Re: [Intel-gfx] [PATCH v2 17/29] drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl

On Fri, Nov 06, 2015 at 09:43:41PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > Store the upper dword of the register offset in the whitelist as well. > This would allow it to read register where the two halves aren't sitting > right next

[Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay Fix power consumption not being displayed

The power metter was not showing up due to a check over I915_PERF_ENERGY. ENOENT is returned when I915_PERF_ENERGY is not available, and we use that for relaying on debugfs i915_energy_uJ. Signed-off-by: Marius Vlad --- overlay/power.c | 4 ++-- 1 file changed, 2

Re: [Intel-gfx] [PATCH i-g-t] overlay/intel-gpu-overlay

On Wed, Nov 18, 2015 at 02:40:29PM +0200, marius.c.v...@intel.com wrote: > From: Marius Vlad > > Use sigaction() instead of signal() and add SIGINT, SIGTERM to close > the overlay window. With this change the overlay window will be > destroyed. > > Signed-off-by: Marius

Re: [Intel-gfx] [PATCH] drm/i915: Add BXT Sprite plane fractional scalings

On 11/18/2015 5:41 PM, Ville Syrjälä wrote: On Wed, Nov 18, 2015 at 05:13:01PM +0530, Nabendu Maiti wrote: On older platforms scalers/cliping used to provide destination size an exact multiple of src size. Gen-9 and above support fractional ratio of dst/src so that source is not manipulated

Re: [Intel-gfx] [PATCH i-g-t v3] lib/igt_core: Prefer CLOCK_MONOTONIC_RAW

On Wed, Nov 18, 2015 at 02:54:20PM +0200, Joonas Lahtinen wrote: > On ke, 2015-11-18 at 12:28 +, Chris Wilson wrote: > > On Wed, Nov 18, 2015 at 02:18:52PM +0200, Joonas Lahtinen wrote: > > > CLOCK_MONOTONIC_RAW is not affected by NTP, so it should be THE > > > clock > > > used for timing

Re: [Intel-gfx] [PATCH] drm/i915: Don't fail rpm suspend with -EGAIN

On Tue, Nov 17, 2015 at 11:35:33PM +0200, Imre Deak wrote: > On Tue, 2015-11-17 at 23:30 +0200, Ville Syrjälä wrote: > > On Tue, Nov 17, 2015 at 10:18:41PM +0100, Daniel Vetter wrote: > > > If we can't acquire dev->struct_mutex we need to fail runtime suspend, > > > at least with the current

Re: [Intel-gfx] [PATCH i-g-t v3] lib/igt_core: Prefer CLOCK_MONOTONIC_RAW

On ke, 2015-11-18 at 12:28 +, Chris Wilson wrote: > On Wed, Nov 18, 2015 at 02:18:52PM +0200, Joonas Lahtinen wrote: > > CLOCK_MONOTONIC_RAW is not affected by NTP, so it should be THE > > clock > > used for timing execution of tests. > > > > When fetching either the starting or ending time

Re: [Intel-gfx] i-g-t/libdrm email tagging & patchwork

On Sun, Nov 08, 2015 at 12:31:36AM +, Damien Lespiau wrote: > Hi all, > > I've added a feature to sort the patches sent to intel-gfx into 3 > buckets: i915, intel-gpu-tools and libdrm. This sorting relies on > tagging patches, using the subject prefixes (which is what most people > do already

Re: [Intel-gfx] [PATCH i-g-t] tests/gem_reset_stats.c: prepare for per engine resets

Tim Gore  Intel Corporation (UK) Ltd. - Co. Reg. #1134945 - Pipers Way, Swindon SN3 1RJ > -Original Message- > From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel > Vetter > Sent: Wednesday, November 18, 2015 11:54 AM > To: Gore, Tim > Cc:

Re: [Intel-gfx] [PATCH] drm/i915: Correcting proper src & dst height - width comparision for 90/270 rotation.

On Wed, Nov 18, 2015 at 05:19:26PM +0530, Nabendu Maiti wrote: > On 90/270 rotation case source width and height was not compared > properly with destination height and width check plane.Which added > erroneous check while doing scaling or normal 90/270 rotation. > > Signed-off-by: Nabendu Maiti

[Intel-gfx] [PATCH i-g-t 2/3] tests: add context param to pm_backlight tests

We'll be adding more context for the subtests than just the max brightness. Signed-off-by: Jani Nikula --- tests/pm_backlight.c | 39 ++- 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/tests/pm_backlight.c

[Intel-gfx] [PATCH i-g-t 1/3] tests: use igt_assert_lte to verify pm_backlight test results

Gives out better diagnostics than just igt_asssert. Signed-off-by: Jani Nikula --- tests/pm_backlight.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/pm_backlight.c b/tests/pm_backlight.c index d24fb1034198..bdc0e33de94c 100644 ---

[Intel-gfx] [PATCH i-g-t 3/3] tests: limit pm_backlight actual brightness tolerance between 0 and max

Signed-off-by: Jani Nikula --- tests/pm_backlight.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/tests/pm_backlight.c b/tests/pm_backlight.c index c199b9bf4baf..8258d4e4c124 100644 --- a/tests/pm_backlight.c +++

Re: [Intel-gfx] [PATCH] drm/i915: Unpin framebuffers when crtc is deconfigured.

Op 17-11-15 om 19:54 schreef Daniel Vetter: > On Wed, Nov 04, 2015 at 02:43:31PM +0100, Maarten Lankhorst wrote: >> When setcrtc is called and steals the last connector away from a crtc >> it's turned off because it can't stay configured without connectors. >> >> The framebuffer is still preserved

[Intel-gfx] [PATCH 3/3] drm/i915: Limit request busywaiting

If we suppose that on average it takes 1ms to do a fullscreen paint (which is fairly typical across generations, as the GPUs get faster the displays get larger), then the likelihood of a synchronous wait on the last request completing within 2 microseconds is miniscule. On the other hand, not

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Mark uneven memory banks on gen4 desktop as unknown swizzling

On Tue, Nov 17, 2015 at 10:40:51AM +, Chris Wilson wrote: > We have varied reports of swizzling corruption on gen4 desktop, and > confirmation that it is triggered by uneven memory banks. The > implication is that the swizzling various between the paired channels > and the remainder of memory

Re: [Intel-gfx] [PATCH i-g-t 2/8] kms_frontbuffer_tracking: Skip on unreliable CRC.

On Thu, Nov 05, 2015 at 06:30:30PM -0200, Paulo Zanoni wrote: > 2015-11-05 16:53 GMT-02:00 Rodrigo Vivi : > > Even with all sink crc re-works we still have platforms > > where after 6 vblanks it is unable to calculate the > > sink crc. But if we don't get the sink crc it

Re: [Intel-gfx] [PATCH 0/6] Fixing sink count related detection over

On Wed, 2015-11-18 at 11:12 +0530, Shubhangi Shrivastava wrote: > > On Wednesday 18 November 2015 01:23 AM, Daniel Vetter wrote: > > On Mon, Nov 02, 2015 at 06:25:10PM +0530, Shubhangi Shrivastava wrote: > > > This patch set cleans up DP detection logic to bring all DPCD > > > operations at one

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Make prepare_plane_fb fully interruptible."

On Wed, 2015-11-18 at 09:55 +0100, Daniel Vetter wrote: > On Wed, Nov 18, 2015 at 09:36:46AM +0100, Maarten Lankhorst wrote: > > Op 17-11-15 om 18:44 schreef Daniel Vetter: > > > On Mon, Nov 02, 2015 at 05:38:07PM +0200, Ville Syrjälä wrote: > > > > On Mon, Nov 02, 2015 at 01:41:03PM +0100,

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Make prepare_plane_fb fully interruptible."

On Wed, Nov 18, 2015 at 09:36:46AM +0100, Maarten Lankhorst wrote: > Op 17-11-15 om 18:44 schreef Daniel Vetter: > > On Mon, Nov 02, 2015 at 05:38:07PM +0200, Ville Syrjälä wrote: > >> On Mon, Nov 02, 2015 at 01:41:03PM +0100, Maarten Lankhorst wrote: > >>> Hey, > >>> > >>> Op 30-10-15 om 22:06

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Add a modeset power domain

On Sat, Nov 07, 2015 at 08:29:49AM +1000, Dave Airlie wrote: > On 3 November 2015 at 22:31, Patrik Jakobsson > wrote: > > We need DC5/DC6 to be disabled around modesets to prevent confusing the > > DMC. Also, we've run out of bits in the 32 bit power domain mask

[Intel-gfx] [PATCH] PCI / PM: tune down RPM suspend error message with EBUSY and EAGAIN retval

The runtime PM core doesn't treat EBUSY and EAGAIN retvals from the driver suspend hooks as errors, but they still show up as errors in dmesg. Tune them down. One problem caused by this was noticed by Daniel: the i915 driver returns EAGAIN to signal a temporary failure to suspend and as a request

Re: [Intel-gfx] [PATCH 4/8] drm/i915: Add a modeset power domain

On Wed, Nov 18, 2015 at 10:02 AM, Daniel Vetter wrote: > On Sat, Nov 07, 2015 at 08:29:49AM +1000, Dave Airlie wrote: >> On 3 November 2015 at 22:31, Patrik Jakobsson >> wrote: >> > We need DC5/DC6 to be disabled around modesets to prevent

Re: [Intel-gfx] [PATCH 07/31] drm/i915: IPS Sysfs interface.

On Thu, Nov 05, 2015 at 09:04:02PM +, Chris Wilson wrote: > On Thu, Nov 05, 2015 at 10:49:59AM -0800, Rodrigo Vivi wrote: > > With the lock in place we can expose ips enabled/disable on sysfs > > for developing, debugging and information purposes. > > No. sysfs is not for developement,

Re: [Intel-gfx] [PATCH 16/31] drm/i915: Fix DRRS initialization.

On Thu, Nov 05, 2015 at 10:50:08AM -0800, Rodrigo Vivi wrote: > With Fastboot by default we don't necessarily do a > full modeset enabling the primary plane. > So DRRS enable call that was in that path wasn't being > called anymore. > > So, let's relly on post atomic modeset path > and on

Re: [Intel-gfx] [drm-intel:drm-intel-next-queued 0/1] warning: (DRM_I915) selects STOP_MACHINE which has unmet direct dependencies (SMP && ..)

On Wed, Nov 18, 2015 at 02:17:17AM +0800, kbuild test robot wrote: > tree: git://anongit.freedesktop.org/drm-intel drm-intel-next-queued > head: e64e6bd0f46c78b53b236474f59bd1290b834c89 > commit: 5bab6f60cb4d1417ad7c599166bcfec87529c1a2 [0/1] drm/i915: Serialise > updates to GGTT with access

Re: [Intel-gfx] [PATCH] Revert "drm/i915: Make prepare_plane_fb fully interruptible."

Op 17-11-15 om 18:44 schreef Daniel Vetter: > On Mon, Nov 02, 2015 at 05:38:07PM +0200, Ville Syrjälä wrote: >> On Mon, Nov 02, 2015 at 01:41:03PM +0100, Maarten Lankhorst wrote: >>> Hey, >>> >>> Op 30-10-15 om 22:06 schreef ville.syrj...@linux.intel.com: From: Ville Syrjälä

Re: [Intel-gfx] [PATCH] drm/i915: Add some more bits to CURSOR_POS_MASK

On Wed, Nov 04, 2015 at 10:59:28AM +0100, Patrik Jakobsson wrote: > On Wed, Nov 04, 2015 at 10:35:19AM +0100, Robert Fekete wrote: > > The old value of 0x7FF will wrap the position at 2048 giving wrong > > coordinate values on panels larger than 2048 pixels in any direction. > > Used in

Re: [Intel-gfx] [PATCH 12/29] drm/i915: Streamline gpio_mmio_base deduction

On Wed, Nov 04, 2015 at 11:20:00PM +0200, ville.syrj...@linux.intel.com wrote: > From: Ville Syrjälä > > If we ignore the BXT situation, we can observe that the only variables > affecting gpio_mmio_base is IS_VALLEVIEW and HAS_GMCH_DISPLAY. The BXT > situation we

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