Re: [Intel-gfx] [PATCH 2/2] Revert "vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV"

2021-04-26 Thread Zhenyu Wang
On 2021.04.26 14:40:17 -0300, Jason Gunthorpe wrote: > On Mon, Apr 26, 2021 at 10:55:55AM -0600, Alex Williamson wrote: > > On Mon, 26 Apr 2021 17:41:43 +0800 > > Zhenyu Wang wrote: > > > > > This reverts commit 07e543f4f9d116d6b4240644191dee6388ef4a85. > > > > 07e543f4f9d1 ("vfio/gvt: Make

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: i915: fix build when ACPI is disabled and BACKLIGHT=m

2021-04-26 Thread Patchwork
== Series Details == Series: drm: i915: fix build when ACPI is disabled and BACKLIGHT=m URL : https://patchwork.freedesktop.org/series/89509/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10011_full -> Patchwork_19995_full

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops URL : https://patchwork.freedesktop.org/series/89503/ State : success == Summary == CI Bug Log - changes from CI_DRM_10011_full -> Patchwork_19994_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 URL : https://patchwork.freedesktop.org/series/89502/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10011_full -> Patchwork_19993_full

Re: [Intel-gfx] [PATCH 1/2] drm/i915/gvt: Move mdev attribute groups into kvmgt module

2021-04-26 Thread Zhenyu Wang
On 2021.04.26 10:39:24 -0300, Jason Gunthorpe wrote: > On Mon, Apr 26, 2021 at 05:41:42PM +0800, Zhenyu Wang wrote: > > @@ -1667,19 +1773,26 @@ static struct mdev_parent_ops intel_vgpu_ops = { > > > > static int kvmgt_host_init(struct device *dev, void *gvt, const void *ops) > > { > > -

Re: [Intel-gfx] [PATCH] drm/i915: Stop using crtc->index as the pipe

2021-04-26 Thread Ville Syrjälä
On Tue, Apr 27, 2021 at 12:07:21AM +, Souza, Jose wrote: > On Mon, 2021-04-26 at 21:56 +0300, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > The pipe crc code slipped theough the net when we tried to > > eliminate all crtc->index==pipe abuses. Remedy that. > > > > And while at it get

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp URL : https://patchwork.freedesktop.org/series/89500/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10010_full -> Patchwork_19992_full

Re: [Intel-gfx] [Nouveau] [PATCH v4 00/17] drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers

2021-04-26 Thread Dave Airlie
On Sat, 24 Apr 2021 at 04:43, Lyude Paul wrote: > > Since it's been asked quite a few times on some of the various DP > related patch series I've submitted to use the new DRM printk helpers, > and it technically wasn't really trivial to do this before due to the > lack of a consistent way to find

Re: [Intel-gfx] [PATCH] drm/i915: Stop using crtc->index as the pipe

2021-04-26 Thread Souza, Jose
On Mon, 2021-04-26 at 21:56 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > The pipe crc code slipped theough the net when we tried to > eliminate all crtc->index==pipe abuses. Remedy that. > > And while at it get rid of those nasty intel_crtc+drm_crtc > pointer aliases. intel_crtc is

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4)

2021-04-26 Thread Souza, Jose
On Mon, 2021-04-26 at 23:11 +, Patchwork wrote: Patch Details Series: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4) URL:https://patchwork.freedesktop.org/series/89348/ State: success Details:

Re: [Intel-gfx] [PATCH 10/21] drm/i915/request: Remove the hook from await_execution

2021-04-26 Thread Jason Ekstrand
Sadly, we can't have this patch as long as we support SUBMIT_FENCE. Turns out this is used for something real. :-( --Jason On Fri, Apr 23, 2021 at 5:31 PM Jason Ekstrand wrote: > > This was only ever used for bonded virtual engine execution. Since > that's no longer allowed, this is dead code.

[Intel-gfx] [PATCH 08/20] drm/i915/gem: Disallow bonding of virtual engines (v2)

2021-04-26 Thread Jason Ekstrand
This adds a bunch of complexity which the media driver has never actually used. The media driver does technically bond a balanced engine to another engine but the balanced engine only has one engine in the sibling set. This doesn't actually result in a virtual engine. Unless some userspace

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4)

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4) URL : https://patchwork.freedesktop.org/series/89348/ State : success == Summary == CI Bug Log - changes from CI_DRM_10009_full -> Patchwork_19991_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Stop using crtc->index as the pipe

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Stop using crtc->index as the pipe URL : https://patchwork.freedesktop.org/series/89511/ State : success == Summary == CI Bug Log - changes from CI_DRM_10013 -> Patchwork_19996 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: i915: fix build when ACPI is disabled and BACKLIGHT=m

2021-04-26 Thread Patchwork
== Series Details == Series: drm: i915: fix build when ACPI is disabled and BACKLIGHT=m URL : https://patchwork.freedesktop.org/series/89509/ State : success == Summary == CI Bug Log - changes from CI_DRM_10011 -> Patchwork_19995 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: i915: fix build when ACPI is disabled and BACKLIGHT=m

2021-04-26 Thread Patchwork
== Series Details == Series: drm: i915: fix build when ACPI is disabled and BACKLIGHT=m URL : https://patchwork.freedesktop.org/series/89509/ State : warning == Summary == $ dim checkpatch origin/drm-tip 1db2d6629e36 drm: i915: fix build when ACPI is disabled and BACKLIGHT=m -:16:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops URL : https://patchwork.freedesktop.org/series/89503/ State : success == Summary == CI Bug Log - changes from CI_DRM_10011 -> Patchwork_19994

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops URL : https://patchwork.freedesktop.org/series/89503/ State : warning == Summary == $ dim checkpatch origin/drm-tip 16d0229a8c52 drm/i915: Invoke another _DSM to enable MUX on HP Workstation

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 URL : https://patchwork.freedesktop.org/series/89502/ State : success == Summary == CI Bug Log - changes from CI_DRM_10011 -> Patchwork_19993

Re: [Intel-gfx] [PATCH 01/12] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE

2021-04-26 Thread Randy Dunlap
On 4/26/21 11:26 AM, Jason Gunthorpe wrote: > On Fri, Apr 23, 2021 at 05:08:10PM -0700, Randy Dunlap wrote: >> On 4/23/21 4:02 PM, Jason Gunthorpe wrote: >>> @@ -171,7 +171,7 @@ config SAMPLE_VFIO_MDEV_MDPY_FB >>> >>> config SAMPLE_VFIO_MDEV_MBOCHS >>> tristate "Build VFIO mdpy example

[Intel-gfx] [PATCH] drm/i915: Stop using crtc->index as the pipe

2021-04-26 Thread Ville Syrjala
From: Ville Syrjälä The pipe crc code slipped theough the net when we tried to eliminate all crtc->index==pipe abuses. Remedy that. And while at it get rid of those nasty intel_crtc+drm_crtc pointer aliases. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_pipe_crc.c | 51

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 URL : https://patchwork.freedesktop.org/series/89502/ State : warning == Summary == $ dim checkpatch origin/drm-tip 9afaf45bfe53 drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7 -:14:

[Intel-gfx] [PATCH] drm: i915: fix build when ACPI is disabled and BACKLIGHT=m

2021-04-26 Thread Randy Dunlap
isplay/intel_panel.c |2 +- drivers/gpu/drm/i915/display/intel_panel.h |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) --- linux-next-20210426.orig/drivers/gpu/drm/i915/display/intel_panel.c +++ linux-next-20210426/drivers/gpu/drm/i915/display/intel_panel.c @@ -12

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2. URL : https://patchwork.freedesktop.org/series/89485/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10008_full -> Patchwork_19989_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp URL : https://patchwork.freedesktop.org/series/89500/ State : success == Summary == CI Bug Log - changes from CI_DRM_10010 -> Patchwork_19992

Re: [Intel-gfx] [PATCH] drm/dp_mst: Use the correct DPCD space in Synaptics quirk

2021-04-26 Thread Lyude Paul
mhhh, probably should do this a bit differently. Also adding Koba since this involves using extended DPCD caps in the MST topology mgr. On Fri, 2021-04-23 at 16:05 -0400, Nikola Cornij wrote: > [why] > Two conditions that were part of this fix did not go through: > > 1. DPCD revision has to

[Intel-gfx] [PATCH] drm/i9i5/gt: Fix a double free in gen8_preallocate_top_level_pdp

2021-04-26 Thread Lv Yunlong
Our code analyzer reported a double free bug. In gen8_preallocate_top_level_pdp, pde and pde->pt.base are allocated via alloc_pd(vm) with one reference. If pin_pt_dma() failed, pde->pt.base is freed by i915_gem_object_put() with a reference dropped. Then free_pd calls free_px() defined in

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Rewrite CL/CTG L-shaped memory detection

2021-04-26 Thread Ville Syrjälä
On Mon, Apr 26, 2021 at 06:08:59PM +0200, Daniel Vetter wrote: > On Thu, Apr 22, 2021 at 04:11:22PM +0300, Ville Syrjälä wrote: > > On Thu, Apr 22, 2021 at 11:49:43AM +0200, Daniel Vetter wrote: > > > On Wed, Apr 21, 2021 at 06:34:01PM +0300, Ville Syrjala wrote: > > > > From: Ville Syrjälä > > >

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89484/ State : success == Summary == CI Bug Log - changes from CI_DRM_10008_full -> Patchwork_19988_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4)

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev4) URL : https://patchwork.freedesktop.org/series/89348/ State : success == Summary == CI Bug Log - changes from CI_DRM_10009 -> Patchwork_19991

Re: [Intel-gfx] [PATCH 2/2] Revert "vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV"

2021-04-26 Thread Alex Williamson
On Mon, 26 Apr 2021 17:41:43 +0800 Zhenyu Wang wrote: > This reverts commit 07e543f4f9d116d6b4240644191dee6388ef4a85. 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV") > With all mdev handing moved to kvmgt module, only kvmgt should depend > on VFIO_MDEV. So revert this one. >

Re: [Intel-gfx] [PATCH v5 16/16] of: Add plumbing for restricted DMA pool

2021-04-26 Thread Claire Chang
On Fri, Apr 23, 2021 at 9:35 PM Robin Murphy wrote: > > On 2021-04-22 09:15, Claire Chang wrote: > > If a device is not behind an IOMMU, we look up the device node and set > > up the restricted DMA when the restricted-dma-pool is presented. > > > > Signed-off-by: Claire Chang > > --- > >

Re: [Intel-gfx] [PATCH v5 08/16] swiotlb: Update is_swiotlb_active to add a struct device argument

2021-04-26 Thread Claire Chang
On Fri, Apr 23, 2021 at 9:31 PM Robin Murphy wrote: > > On 2021-04-22 09:15, Claire Chang wrote: > > Update is_swiotlb_active to add a struct device argument. This will be > > useful later to allow for restricted DMA pool. > > > > Signed-off-by: Claire Chang > > --- > >

Re: [Intel-gfx] [PATCH 4/7] drm/i915/gtt/dgfx: place the PD in LMEM

2021-04-26 Thread Matthew Auld
On 26/04/2021 16:22, Tvrtko Ursulin wrote: On 26/04/2021 11:18, Matthew Auld wrote: It's a requirement that for dgfx we place all the paging structures in device local-memory. v2: use i915_coherent_map_type() Signed-off-by: Matthew Auld Cc: Tvrtko Ursulin ---  

Re: [Intel-gfx] [PATCH v5 05/16] swiotlb: Add restricted DMA pool initialization

2021-04-26 Thread Claire Chang
On Fri, Apr 23, 2021 at 7:34 PM Steven Price wrote: > > On 22/04/2021 09:14, Claire Chang wrote: > > Add the initialization function to create restricted DMA pools from > > matching reserved-memory nodes. > > > > Signed-off-by: Claire Chang > > --- > > include/linux/device.h | 4 +++ > >

Re: [Intel-gfx] [PATCH 1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Daniel Vetter
On Mon, Apr 26, 2021 at 11:25:09AM -0500, Jason Ekstrand wrote: > On Mon, Apr 26, 2021 at 10:31 AM Matthew Auld wrote: > > > > On 26/04/2021 16:11, Jason Ekstrand wrote: > > > On Mon, Apr 26, 2021 at 4:42 AM Matthew Auld > > > wrote: > > >> > > >> Add an entry for the new uAPI needed for DG1.

[Intel-gfx] ✗ Fi.CI.BUILD: failure for Implement PSF GV point support

2021-04-26 Thread Patchwork
== Series Details == Series: Implement PSF GV point support URL : https://patchwork.freedesktop.org/series/89491/ State : failure == Summary == Applying: Implement PSF GV point support error: sha1 information is lacking or useless (drivers/gpu/drm/i915/display/intel_bw.c). error: could not

Re: [Intel-gfx] [PATCH 1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Jason Ekstrand
On Mon, Apr 26, 2021 at 10:31 AM Matthew Auld wrote: > > On 26/04/2021 16:11, Jason Ekstrand wrote: > > On Mon, Apr 26, 2021 at 4:42 AM Matthew Auld wrote: > >> > >> Add an entry for the new uAPI needed for DG1. Also add the overall > >> upstream plan, including some notes for the TTM

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane alignment handling

2021-04-26 Thread Vudum, Lakshminarayana
I have addressed that now. -Original Message- From: Deak, Imre Sent: Monday, April 26, 2021 8:48 AM To: Vudum, Lakshminarayana Cc: intel-gfx@lists.freedesktop.org; Heikkila, Juha-pekka ; Ville Syrjälä Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane

Re: [Intel-gfx] [PATCH 3/7] drm/i915/gtt: map the PD up front

2021-04-26 Thread Matthew Auld
On 26/04/2021 16:20, Tvrtko Ursulin wrote: On 26/04/2021 11:18, Matthew Auld wrote: We need to general our accessor for the page directories and tables from Generalise? using the simple kmap_atomic to support local memory, and this setup must be done on acquisition of the backing storage

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Rewrite CL/CTG L-shaped memory detection

2021-04-26 Thread Daniel Vetter
On Thu, Apr 22, 2021 at 04:11:22PM +0300, Ville Syrjälä wrote: > On Thu, Apr 22, 2021 at 11:49:43AM +0200, Daniel Vetter wrote: > > On Wed, Apr 21, 2021 at 06:34:01PM +0300, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Currently we try to detect a symmetric memory configurations >

Re: [Intel-gfx] [PATCH] drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7

2021-04-26 Thread Ville Syrjälä
On Mon, Apr 26, 2021 at 04:11:24PM +0200, Simon Rettberg wrote: > When resetting CACHE_MODE registers, don't enable HiZ Raw Stall > Optimization on Ivybridge GT1 and Baytrail, as it causes severe glitches > when rendering any kind of 3D accelerated content. > This optimization is disabled on these

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Remove stray newlines

2021-04-26 Thread Imre Deak
On Thu, Mar 18, 2021 at 08:10:39PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > A bunch of files have a stray newline at the end. Remove it. > > Signed-off-by: Ville Syrjälä Reviwed-by: Imre Deak > --- > drivers/gpu/drm/i915/display/i9xx_plane.c | 1 - >

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix pre-skl DP AUX precharge length

2021-04-26 Thread Imre Deak
On Thu, Mar 18, 2021 at 08:10:38PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > DP v1.1+ says: > "The DisplayPort transmitter, which is the driving end for a request > transaction, pre-charges the AUX-CH+ and AUX-CH- to a common mode > voltage by transmitting 10 to 16 consecutive 0’s

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane alignment handling

2021-04-26 Thread Imre Deak
Lakshmi, ah that's true, so no need to re-report the result. In any case the failure of rev 1 on igt@gem_sync@basic-many-each was still unrelated to those changes, so if you still see that occuring again it's good to track it as a known issue. On Mon, Apr 26, 2021 at 06:40:56PM +0300, Vudum,

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane alignment handling

2021-04-26 Thread Vudum, Lakshminarayana
I don't see any regression on rev 2. Lakshmi. -Original Message- From: Deak, Imre Sent: Monday, April 26, 2021 8:00 AM To: intel-gfx@lists.freedesktop.org; Heikkila, Juha-pekka ; Ville Syrjälä ; Vudum, Lakshminarayana Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and

Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Ville Syrjälä
On Mon, Apr 26, 2021 at 07:10:06PM +0800, Kai-Heng Feng wrote: > On Fri, Apr 23, 2021 at 8:41 PM Ville Syrjälä > wrote: > > > > On Fri, Apr 23, 2021 at 12:46:54PM +0800, Kai-Heng Feng wrote: > > > On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX > > > to discrete GFX after

Re: [Intel-gfx] [PATCH] drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

2021-04-26 Thread Thomas Hellström
On 4/26/21 12:23 PM, Maarten Lankhorst wrote: The stop_machine() lock may allocate memory, but is called inside vm->mutex, which is taken in the shrinker. This will cause a lockdep splat, as can be seen below: <4>[ 462.585762] == <4>[

Re: [Intel-gfx] [PATCH 1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Matthew Auld
On 26/04/2021 16:11, Jason Ekstrand wrote: On Mon, Apr 26, 2021 at 4:42 AM Matthew Auld wrote: Add an entry for the new uAPI needed for DG1. Also add the overall upstream plan, including some notes for the TTM conversion. v2(Daniel): - include the overall upstreaming plan - add a note

[Intel-gfx] [PATCH v3] drm/i915: Invoke another _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Kai-Heng Feng
On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX to discrete GFX after S3. This is not desirable, because userspace will treat connected display as a new one, losing display settings. The expected behavior is to let discrete GFX drives all external displays. The platform

Re: [Intel-gfx] [PATCH 4/7] drm/i915/gtt/dgfx: place the PD in LMEM

2021-04-26 Thread Tvrtko Ursulin
On 26/04/2021 11:18, Matthew Auld wrote: It's a requirement that for dgfx we place all the paging structures in device local-memory. v2: use i915_coherent_map_type() Signed-off-by: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 -

Re: [Intel-gfx] [Mesa-dev] [PATCH v3 4/4] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Jason Ekstrand
On Wed, Apr 21, 2021 at 2:23 PM Daniel Vetter wrote: > > On Wed, Apr 21, 2021 at 8:28 PM Tvrtko Ursulin > wrote: > > On 21/04/2021 18:17, Jason Ekstrand wrote: > > > On Wed, Apr 21, 2021 at 9:25 AM Tvrtko Ursulin > > > wrote: > > >> On 21/04/2021 14:54, Jason Ekstrand wrote: > > >>> On Wed, Apr

Re: [Intel-gfx] [PATCH 3/7] drm/i915/gtt: map the PD up front

2021-04-26 Thread Tvrtko Ursulin
On 26/04/2021 11:18, Matthew Auld wrote: We need to general our accessor for the page directories and tables from Generalise? using the simple kmap_atomic to support local memory, and this setup must be done on acquisition of the backing storage prior to entering fence execution contexts.

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI URL : https://patchwork.freedesktop.org/series/89481/ State : failure == Summary == CI Bug Log - changes from CI_DRM_10007_full -> Patchwork_19987_full

Re: [Intel-gfx] [PATCH 1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Jason Ekstrand
On Mon, Apr 26, 2021 at 4:42 AM Matthew Auld wrote: > > Add an entry for the new uAPI needed for DG1. Also add the overall > upstream plan, including some notes for the TTM conversion. > > v2(Daniel): > - include the overall upstreaming plan > - add a note for mmap, there are differences here

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify CCS and UV plane alignment handling

2021-04-26 Thread Imre Deak
On Wed, Apr 21, 2021 at 11:20:44PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Simplify CCS and UV plane alignment handling > URL : https://patchwork.freedesktop.org/series/89299/ > State : failure Thanks for the reviews, pushed to -din with a TODO: update about using

Re: [Intel-gfx] BUG in i915/i915_pci.c, commit fe0f1e3

2021-04-26 Thread Jani Nikula
On Sat, 13 Mar 2021, Mario Hüttel wrote: > Hello, > > I want to report a bug. I have a PC with Intel i7-6700K processor (with > integrated graphics) and an AsRock Fatal1ty Z170 Gaming K6 mainboard. I > use the CPU's integrated graphics. > My system is Archlinux with Kernel v5.11.6. > > Using this

[Intel-gfx] [PATCH] drm/i915/gt: Disable HiZ Raw Stall Optimization on broken gen7

2021-04-26 Thread Simon Rettberg
When resetting CACHE_MODE registers, don't enable HiZ Raw Stall Optimization on Ivybridge GT1 and Baytrail, as it causes severe glitches when rendering any kind of 3D accelerated content. This optimization is disabled on these platforms by default according to official documentation from 01.org.

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2. URL : https://patchwork.freedesktop.org/series/89485/ State : success == Summary == CI Bug Log - changes from CI_DRM_10008 -> Patchwork_19989

Re: [Intel-gfx] [PATCH 10/12] vfio/mdev: Remove mdev_parent_ops

2021-04-26 Thread Christoph Hellwig
> +The mediated bus driver's probe function should create a vfio_device on top > of > +the mdev_device and connect it to an appropriate implementation of > vfio_device_ops. Overly long line. > +This will provide the 'mdev_supported_types/XX/create' files which can then > be used > +to trigger

Re: [Intel-gfx] [PATCH 08/12] vfio/gvt: Convert to use vfio_register_group_dev()

2021-04-26 Thread Christoph Hellwig
> diff --git a/drivers/vfio/mdev/Makefile b/drivers/vfio/mdev/Makefile > index ff9ecd80212503..7c236ba1b90eb1 100644 > --- a/drivers/vfio/mdev/Makefile > +++ b/drivers/vfio/mdev/Makefile > @@ -1,5 +1,5 @@ > # SPDX-License-Identifier: GPL-2.0-only > > -mdev-y := mdev_core.o mdev_sysfs.o

Re: [Intel-gfx] [PATCH] display: Fix typo issue

2021-04-26 Thread Jani Nikula
On Wed, 17 Mar 2021, zuoqil...@163.com wrote: > From: zuoqilin > > Change 'befor' to 'before'. > > Signed-off-by: zuoqilin Thanks, pushed, sorry for the delay. BR, Jani. > --- > drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

2021-04-26 Thread Patchwork
== Series Details == Series: drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2. URL : https://patchwork.freedesktop.org/series/89485/ State : warning == Summary == $ dim checkpatch origin/drm-tip e50e1e4b326a drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89484/ State : success == Summary == CI Bug Log - changes from CI_DRM_10008 -> Patchwork_19988

Re: [Intel-gfx] [drm-intel:drm-intel-next 3/4] drivers/gpu/drm/i915/display/intel_dp_hdcp.c:582 intel_dp_hdcp2_read_msg() error: uninitialized symbol 'msg_end'.

2021-04-26 Thread Jani Nikula
On Fri, 02 Apr 2021, Dan Carpenter wrote: > tree: git://anongit.freedesktop.org/drm-intel drm-intel-next > head: b29854ec3b9ca6512a783e2153465f27a777a654 > commit: 989cf9a93892409cf8e84c30c0faaa522ac83807 [3/4] drm/i915/hdcp: Add DP > HDCP2.2 timeout to read entire msg > config:

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89484/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/7] drm/i915/dg1: Fix mapping type for default state object URL : https://patchwork.freedesktop.org/series/89484/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5964f7549f43 drm/i915/dg1: Fix mapping type for default state

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI URL : https://patchwork.freedesktop.org/series/89481/ State : success == Summary == CI Bug Log - changes from CI_DRM_10007 -> Patchwork_19987 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI URL : https://patchwork.freedesktop.org/series/89481/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/9] drm/doc/rfc: i915 DG1 uAPI URL : https://patchwork.freedesktop.org/series/89481/ State : warning == Summary == $ dim checkpatch origin/drm-tip ee8a4a1f34c3 drm/doc/rfc: i915 DG1 uAPI -:54: WARNING:FILE_PATH_CHANGES: added, moved or

[Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915/gvt: Move mdev attribute groups into kvmgt module

2021-04-26 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/gvt: Move mdev attribute groups into kvmgt module URL : https://patchwork.freedesktop.org/series/89478/ State : failure == Summary == Applying: drm/i915/gvt: Move mdev attribute groups into kvmgt module error: sha1 information

Re: [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy

2021-04-26 Thread Jani Nikula
On Fri, 23 Apr 2021, Lionel Landwerlin wrote: > On 21/04/2021 20:28, Umesh Nerlige Ramappa wrote: >> +static int >> +query_cs_cycles(struct drm_i915_private *i915, >> +struct drm_i915_query_item *query_item) >> +{ >> +struct drm_i915_query_cs_cycles __user *query_ptr; >> +

Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Jani Nikula
On Mon, 26 Apr 2021, Kai-Heng Feng wrote: > On Fri, Apr 23, 2021 at 3:35 PM Jani Nikula > wrote: >> >> On Fri, 23 Apr 2021, Kai-Heng Feng wrote: >> > On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX >> > to discrete GFX after S3. This is not desirable, because userspace

Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Kai-Heng Feng
On Fri, Apr 23, 2021 at 8:41 PM Ville Syrjälä wrote: > > On Fri, Apr 23, 2021 at 12:46:54PM +0800, Kai-Heng Feng wrote: > > On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX > > to discrete GFX after S3. This is not desirable, because userspace will > > treat connected

Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

2021-04-26 Thread Kai-Heng Feng
On Fri, Apr 23, 2021 at 3:35 PM Jani Nikula wrote: > > On Fri, 23 Apr 2021, Kai-Heng Feng wrote: > > On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX > > to discrete GFX after S3. This is not desirable, because userspace will > > treat connected display as a new one,

[Intel-gfx] [PATCH] Implement PSF GV point support

2021-04-26 Thread Stanislav Lisovskiy
PSF GV points are an additional factor that can limit the bandwidth available to display, separate from the traditional QGV points. Whereas traditional QGV points represent possible memory clock frequencies, PSF GV points reflect possible frequencies of the memory fabric. Switching between PSF

[Intel-gfx] [PATCH] drm/i915: Use trylock in shrinker for ggtt on bsw vt-d and bxt, v2.

2021-04-26 Thread Maarten Lankhorst
The stop_machine() lock may allocate memory, but is called inside vm->mutex, which is taken in the shrinker. This will cause a lockdep splat, as can be seen below: <4>[ 462.585762] == <4>[ 462.585768] WARNING: possible circular locking

[Intel-gfx] [PATCH 6/7] drm/i915/lmem: Bypass aperture when lmem is available

2021-04-26 Thread Matthew Auld
From: Anusha Srivatsa In the scenario where local memory is available, we have rely on CPU access via lmem directly instead of aperture. v2: gmch is only relevant for much older hw, therefore we can drop the has_aperture check since it should always be present on such platforms. (Chris) Cc:

[Intel-gfx] [PATCH 7/7] drm/i915: Return error value when bo not in LMEM for discrete

2021-04-26 Thread Matthew Auld
From: Mohammed Khajapasha Return EREMOTE value when frame buffer object is not backed by LMEM for discrete. If Local memory is supported by hardware the framebuffer backing gem objects should be from local memory. Signed-off-by: Mohammed Khajapasha Signed-off-by: Matthew Auld Reviewed-by:

[Intel-gfx] [PATCH 5/7] drm/i915/fbdev: Use lmem physical addresses for fb_mmap() on discrete

2021-04-26 Thread Matthew Auld
From: Mohammed Khajapasha Use local memory io BAR address for fbdev's fb_mmap() operation on discrete, fbdev uses the physical address of our framebuffer for its fb_mmap() fn. Signed-off-by: Mohammed Khajapasha Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld ---

[Intel-gfx] [PATCH 4/7] drm/i915/gtt/dgfx: place the PD in LMEM

2021-04-26 Thread Matthew Auld
It's a requirement that for dgfx we place all the paging structures in device local-memory. v2: use i915_coherent_map_type() Signed-off-by: Matthew Auld Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 5 - drivers/gpu/drm/i915/gt/intel_gtt.c | 21 +++--

[Intel-gfx] [PATCH 3/7] drm/i915/gtt: map the PD up front

2021-04-26 Thread Matthew Auld
We need to general our accessor for the page directories and tables from using the simple kmap_atomic to support local memory, and this setup must be done on acquisition of the backing storage prior to entering fence execution contexts. Here we replace the kmap with the object maping code that for

[Intel-gfx] [PATCH 1/7] drm/i915/dg1: Fix mapping type for default state object

2021-04-26 Thread Matthew Auld
From: Venkata Ramana Nayana Use I915_MAP_WC when default state object is allocated in LMEM. Signed-off-by: Venkata Ramana Nayana Reviewed-by: Matthew Auld Signed-off-by: Matthew Auld --- drivers/gpu/drm/i915/gt/shmem_utils.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff

[Intel-gfx] [PATCH 2/7] drm/i915: Update the helper to set correct mapping

2021-04-26 Thread Matthew Auld
From: Venkata Sandeep Dhanalakota Determine the possible coherent map type based on object location, and if target has llc or if user requires an always coherent mapping. Cc: Matthew Auld Cc: CQ Tang Suggested-by: Michal Wajdeczko Signed-off-by: Venkata Sandeep Dhanalakota Signed-off-by:

Re: [Intel-gfx] [v3 2/2] backlight: Add DisplayPort aux backlight driver

2021-04-26 Thread Jani Nikula
On Mon, 26 Apr 2021, Rajeev Nandan wrote: > Add backlight driver for the panels supporting backlight control > using DPCD registers on the DisplayPort aux channel. No, please don't do this. I wrote you last week in reply to v1 why I thought merging this would not be a good idea [1]. Why have

[Intel-gfx] [PATCH 9/9] drm/i915/gem: hide new uAPI behind CONFIG_BROKEN

2021-04-26 Thread Matthew Auld
Treat it the same as the fake local-memory stuff, where it is disabled for normal kernels, in case some random UMD is tempted to use this. Once we have all the other bits and pieces in place, like the TTM conversion, we can turn this on for real. Signed-off-by: Matthew Auld Cc: Joonas Lahtinen

[Intel-gfx] [PATCH 8/9] drm/i915/gem: clear userspace buffers for LMEM

2021-04-26 Thread Matthew Auld
All userspace objects must be cleared when allocating the backing store, before they are potentially visible to userspace. For now use simple CPU based clearing to do this for device local-memory objects, note that in the near future this will instead use the blitter engine. Signed-off-by:

[Intel-gfx] [PATCH 7/9] drm/i915/lmem: support optional CPU clearing for special internal use

2021-04-26 Thread Matthew Auld
For some internal device local-memory objects it would be useful to have an option to CPU clear the pages upon gathering the backing store. Note that this might be before the blitter is useable, which is the case for some internal GuC objects. Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc:

[Intel-gfx] [PATCH 3/9] drm/i915/query: Expose memory regions through the query uAPI

2021-04-26 Thread Matthew Auld
From: Abdiel Janulgue Returns the available memory region areas supported by the HW. v2(Daniel & Jason): - Add some kernel-doc, including example usage. - Drop all the extra rsvd Signed-off-by: Abdiel Janulgue Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Thomas Hellström Cc:

[Intel-gfx] [PATCH 2/9] drm/i915: mark stolen as private

2021-04-26 Thread Matthew Auld
In the next patch we want to expose the supported regions to userspace, which can then be fed into the gem_create_ext placement extensions. For now treat stolen memory as private from userspace pov. Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Thomas Hellström Cc: Daniele Ceraolo Spurio

[Intel-gfx] [PATCH 4/9] drm/i915: rework gem_create flow for upcoming extensions

2021-04-26 Thread Matthew Auld
With the upcoming gem_create_ext we want to be able create a "vanilla" object upfront and pass that directly to the extensions, before actually initialising the object. Functionally this should be the same expect we now feed the object into the lower-level region specific init_object.

[Intel-gfx] [PATCH 6/9] drm/i915/uapi: implement object placement extension

2021-04-26 Thread Matthew Auld
Add new extension to support setting an immutable-priority-list of potential placements, at creation time. If we use the normal gem_create or gem_create_ext without the extensions/placements then we still get the old behaviour with only placing the object in system memory. v2(Daniel & Jason):

[Intel-gfx] [PATCH 5/9] drm/i915/uapi: introduce drm_i915_gem_create_ext

2021-04-26 Thread Matthew Auld
Same old gem_create but with now with extensions support. This is needed to support various upcoming usecases. v2:(Chris) - Use separate ioctl number for gem_create_ext, instead of hijacking the existing gem_create ioctl, otherwise we run into the issue with being unable to detect

[Intel-gfx] [PATCH 1/9] drm/doc/rfc: i915 DG1 uAPI

2021-04-26 Thread Matthew Auld
Add an entry for the new uAPI needed for DG1. Also add the overall upstream plan, including some notes for the TTM conversion. v2(Daniel): - include the overall upstreaming plan - add a note for mmap, there are differences here for TTM vs i915 - bunch of other suggestions from Daniel v3:

[Intel-gfx] [PATCH 1/2] drm/i915/gvt: Move mdev attribute groups into kvmgt module

2021-04-26 Thread Zhenyu Wang
As kvmgt module contains all handling for VFIO/mdev, leaving mdev attribute groups in gvt module caused dependency issue. Although it was there for possible other hypervisor usage, that turns out never to be true. So this moves all mdev handling into kvmgt module completely to resolve dependency

[Intel-gfx] [PATCH 2/2] Revert "vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV"

2021-04-26 Thread Zhenyu Wang
This reverts commit 07e543f4f9d116d6b4240644191dee6388ef4a85. With all mdev handing moved to kvmgt module, only kvmgt should depend on VFIO_MDEV. So revert this one. Cc: Arnd Bergmann Cc: Jason Gunthorpe Cc: Alex Williamson Signed-off-by: Zhenyu Wang --- drivers/gpu/drm/i915/Kconfig | 1 -

Re: [Intel-gfx] [PATCH 11/19] drm/i915: Update the helper to set correct mapping

2021-04-26 Thread Tvrtko Ursulin
On 26/04/2021 09:57, Matthew Auld wrote: On Wed, 21 Apr 2021 at 20:13, Matthew Auld wrote: On Wed, 21 Apr 2021 at 16:41, Tvrtko Ursulin wrote: On 21/04/2021 12:42, Matthew Auld wrote: On 19/04/2021 16:01, Tvrtko Ursulin wrote: On 19/04/2021 15:37, Matthew Auld wrote: On 19/04/2021

[Intel-gfx] [PATCH 01/12] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE

2021-04-26 Thread Jason Gunthorpe
For some reason the vfio_mdev shim mdev_driver has its own module and kconfig. As the next patch requires access to it from mdev.ko merge the two modules together and remove VFIO_MDEV_DEVICE. A later patch deletes this driver entirely. This also fixes a misuse of kconfig in the samples which

[Intel-gfx] [PATCH 00/12] Remove vfio_mdev.c, mdev_parent_ops and more

2021-04-26 Thread Jason Gunthorpe
Prologue This is series #3 in part of a larger work that arose from the minor remark that the mdev_parent_ops indirection shim is useless and complicates things. It applies on top of Alex's current tree and requires the prior two series. This series achieves the removal of vfio_mdev.c.

Re: [Intel-gfx] [PATCH v5 14/16] dma-direct: Allocate memory from restricted DMA pool if available

2021-04-26 Thread Robin Murphy
On 2021-04-22 09:15, Claire Chang wrote: The restricted DMA pool is preferred if available. The restricted DMA pools provide a basic level of protection against the DMA overwriting buffer contents at unexpected times. However, to protect against general data leakage and system memory

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