On Thu, Nov 4, 2021 at 8:05 PM Sean Paul wrote:
>
> From: Sean Paul
>
> This patch adds the register ranges required for HDCP key injection and
> HDCP TrustZone interaction as described in the dt-bindings for the
> sc7180 dp controller. Now that these are supported, change the
> compatible
From: Madhumitha Tolakanahalli Pradeep
Changes since v2.12:
- Release notes for v2.13:
1. Fix for simple flip queue with DC6v
- Release notes for v2.14:
1. Fix for flip queue roll over cases with DC6v
2. Enhancement for residency
3. Workaround for 3Dlut restore issue
On Wed, Dec 08, 2021 at 09:42:15AM +0530, Mullati Siva wrote:
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit this function
remap_io_mapping() in discrete, So skip this code for non-x86
architectures.
v2: use IS_ENABLED
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev5)
URL : https://patchwork.freedesktop.org/series/97514/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10975 -> Patchwork_21793
Summary
---
== Series Details ==
Series: drm/i915: Remove zombie async flip vt-d w/a
URL : https://patchwork.freedesktop.org/series/97729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973_full -> Patchwork_21789_full
Summary
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev5)
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: Assorted fixes/tweaks to GuC support (rev5)
URL : https://patchwork.freedesktop.org/series/97514/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c3fc4bbf3adb drm/i915/uc: Allow platforms to have GuC but not HuC
-:38: ERROR:COMPLEX_MACRO: Macros with
== Series Details ==
Series: drm/i915: Basic enabling of 64k page support (rev2)
URL : https://patchwork.freedesktop.org/series/97725/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10975 -> Patchwork_21792
Summary
---
On 12/2/21 10:35 PM, Anusha Srivatsa wrote:
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index 391a4e2b8604..fd2d3ab38ebb 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -554,6 +554,7 @@ static const struct pci_device_id
On Thu, Nov 4, 2021 at 8:04 PM Sean Paul wrote:
>
> From: Sean Paul
>
> Just me with another revision of HDCP support for msm.
>
> This v4 patch series is mostly a retread of v3 with the following
> changes:
> - rebased on Bjorn's displayport-controller register refactor
> - another change to
== Series Details ==
Series: drm/i915: Basic enabling of 64k page support (rev2)
URL : https://patchwork.freedesktop.org/series/97725/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Sanity Check for device memory region (rev3)
URL : https://patchwork.freedesktop.org/series/97715/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10975 -> Patchwork_21791
Summary
== Series Details ==
Series: drm/i915: Sanity Check for device memory region (rev3)
URL : https://patchwork.freedesktop.org/series/97715/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Sanity Check for device memory region (rev3)
URL : https://patchwork.freedesktop.org/series/97715/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d2fc59f489d3 drm/i915: Exclude reserved stolen from driver use
4e5c58d3e7b8 drm/i915:
== Series Details ==
Series: drm/i915/display: Remove the useless variable offset and its assignment
URL : https://patchwork.freedesktop.org/series/97724/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10973_full -> Patchwork_21787_full
== Series Details ==
Series: drm/i915: Fix coredump of perma-pinned vmas (rev2)
URL : https://patchwork.freedesktop.org/series/97709/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10975 -> Patchwork_21790
Summary
---
== Series Details ==
Series: drm/i915/display: Delete redundant post_mask assignment
URL : https://patchwork.freedesktop.org/series/97723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973_full -> Patchwork_21786_full
== Series Details ==
Series: drm/i915/pmu: Fix wakeref leak in PMU busyness during reset (rev3)
URL : https://patchwork.freedesktop.org/series/97635/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10970_full -> Patchwork_21776_full
live_engine_busy_stats waits for busyness to start ticking before
sampling busyness for the test sample duration. The wait accesses an
MMIO register and the uncore call to read it takes up to 3 ms in the
worst case. This can result in the wait timing out since the MMIO read
itself consumes up the
On Tue, Dec 07, 2021 at 06:15:12PM -0800, Umesh Nerlige Ramappa wrote:
> live_engine_busy_stats waits for busyness to start ticking before
> sampling busyness for the test sample duration. The wait accesses an
> MMIO register and the uncore call to read it takes up to 3 ms in the
> worst case.
I missed responding to this.
Thanks for the review Michal - will fix them on next rev.
...alan
On Tue, 2021-11-23 at 22:12 +0100, Michal Wajdeczko wrote:
>
> On 23.11.2021 00:03, Alan Previn wrote:
> > From: John Harrison
> ...
>
> > diff --git
After chatting offline with Matt, it became apparent that
i somehow missed the fact that the ctb processing handler
was already in a work queue. That said, Matt is correct, i
dont need to create a work queue to extract that capture
log into the interim-store. That would eliminate the race
== Series Details ==
Series: drm/i915: trace display split
URL : https://patchwork.freedesktop.org/series/97721/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10973_full -> Patchwork_21785_full
Summary
---
Ping :)
Can these updates be merged to linux-firmware?
Thanks,
Anusha
> -Original Message-
> From: Tolakanahalli Pradeep, Madhumitha
>
> Sent: Thursday, December 2, 2021 6:48 AM
> To: Hutchings, Ben ; intel-gfx@lists.freedesktop.org;
> k...@mcmartin.ca; jwbo...@kernel.org
> Cc:
On 07/12/2021 23:15, John Harrison wrote:
On 12/7/2021 09:53, Adrian Larumbe wrote:
Beginning with DG2, all successive devices will require GuC FW to be
present and loaded at probe() time. This change alters error handling in
the FW init and load functions so that the driver's probe()
== Series Details ==
Series: drm/i915/pmu: Fix wakeref leak in PMU busyness during reset (rev3)
URL : https://patchwork.freedesktop.org/series/97635/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10970_full -> Patchwork_21776_full
== Series Details ==
Series: drm/i915: Remove zombie async flip vt-d w/a
URL : https://patchwork.freedesktop.org/series/97729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21789
Summary
---
On Wed, 08 Dec 2021, Lucas De Marchi wrote:
> On Wed, Dec 08, 2021 at 01:05:17PM +0200, Jani Nikula wrote:
>>Add display/intel_display_trace.[ch] for defining display
>>tracepoints. The main goal is to reduce cross-includes between gem and
>>display. It would be possible split up tracing even
== Series Details ==
Series: drm/i915: Basic enabling of 64k page support
URL : https://patchwork.freedesktop.org/series/97725/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21788
Summary
---
Hi Matt and Ram,
On Wed, Dec 08, 2021 at 07:46:13PM +0530, Ramalingam C wrote:
> From: Matthew Auld
>
> If the device needs 64K minimum GTT pages for device local-memory,
> like on XEHPSDV, then we need to fail the allocation if we can't
> meet it, instead of falling back to 4K pages, otherwise
Hi Ram and Matt,
> On some platforms the hw has dropped support for 4K GTT pages when
> dealing with LMEM, and due to the design of 64K GTT pages in the hw, we
> can only mark the *entire* page-table as operating in 64K GTT mode,
> since the enable bit is still on the pde, and not the pte. And
On Tue, 07 Dec 2021, Umesh Nerlige Ramappa
wrote:
> live_engine_busy_stats waits for busyness to start ticking before
> sampling busyness for the test sample duration. The wait accesses an
> MMIO register and the uncore call to read it takes up to 3 ms in the
> worst case. This can result in the
Hi Ram,
On Wed, Dec 08, 2021 at 07:46:11PM +0530, Ramalingam C wrote:
> From: Matthew Auld
>
> LMEM should be allocated at 64K granularity, since 4K page support will
> eventually be dropped for LMEM when using the PPGTT.
>
> Signed-off-by: Matthew Auld
> Signed-off-by: Stuart Summers
>
Hi Ram,
Reviewed-by: Andi Shyti
but just two notes on the patchstyle, no need to resend:
1. would be nice to have [PATCH v2...] otherwise it's difficult
to see if I'm reading the correct version. (I don't see the
difficulty 'git format-patch -v 2...')
> Add a new platform flag,
On Mon, 06 Dec 2021, Madhumitha Tolakanahalli Pradeep
wrote:
> Increase the size of DMC on ADL-P to account for support of
> new features in the current/upcoming DMC versions.
>
> Signed-off-by: Madhumitha Tolakanahalli Pradeep
>
> ---
> drivers/gpu/drm/i915/display/intel_dmc.c | 4 +++-
> 1
On Wed, Dec 08, 2021 at 01:05:17PM +0200, Jani Nikula wrote:
Add display/intel_display_trace.[ch] for defining display
tracepoints. The main goal is to reduce cross-includes between gem and
display. It would be possible split up tracing even further, but that
would lead to more boilerplate.
We
From: Matthew Auld
Conditionally allocate LMEM with 64K granularity, since 4K page support
for LMEM will be dropped on some platforms when using the PPGTT.
v2:
updated commit msg [Thomas]
Signed-off-by: Matthew Auld
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Cc: Joonas
On 2021-12-08 at 17:23:26 +0200, Andi Shyti wrote:
> Hi Ram,
>
> > +static int intel_memory_region_memtest(struct intel_memory_region *mem,
> > + void *caller)
> > +{
> > + struct drm_i915_private *i915 = mem->i915;
> > + int err = 0;
> > +
> > + if
== Series Details ==
Series: drm/i915/display: Remove the useless variable offset and its assignment
URL : https://patchwork.freedesktop.org/series/97724/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21787
From: Chris Wilson
This extends the previous sanitychecking of device memory to read/write
all the memory on the device during the device probe, ala memtest86,
as an optional module parameter: i915.memtest=1. This is not expected to
be fast, but a reasonably thorough verfification that the
From: Chris Wilson
As we setup the memory regions for the device, give each a quick test to
verify that we can read and write to the full iomem range. This ensures
that our physical addressing for the device's memory is correct, and
some reassurance that the memory is functional.
v2: wrapper
From: Chris Wilson
Remove the portion of stolen memory reserved for private use from driver
access.
Signed-off-by: Chris Wilson
cc: Matthew Auld
Signed-off-by: Ramalingam C
Reviewed-by: Matthew Auld
Reviewed-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 3 +++
1 file
Changes for introducing the quick test on the device memory range and
also a test of detailed validation for each addr of the range with read
and write.
Detailed testing is optionally enabled with a modparam i915.memtest=1
And third patch fixes the driver accessible stolen memory.
v2: Adding a
== Series Details ==
Series: drm/i915: Basic enabling of 64k page support
URL : https://patchwork.freedesktop.org/series/97725/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Ram and Chris,
> param(char *, guc_firmware_path, NULL, 0400) \
> param(char *, huc_firmware_path, NULL, 0400) \
> param(char *, dmc_firmware_path, NULL, 0400) \
> + param(bool, memtest, false, 0400) \
this partially answers my previous question...
[...]
> - if
Hi Ram,
> +static int intel_memory_region_memtest(struct intel_memory_region *mem,
> +void *caller)
> +{
> + struct drm_i915_private *i915 = mem->i915;
> + int err = 0;
> +
> + if (!mem->io_start)
> + return 0;
> +
> + if
Hi Ram,
On Wed, Dec 08, 2021 at 08:27:58PM +0530, Ramalingam C wrote:
> From: Chris Wilson
>
> Remove the portion of stolen memory reserved for private use from driver
> access.
>
> Signed-off-by: Chris Wilson
> cc: Matthew Auld
> Signed-off-by: Ramalingam C
> Reviewed-by: Matthew Auld
On Wed, Dec 08, 2021 at 08:27:58PM +0530, Ramalingam C wrote:
> From: Chris Wilson
>
> Remove the portion of stolen memory reserved for private use from driver
> access.
>
> Signed-off-by: Chris Wilson
> cc: Matthew Auld
> Signed-off-by: Ramalingam C
> Reviewed-by: Matthew Auld
> ---
>
On 12/8/21 15:34, Matthew Auld wrote:
On Wed, 8 Dec 2021 at 14:16, Ramalingam C wrote:
From: Matthew Auld
LMEM should be allocated at 64K granularity, since 4K page support will
eventually be dropped for LMEM when using the PPGTT.
s/will eventually be dropped/has been dropped/ as per
From: Ville Syrjälä
This async flip vt-d w/a was moved to a different place in
commit 7d396cacaea6 ("drm/i195: Make the async flip VT-d workaround
dynamic") but the drm-intel-fixes cherry-pick commit b2d73debfdc1
("drm/i915: Extend the async flip VT-d w/a to skl/bxt") resurrected
the original
From: Chris Wilson
This extends the previous sanitychecking of device memory to read/write
all the memory on the device during the device probe, ala memtest86,
as an optional module parameter: i915.memtest=1. This is not expected to
be fast, but a reasonably thorough verfification that the
From: Chris Wilson
As we setup the memory regions for the device, give each a quick test to
verify that we can read and write to the full iomem range. This ensures
that our physical addressing for the device's memory is correct, and
some reassurance that the memory is functional.
v2: wrapper
From: Chris Wilson
Remove the portion of stolen memory reserved for private use from driver
access.
Signed-off-by: Chris Wilson
cc: Matthew Auld
Signed-off-by: Ramalingam C
Reviewed-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 3 +++
1 file changed, 3 insertions(+)
Changes for introducing the quick test on the device memory range and
also a test of detailed validation for each addr of the range with read
and write.
Detailed testing is optionally enabled with a modparam i915.memtest=1
And third patch fixes the driver accessible stolen memory.
v2: Adding a
== Series Details ==
Series: drm/i915/display: Remove the useless variable offset and its assignment
URL : https://patchwork.freedesktop.org/series/97724/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4c9a41e79dcc drm/i915/display: Remove the useless variable offset and its
== Series Details ==
Series: drm/i915/display: Delete redundant post_mask assignment
URL : https://patchwork.freedesktop.org/series/97723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21786
Summary
On Wed, 8 Dec 2021 at 14:16, Ramalingam C wrote:
>
> From: Matthew Auld
>
> LMEM should be allocated at 64K granularity, since 4K page support will
> eventually be dropped for LMEM when using the PPGTT.
s/will eventually be dropped/has been dropped/ as per Thomas' suggestion.
>
>
== Series Details ==
Series: drm/i915: trace display split
URL : https://patchwork.freedesktop.org/series/97721/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21785
Summary
---
**SUCCESS**
No
== Series Details ==
Series: drm/i915: Fix coredump of perma-pinned vmas
URL : https://patchwork.freedesktop.org/series/97709/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10971_full -> Patchwork_21783_full
Summary
From: Matthew Auld
If the device needs 64K minimum GTT pages for device local-memory,
like on XEHPSDV, then we need to fail the allocation if we can't
meet it, instead of falling back to 4K pages, otherwise we can't
safely support the insertion of device local-memory pages for
this vm, since the
From: Matthew Auld
On some platforms the hw has dropped support for 4K GTT pages when
dealing with LMEM, and due to the design of 64K GTT pages in the hw, we
can only mark the *entire* page-table as operating in 64K GTT mode,
since the enable bit is still on the pde, and not the pte. And since
From: Matthew Auld
LMEM should be allocated at 64K granularity, since 4K page support will
eventually be dropped for LMEM when using the PPGTT.
Signed-off-by: Matthew Auld
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Cc: Joonas Lahtinen
Cc: Rodrigo Vivi
Reviewed-by: Lucas De
From: Stuart Summers
Add a new platform flag, has_64k_pages, to mark the requirement of 64K
GTT page sizes or larger for device local memory access.
Also implies that we require or at least support the compact PT layout
for the ppGTT when using 64K GTT pages.
v2: More explanation for the flag
Preparational patches for 64k page support.
Matthew Auld (3):
drm/i915/xehpsdv: set min page-size to 64K
drm/i915/gtt/xehpsdv: move scratch page to system memory
drm/i915: enforce min page size for scratch
Stuart Summers (1):
drm/i915: Add has_64k_pages flag
From: luo penghao
The existence of offset is meaningless, so it should be deleted.
The clang_analyzer complains as follows:
Value stored to 'offset' is never read
Reported-by: Zeal Robot
Signed-off-by: luo penghao
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 8
1 file changed,
From: luo penghao
This value will be overwritten by the following if statement, even
if the if is not executed, the value will not be used
The clang_analyzer complains as follows:
Value stored to 'port_mask' is never read
Reported-by: Zeal Robot
Signed-off-by: luo penghao
---
== Series Details ==
Series: drm/i915: trace display split
URL : https://patchwork.freedesktop.org/series/97721/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: trace display split
URL : https://patchwork.freedesktop.org/series/97721/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
25fd3bfdc326 drm/i915/trace: clean up boilerplate organization
b994ae8af368 drm/i915/trace: split out display trace to
== Series Details ==
Series: drm/i915: Sanity Check for device memory region
URL : https://patchwork.freedesktop.org/series/97715/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_10973 -> Patchwork_21784
Summary
---
On 08-12-2021 13:07, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> wrote:
>> i915_gem_execbuf will call i915_gem_evict_vm() after failing to pin
>> all objects in the first round. We are about to remove those short-term
>> pins, but even without those the objects are
On 12/7/21 17:51, Ramalingam C wrote:
From: Matthew Auld
If the device needs 64K minimum GTT pages for device local-memory,
like on XEHPSDV, then we need to fail the allocation if we can't
meet it, instead of falling back to 4K pages, otherwise we can't
safely support the insertion of device
On 07-12-2021 12:01, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
> wrote:
>> Now that freeing objects takes the object lock when destroying the
>> backing pages, we can confidently take the object lock even for dead
>> objects.
> That looks to be a future patch, at least
On 12/7/21 17:51, Ramalingam C wrote:
From: Matthew Auld
On some platforms the hw has dropped support for 4K GTT pages when
dealing with LMEM, and due to the design of 64K GTT pages in the hw, we
can only mark the *entire* page-table as operating in 64K GTT mode,
since the enable bit is
On 12/8/21 13:59, Matthew Auld wrote:
On Wed, 8 Dec 2021 at 12:43, Thomas Hellström (Intel)
wrote:
Hi,
On 12/7/21 17:51, Ramalingam C wrote:
From: Stuart Summers
Add a new platform flag, has_64k_pages, for platforms supporting
base page sizes of 64k.
Signed-off-by: Stuart Summers
On 07-12-2021 11:44, Matthew Auld wrote:
> On Mon, 29 Nov 2021 at 13:57, Maarten Lankhorst
> wrote:
>> In the next commit, we don't evict when refcount = 0.
>>
>> igt_vm_isolation() continuously tries to pin/unpin at same address,
>> but also calls put() on the object, which means the object may
On Wed, 08 Dec 2021, Ville Syrjälä wrote:
> On Wed, Dec 08, 2021 at 07:46:19AM +, cgel@gmail.com wrote:
>> From: luo penghao
>>
>> This value will be overwritten by the following if statement, even
>> if the if is not executed, the value will not be used
>>
>> The clang_analyzer
== Series Details ==
Series: drm/i915: Sanity Check for device memory region
URL : https://patchwork.freedesktop.org/series/97715/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915: Sanity Check for device memory region
URL : https://patchwork.freedesktop.org/series/97715/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
a4fb1d110926 drm/i915: Sanitycheck device iomem on probe
-:70: WARNING:VSPRINTF_SPECIFIER_PX: Using
On Wed, Dec 08, 2021 at 07:46:19AM +, cgel@gmail.com wrote:
> From: luo penghao
>
> This value will be overwritten by the following if statement, even
> if the if is not executed, the value will not be used
>
> The clang_analyzer complains as follows:
>
> Value stored to 'port_mask' is
On Wed, 8 Dec 2021 at 12:43, Thomas Hellström (Intel)
wrote:
>
> Hi,
>
> On 12/7/21 17:51, Ramalingam C wrote:
> > From: Stuart Summers
> >
> > Add a new platform flag, has_64k_pages, for platforms supporting
> > base page sizes of 64k.
> >
> > Signed-off-by: Stuart Summers
> > Signed-off-by:
On 12/7/21 17:51, Ramalingam C wrote:
From: Matthew Auld
LMEM should be allocated at 64K granularity, since 4K page support will
eventually be dropped for LMEM when using the PPGTT.
Signed-off-by: Matthew Auld
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Cc: Joonas Lahtinen
== Series Details ==
Series: drm/i915: Skip remap_io_mapping() for non-x86 platforms (rev7)
URL : https://patchwork.freedesktop.org/series/96855/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10970_full -> Patchwork_21782_full
Hi,
On 12/7/21 17:51, Ramalingam C wrote:
From: Stuart Summers
Add a new platform flag, has_64k_pages, for platforms supporting
base page sizes of 64k.
Signed-off-by: Stuart Summers
Signed-off-by: Ramalingam C
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_drv.h | 2
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
wrote:
>
> i915_gem_execbuf will call i915_gem_evict_vm() after failing to pin
> all objects in the first round. We are about to remove those short-term
> pins, but even without those the objects are still locked. Add a special
> case to allow
On Wed, 8 Dec 2021 at 11:49, Matthew Auld
wrote:
>
> On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
> wrote:
> >
> > Now that we require locking to evict, multiple vmas from the same object
> > might not be evicted. This is expected and required, because execbuf will
> > move to short-term
On Mon, 29 Nov 2021 at 13:58, Maarten Lankhorst
wrote:
>
> Now that we require locking to evict, multiple vmas from the same object
> might not be evicted. This is expected and required, because execbuf will
> move to short-term pinning by using the lock only. This will cause these
> tests to
== Series Details ==
Series: drm/i915/pmu: Wait longer for busyness data to be available from GuC
URL : https://patchwork.freedesktop.org/series/97696/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10970_full -> Patchwork_21780_full
On 2021-12-08 at 11:12:07 +, Matthew Auld wrote:
> On 08/12/2021 10:20, Ramalingam C wrote:
> > From: Chris Wilson
> >
> > As we setup the memory regions for the device, give each a quick test to
> > verify that we can read and write to the full iomem range. This ensures
> > that our
On 08/12/2021 10:20, Ramalingam C wrote:
From: Chris Wilson
As we setup the memory regions for the device, give each a quick test to
verify that we can read and write to the full iomem range. This ensures
that our physical addressing for the device's memory is correct, and
some reassurance
Add display/intel_display_trace.[ch] for defining display
tracepoints. The main goal is to reduce cross-includes between gem and
display. It would be possible split up tracing even further, but that
would lead to more boilerplate.
We end up having to include intel_crtc.h in a few places because
Follow the style that seems to be prevalent in kernel for undef and
define of TRACE_SYSTEM, TRACE_INCLUDE_PATH, and TRACE_INCLUDE_FILE.
There should be no changes to tracepoints.
v2: Keep TRACE_INCLUDE_PATH relative to define_trace.h (Chris)
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
v3 of https://patchwork.freedesktop.org/series/97106/
Jani Nikula (2):
drm/i915/trace: clean up boilerplate organization
drm/i915/trace: split out display trace to a separate file
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/g4x_dp.c | 1 +
From: Chris Wilson
Remove the portion of stolen memory reserved for private use from driver
access.
Signed-off-by: Chris Wilson
cc: Matthew Auld
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Chris Wilson
As we setup the memory regions for the device, give each a quick test to
verify that we can read and write to the full iomem range. This ensures
that our physical addressing for the device's memory is correct, and
some reassurance that the memory is functional.
Signed-off-by:
From: Chris Wilson
This extends the previous sanitychecking of device memory to read/write
all the memory on the device during the device probe, ala memtest86,
as an optional module parameter: i915.memtest=1. This is not expected to
be fast, but a reasonably thorough verfification that the
Changes for introducing the quick test on the device memory range and
also a test of detailed validation for each addr of the range with read
and write.
Detailed testing is optionally enabled with a modparam i915.memtest=1
And third patch fixes the driver accessible stolen memory.
Chris Wilson
On Thu, 02 Dec 2021, Ville Syrjälä wrote:
> On Thu, Dec 02, 2021 at 04:44:56PM +0200, Jani Nikula wrote:
>> The mode set sequence for 128b/132b requires setting the div32 version
>> of MPLLB clock.
>>
>> Bspec: 53880, 54128
>
> Weird place for that information when all the other bits are listed
On Fri, 03 Dec 2021, "Souza, Jose" wrote:
> On Fri, 2021-12-03 at 15:13 +0200, Jani Nikula wrote:
>> Localize HOBL and low vswing VBT lookups to a couple of small helpers,
>> and get rid of a bunch of local variables.
>
> Reviewed-by: José Roberto de Souza
Thanks, pushed.
>
>>
>>
== Series Details ==
Series: drm/i915: Fix coredump of perma-pinned vmas
URL : https://patchwork.freedesktop.org/series/97709/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10971 -> Patchwork_21783
Summary
---
Hi, Jasmine,
On 12/3/21 22:49, Jasmine Newsome wrote:
To avoid confusion with deferencing possible null pointer bo->ttm,
replace pointer bo->ttm with local pointer ttm in i915_ttm_move
as ttm has checks for null before getting passed to __i915_ttm_move
It's OK to use the local variable ttm
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