== Series Details ==
Series: drm/i915/guc: Refactor CT access to use iosys_map (rev4)
URL : https://patchwork.freedesktop.org/series/101148/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11473 -> Patchwork_22823
Summary
On Thu, Apr 07, 2022 at 09:18:39AM -0700, Matt Roper wrote:
The intent of the version check in the mmap ioctl was to maintain
support for existing platforms (i.e., ADL/RPL and earlier), but drop
support on all future igpu platforms. As we've seen on the dgpu side,
the hardware teams are using a
== Series Details ==
Series: drm/i915/guc: Refactor CT access to use iosys_map (rev4)
URL : https://patchwork.freedesktop.org/series/101148/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess is that this comes from the pin_map() for the scratch page,
which does an
On Thu, Apr 07, 2022 at 05:45:32PM +0100, Matthew Auld wrote:
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess is that this comes from the pin_map() for the scratch page,
which does an
: add enum dma_resv_usage v4")
I have used the drm-misc tree from next-20220407 for today.
--
Cheers,
Stephen Rothwell
pgpFnCCmHSzOz.pgp
Description: OpenPGP digital signature
== Series Details ==
Series: series starting with [1/2] drm/i915: fix broken build
URL : https://patchwork.freedesktop.org/series/102354/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472_full -> Patchwork_22820_full
== Series Details ==
Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL : https://patchwork.freedesktop.org/series/102360/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22822
== Series Details ==
Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL : https://patchwork.freedesktop.org/series/102360/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/edid: low level EDID block read refactoring etc. (rev3)
URL : https://patchwork.freedesktop.org/series/102329/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22821
Summary
== Series Details ==
Series: series starting with [1/2] drm/dp: Export drm_dp_dpcd_access()
URL : https://patchwork.freedesktop.org/series/102360/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f5b222e754b5 drm/dp: Export drm_dp_dpcd_access()
d3f620ce16fb drm/i915/dp: Add
On Thu, Apr 07, 2022 at 10:23:34PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL
> URL : https://patchwork.freedesktop.org/series/102352/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
On Thu, Apr 7, 2022 at 3:59 PM Abhinav Kumar wrote:
>
> Hi Rob and Daniel
>
> On 4/7/2022 3:51 PM, Rob Clark wrote:
> > On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang
> > wrote:
> >>
> >>
> >>
> >> On 3/31/2022 8:20 AM, Daniel Vetter wrote:
> >>> The stuff never really worked, and leads to lots
Hi Rob and Daniel
On 4/7/2022 3:51 PM, Rob Clark wrote:
On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang wrote:
On 3/31/2022 8:20 AM, Daniel Vetter wrote:
The stuff never really worked, and leads to lots of fun because it
out-of-order frees atomic states. Which upsets KASAN, among other
== Series Details ==
Series: series starting with [1/2] drm/i915: fix broken build
URL : https://patchwork.freedesktop.org/series/102354/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22820
Summary
On Wed, Apr 6, 2022 at 6:27 PM Jessica Zhang wrote:
>
>
>
> On 3/31/2022 8:20 AM, Daniel Vetter wrote:
> > The stuff never really worked, and leads to lots of fun because it
> > out-of-order frees atomic states. Which upsets KASAN, among other
> > things.
> >
> > For async updates we now have a
== Series Details ==
Series: drm/i915: Sunset igpu legacy mmap support based on GRAPHICS_VER_FULL
URL : https://patchwork.freedesktop.org/series/102352/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22819
On Thu, 2022-04-07 at 21:01 +, Patchwork wrote:
Patch Details
Series: drm/i915/display: Fix warnings about PSR lock not held (rev3)
URL:https://patchwork.freedesktop.org/series/102298/
State: failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22818/index.html
CI
== Series Details ==
Series: drm/i915/display: Fix warnings about PSR lock not held (rev3)
URL : https://patchwork.freedesktop.org/series/102298/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22818
On 4/7/2022 08:49, Tvrtko Ursulin wrote:
On 03/06/2021 17:48, Matthew Brost wrote:
From: John Harrison
The meaning of 'default' for the enable_guc module parameter has been
updated to accurately reflect what is supported on current platforms.
So start using the defaults instead of forcing
The following changes since commit 681281e49fb6778831370e5d94e6e1d97f0752d6:
amdgpu: update PSP 13.0.8 firmware (2022-03-18 07:35:54 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-firmware guc_v70.1.1_dg2
for you to fetch changes up to
On Thu, 07 Apr 2022, Imre Deak wrote:
> The next patch needs a way to read a DPCD register without the preceding
> wake-up read in drm_dp_dpcd_read(). Export drm_dp_dpcd_access() to allow
> this.
I think I'd rather you added a special "probe" function for this
specific purpose. I think
== Series Details ==
Series: Inherit GPU scheduling priority from process nice
URL : https://patchwork.freedesktop.org/series/102348/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22817
Summary
---
The next patch needs a way to read a DPCD register without the preceding
wake-up read in drm_dp_dpcd_read(). Export drm_dp_dpcd_access() to allow
this.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Imre Deak
---
drivers/gpu/drm/dp/drm_dp.c| 19 +--
Some ADLP DP link configuration at least with multiple LTTPRs expects
the first DPCD access during the LTTPR/DPCD detection after hotplug to
be a read from the LTTPR range starting with
DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV. The side effect of
this read is to put each LTTPR into the
== Series Details ==
Series: drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)
URL : https://patchwork.freedesktop.org/series/102028/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11471_full -> Patchwork_22809_full
On Thu, 07 Apr 2022, Jani Nikula wrote:
> On Wed, 06 Apr 2022, Ville Syrjala wrote:
>> From: Ville Syrjälä
>>
>> Modern VBTs no longer contain the LFP data table pointers
>> block (41). We are expecting to have one in order to be able
>> to parse the LFP data block (42), so let's make one up.
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Dump the panel PNPID and name from the VBT.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 24 +++
> 1 file changed, 24 insertions(+)
>
> diff --git
== Series Details ==
Series: Inherit GPU scheduling priority from process nice (rev2)
URL : https://patchwork.freedesktop.org/series/102203/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22816
Summary
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make the PNPID decoding available for other users.
>
> Cc: dri-de...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> include/drm/drm_edid.h | 21 +
> 1 file changed,
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make sure our choice of downclock mode respects the VBT
> seameless DRRS min refresh rate limit.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_panel.c | 10 +++---
> 1 file changed, 7
Seems my first mail didn't come through so here's second time for this patch:
Reviewed-by: Juha-Pekka Heikkila
On Mon, Apr 4, 2022 at 4:39 PM Imre Deak wrote:
>
> From: Matt Roper
>
> The render/media engines on DG2 unify render compression and media
> compression into a single format for the
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Extract the seamless DRRS min refresh rate from the VBT.
>
> v2: Do a version check
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 9 -
>
On Wed, 06 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Apparently when the VBT panel_type==0xff we should trawl through
> the PNPID table and check for a match against the EDID. If a
> match is found the index gives us the panel_type.
>
> Tried to match the Windows behaviour here
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make the panel type code a bit more abstract along the
> lines of the source of the panel type. For the moment
> we have three classes: OpRegion, VBT, fallback.
> Well introduce another one shortly.
>
> We can now also print out
== Series Details ==
Series: drm/edid: low level EDID block read refactoring etc. (rev2)
URL : https://patchwork.freedesktop.org/series/102329/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22815
Summary
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Pull the code to determine the panel type into its own set of
> sane functions.
>
> v2: rebase
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 58
On Tue, Apr 05, 2022 at 07:29:22PM +0200, Daniel Vetter wrote:
> On Tue, 5 Apr 2022 at 18:45, Greg KH wrote:
> >
> > On Tue, Apr 05, 2022 at 06:12:59PM +0200, Daniel Vetter wrote:
> > > On Tue, Apr 05, 2022 at 03:33:17PM +0200, Greg KH wrote:
> > > > On Tue, Apr 05, 2022 at 03:24:40PM +0200,
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Parsing the panel specific data from VBT is currently happening
> too early. Split the whole thing into global vs. panel specific
> parts so that we can start doing the panel specific parsing at
> a later time.
Might want to
== Series Details ==
Series: series starting with [1/2] drm/i915/selftests: fixup min_alignment
usage (rev2)
URL : https://patchwork.freedesktop.org/series/102295/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22814
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We use the "driver features" block for two different kinds
> of data: global data, and per panel data. Split the function
> into two parts along that line so that we can start doing the
> parsing in two different locations.
>
>
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Just assume panel_type==0 always if the VBT gives us bogus data.
> We actually already do this everywhere else except in
> parse_panel_options() since we just leave i915->vbt.panel_type
> zeroed. This also seems to be what
On Wed, 06 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We need to start parsing stuff from the tail end of the LFP data block.
> This is made awkward by the fact that the fp_timing table has variable
> size. So we must use a bit more finesse to get the tail end, and to
> make sure
On 07/04/2022 17:49, Christian König wrote:
Am 07.04.22 um 18:45 schrieb Matthew Auld:
I guess this was missed in the conversion or something.
Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
My best guess is
|Reviewed-by: Nirmoy Das |
On 4/7/2022 1:06 PM, Matthew Auld wrote:
Ensure we check that the size is compatible with the requested
page_size. For tiny objects that are automatically annotated with
TTM_PL_FLAG_CONTIGUOUS(since they fit within a single page), we
currently end up silently
On Wed, 06 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Modern VBTs no longer contain the LFP data table pointers
> block (41). We are expecting to have one in order to be able
> to parse the LFP data block (42), so let's make one up.
>
> Since the fp_timing table has variable size
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms
URL : https://patchwork.freedesktop.org/series/102339/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22813
Summary
---
All of CI is just failing with the following, which prevents loading of
the module:
i915 :03:00.0: [drm] *ERROR* Scratch setup failed
Best guess is that this comes from the pin_map() for the scratch page,
which does an i915_gem_object_wait_moving_fence() somewhere. It looks
like this now
I guess this was missed in the conversion or something.
Fixes: 7bc80a5462c3 ("dma-buf: add enum dma_resv_usage v4")
Signed-off-by: Matthew Auld
Cc: Christian König
Cc: Daniel Vetter
---
drivers/gpu/drm/i915/i915_deps.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Reorder things so that we can parse the entier LFP data block
*entire
> in one go. For now we just stick to parsing the DTD from it.
>
> Also fix the misleading comment about block 42 being deprecated.
> Only the DTD part is
The intent of the version check in the mmap ioctl was to maintain
support for existing platforms (i.e., ADL/RPL and earlier), but drop
support on all future igpu platforms. As we've seen on the dgpu side,
the hardware teams are using a more fine-grained numbering system for IP
version numbers
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms
URL : https://patchwork.freedesktop.org/series/102339/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> In addition to the fp_timing,dvo_timing,panel_pnp_id tables
> there also exists a panel_name table. Unlike the others this
> is just one offset+table_size even though there are still 16
> actual panel_names in the data block.
>
== Series Details ==
Series: drm/i915/display: Fix warnings about PSR lock not held (rev2)
URL : https://patchwork.freedesktop.org/series/102298/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22812
== Series Details ==
Series: GSC support for XeHP SDV and DG2 platforms
URL : https://patchwork.freedesktop.org/series/102339/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
57df08911dad drm/i915/gsc: add gsc as a mei auxiliary device
-:65: WARNING:FILE_PATH_CHANGES: added,
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Now that we've sufficiently validated the LFP data pointers we
> can trust them.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 60 ++-
> 1
On Tue, 05 Apr 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make sure the LFP data table pointers sane. Sensible looking
> table entries, everything points correctly into the data block,
> etc.
>
> Signed-off-by: Ville Syrjälä
I can't adequately describe my opinion about the design of
== Series Details ==
Series: series starting with [1/2] drm/i915: consider min_page_size when
migrating
URL : https://patchwork.freedesktop.org/series/102333/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11472 -> Patchwork_22811
On 03/06/2021 17:48, Matthew Brost wrote:
From: John Harrison
The meaning of 'default' for the enable_guc module parameter has been
updated to accurately reflect what is supported on current platforms.
So start using the defaults instead of forcing everything off.
Although, note that right
From: Tvrtko Ursulin
Current processing landscape seems to be more and more composed of pipelines
where computations are done on multiple hardware devices. Furthermore some of
the non-CPU devices, like in this case many GPUs supported by the i915 driver,
actually support priority based
From: Tvrtko Ursulin
Inherit submitter nice at point of request submission to account for long
running processes getting either externally or self re-niced.
This accounts for the current processing landscape where computational
pipelines are composed of CPU and GPU parts working in tandem.
From: Tvrtko Ursulin
Inherit submitter nice at point of request submission to account for long
running processes getting either externally or self re-niced.
This accounts for the current processing landscape where computational
pipelines are composed of CPU and GPU parts working in tandem.
From: Tvrtko Ursulin
Current processing landscape seems to be more and more composed of pipelines
where computations are done on multiple hardware devices. Furthermore some of
the non-CPU devices, like in this case many GPUs supported by the i915 driver,
actually support priority based
Add some helpers to figure out the EDID extension block count, block
count, size, pointers to blocks.
Unfortunately, we'll need to cast away the const in a few places where
we actually need to access the data.
v2: fix s/j/i/ introduced in a rebase
Signed-off-by: Jani Nikula
---
On Thu, 07 Apr 2022, Zhi Wang wrote:
> diff --git a/drivers/gpu/drm/i915/intel_gvt.h
> b/drivers/gpu/drm/i915/intel_gvt.h
> index d7d3fb6186fd..7665d7cf0bdd 100644
> --- a/drivers/gpu/drm/i915/intel_gvt.h
> +++ b/drivers/gpu/drm/i915/intel_gvt.h
> @@ -26,7 +26,17 @@
>
> struct
> -Original Message-
> From: Deak, Imre
> Sent: Thursday, April 7, 2022 6:59 PM
> To: Gupta, Anshuman
> Cc: intel-gfx@lists.freedesktop.org; Kahola, Mika ;
> Heikkila, Juha-pekka ; C, Ramalingam
>
> Subject: Re: [PATCH 4/4] drm/i915/dg2: Add support for DG2 clear color
> compression
Dear Arunpravin,
Thank you for your patch.
Am 07.04.22 um 07:46 schrieb Arunpravin Paneer Selvam:
- Switch to drm buddy allocator
- Add resource cursor support for drm buddy
I though after the last long discussion, you would actually act on the
review comments. Daniel wrote a good summary,
On 2022-04-07 at 09:44:48 +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/rps: Centralize computation of freq caps (rev6)
> URL : https://patchwork.freedesktop.org/series/101606/
> State : success
Pushed to drm-intel-gt-next.
Thanks for patch and review.
Br,
Anshuman.
>
>
On 2022.04.07 03:19:43 -0400, Zhi Wang wrote:
> From: Zhi Wang
>
> To support the new mdev interfaces and the re-factor patches from
> Christoph, which moves the GVT-g code into a dedicated module, the GVT-g
> MMIO tracking table needs to be separated from GVT-g.
>
Looks fine to me. Thanks!
On Wed, 2022-04-06 at 14:05 -0700, José Roberto de Souza wrote:
> Commit 3b6f409547fb ("drm/i915/display/psr: Lock and unlock PSR
> around
> pipe updates") did not took into account async flips with PSR1 and
> PSR2 HW tracking, causing PSR lock not be held and causing warnings
> when
== Series Details ==
Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL : https://patchwork.freedesktop.org/series/102322/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11471 -> Patchwork_22810
== Series Details ==
Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL : https://patchwork.freedesktop.org/series/102322/
State : warning
== Summary ==
CALLscripts/checksyscalls.sh
CALLscripts/atomic/check-atomics.sh
CHK
Reviewed-by: Juha-Pekka Heikkila
On 4.4.2022 16.38, Imre Deak wrote:
From: Mika Kahola
DG2 clear color render compression uses Tile4 layout. Therefore, we need
to define a new format modifier for uAPI to support clear color rendering.
v2:
Display version is fixed. [Imre]
KDoc is
Reviewed-by: Juha-Pekka Heikkila
On 4.4.2022 16.38, Imre Deak wrote:
From: Matt Roper
Add support for DG2 render and media compression, for the description of
buffer layouts see the previous patch adding the corresponding
frame buffer modifiers.
v2:
Display version fix [Imre]
v3:
On Thu, Apr 07, 2022 at 08:47:13AM +0300, Gupta, Anshuman wrote:
> > -Original Message-
> > From: Deak, Imre
> > Sent: Monday, April 4, 2022 7:09 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Gupta, Anshuman ; Kahola, Mika
> > ; Heikkila, Juha-pekka > pekka.heikk...@intel.com>; C,
> -Original Message-
> From: Dixit, Ashutosh
> Sent: Thursday, April 7, 2022 12:49 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Gupta, Anshuman
> Subject: [PATCH] drm/i915/rps: Centralize computation of freq caps
>
> Freq caps (i.e. RP0, RP1 and RPn frequencies) are read from HW.
On 4/7/22 15:13, Christian König wrote:
> Am 07.04.22 um 15:08 schrieb Javier Martinez Canillas:
>> Hello Christian,
>>
>> On 4/7/22 10:59, Christian König wrote:
>>> Instead of distingting between shared and exclusive fences specify
>>> the fence usage while adding fences.
>>>
>>> Rework all
On 06/04/2022 12:10, Gupta, Anshuman wrote:
-Original Message-
From: Tvrtko Ursulin
Sent: Wednesday, April 6, 2022 4:23 PM
To: Gupta, Anshuman ; intel-
g...@lists.freedesktop.org
Subject: Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pmu: Drop redundant
IS_VALLEYVIEW check in
Hello Christian,
On 4/7/22 10:59, Christian König wrote:
> Instead of distingting between shared and exclusive fences specify
> the fence usage while adding fences.
>
> Rework all drivers to use this interface instead and deprecate the old one.
>
This patch broke compilation for the vc4 DRM
== Series Details ==
Series: drm/i915: Fix FIFO underruns caused by missing cumulative bpp W/A (rev2)
URL : https://patchwork.freedesktop.org/series/102322/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
c1adc525a765 drm/i915: Fix FIFO underruns caused by missing cumulative bpp
== Series Details ==
Series: drm/atomic-helpers: remove legacy_cursor_update hacks (rev2)
URL : https://patchwork.freedesktop.org/series/102028/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11471 -> Patchwork_22809
From: Tomas Winkler
CC: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/debugfs.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/misc/mei/debugfs.c b/drivers/misc/mei/debugfs.c
index 1ce61e9e24fc..4074fec866a6 100644
---
From: Tomas Winkler
GSC requires more operational memory than available on chip.
Reserve 4M of LMEM for GSC operation. The memory is provided to the
GSC as struct resource to the auxiliary data of the child device.
Signed-off-by: Tomas Winkler
Signed-off-by: Daniele Ceraolo Spurio
Cc: Alan
From: Vitaly Lubart
Exported common mkhi definitions from bus-fixup.c into a separate
header file mkhi.h for other driver usage.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 32 ++---
drivers/misc/mei/mkhi.h | 45
From: Vitaly Lubart
Added transition to PXP mode in resume flow.
CC: Daniele Ceraolo Spurio
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/gsc-me.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/misc/mei/gsc-me.c
From: Tomas Winkler
DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_reg.h
From: Tomas Winkler
1. Retrieve extended operational memory physical pointers from the
auxiliary device info.
2. Setup memory registers.
3. Notify firmware that the memory is ready by sending the memory
ready command.
4. Disable PXP device if GSC is not in PXP mode.
CC: Daniele Ceraolo
From: Tomas Winkler
Add GSC memory ready command.
The command indicates to the firmware that
extend operation memory was setup and
the firmware may enter PXP mode.
CC: Daniele Ceraolo Spurio
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/mkhi.h | 14 +-
1 file changed, 13
Parametrize operational timeouts in order
to support slow firmware on some graphic devices.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/bus-fixup.c | 3 +--
drivers/misc/mei/client.c| 14 +++---
drivers/misc/mei/gsc-me.c| 2 +-
Wait for reset work to complete before initiating
stop reset flow sequence.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
drivers/misc/mei/init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index
From: Tomas Winkler
A work-around for a HW issue in XEHPSDV that manifests itself when SW reads
a gsc register when gsc is sending an interrupt. The work-around is
to disable interrupts and to use polling instead.
Cc: James Ausmus
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
---
Define GSC on XeHP SDV (Intel(R) dGPU without display)
XeHP SDV uses the same hardware settings as DG1, but uses polling
instead of interrupts and runs the firmware in slow pace due to
hardware limitations.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander
Add slow_fw flag to the gsc device definition
and pass it to mei auxiliary device.
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index
Add slow_fw flag to the mei auxiliary device info
to inform the mei driver about slow underlying firmware.
Such firmware will require to use larger operation timeouts.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
---
include/linux/mei_aux.h | 1 +
1 file changed, 1
From: Vitaly Lubart
If we use polling instead of interrupts,
irq initialization should be skipped.
Signed-off-by: Vitaly Lubart
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
---
drivers/gpu/drm/i915/gt/intel_gsc.c | 10 +++---
1 file changed, 7 insertions(+), 3
From: Daniele Ceraolo Spurio
After the new config option is merged we'll enable it by default in the
CI config, but for now just force it on via the i915 Kconfig so we can
get pre-merge CI results for it.
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i915/Kconfig.debug | 1 +
1
Add a hook to retrieve the firmware version of the
GSC devices to bus-fixup.
GSC has a different MKHI clients GUIDs but the same message structure
to retrieve the firmware version as MEI so mei_fwver() can be reused.
CC: Ashutosh Dixit
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas
From: Tomas Winkler
Implement runtime handlers for mei-gsc, to track
idle state of the device properly.
CC: Rodrigo Vivi
Signed-off-by: Tomas Winkler
Signed-off-by: Alexander Usyskin
Reviewed-by: Rodrigo Vivi
---
drivers/misc/mei/gsc-me.c | 67 ++-
1
Setup char device in spite of firmware handshake failure.
In order to provide host access to the firmware status registers and other
information required for the manufacturing process.
Signed-off-by: Alexander Usyskin
Signed-off-by: Tomas Winkler
Reviewed-by: Daniele Ceraolo Spurio
---
From: Tomas Winkler
GSC is a graphics system controller, based on CSE, it provides
a chassis controller for graphics discrete cards, as well as it
supports media protection on selected devices.
mei_gsc binds to a auxiliary devices exposed by Intel discrete
driver i915.
Signed-off-by: Alexander
1 - 100 of 170 matches
Mail list logo
