Hi,
On Thursday, 9 February 2023 12:50:38 CET Janusz Krzysztofik wrote:
> Users reported oopses on list corruptions when using i915 perf with a
> number of concurrently running graphics applications. That indicates we
> are currently missing some important tests for such scenarios. Cover
> that
Gentle Reminder !
> From: Kandpal, Suraj
> Sent: Thursday, February 2, 2023 11:50 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K ; Kandpal, Suraj
> ; Jani Nikula ;
> Sharma, Swati2
> Subject: [PATCH v2] drm/i915/dp: Increase slice_height for DP
>
> According VDSC spec 1.2a
== Series Details ==
Series: drm/i915/uapi/huc: two levels of HuC authentication
URL : https://patchwork.freedesktop.org/series/113864/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12723 -> Patchwork_113864v1
Summary
== Series Details ==
Series: drm/i915/uapi/huc: two levels of HuC authentication
URL : https://patchwork.freedesktop.org/series/113864/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev4)
URL : https://patchwork.freedesktop.org/series/112647/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12723 -> Patchwork_112647v4
Summary
---
== Series Details ==
Series: drm/i915/pxp: Add MTL PXP Support (rev4)
URL : https://patchwork.freedesktop.org/series/112647/
State : warning
== Summary ==
Error: dim checkpatch failed
572985c30a78 drm/i915/pxp: Add GSC-CS back-end resource init and cleanup
Traceback (most recent call last):
Starting on DG2, the owner of HuC authentication is the GSC FW. On MTL,
with the GSC moving into the media GT and being loaded by i915, this can
result in a significant delay in HuC readiness on init/resume. To reduce
the impact, the HuC load & authentication has been split in 2 parts:
1) The HuC
Enable PXP with MTL-GSC-CS: add the has_pxp into device info
and increase the timeouts for new GSC-CS + firmware specs.
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 2 +-
2 files changed, 2 insertions(+), 1
Despite KCR subsystem being in the media-tile (close to the
GSC-CS), the IRQ controls for it are on GT-0 with other global
IRQ controls. Thus, add a helper for KCR hw interrupt
enable/disable functions to get the correct gt structure (for
uncore) for MTL.
In the helper, we get GT-0's handle for
For MTL, the PXP back-end transport uses the GSC engine to submit
HECI packets through the HW to the GSC firmware for PXP arb
session management. This submission uses a non-priveleged
batch buffer, a buffer for the command packet and of course
a context targeting the GSC-CS.
Thus for MTL, we need
Add MTL hw-plumbing enabling for KCR operation under PXP
which includes:
1. Updating 'pick-gt' to get the media tile for
KCR interrupt handling
2. Adding MTL's KCR registers for PXP operation
(init, status-checking, etc.).
While doing #2, lets create a separate registers header file for
This series enables PXP on MTL. On ADL/TGL platforms, we rely on
the mei driver via the i915-mei PXP component interface to establish
a connection to the security firmware via the HECI device interface.
That interface is used to create and teardown the PXP ARB session.
PXP ARB session is created
Add helper functions into a new file for heci-packet-submission.
The helpers will handle generating the MTL GSC-CS Memory-Header
and submission of the Heci-Cmd-Packet instructions to the engine.
NOTE1: These common functions for heci-packet-submission will be used
by different i915 callers:
On legacy platforms, KCR HW enabling is done at the time the mei
component interface is bound. It's also disabled during unbind.
However, for MTL onwards, we don't depend on a tee component
to start sending GSC-CS firmware messages.
Thus, immediately enable (or disable) KCR HW on PXP's init,
fini
Add MTL's function for ARB session creation using PXP firmware
version 4.3 ABI structure format.
Also add MTL's function for ARB session invalidation but this
reuses PXP firmware version 4.2 ABI structure format.
Before checking the return status, look at the GSC-CS-Mem-Header's
pending-bit
Add GSC engine based method for sending PXP firmware packets
to the GSC firmware for MTL (and future) products.
Use the newly added helpers to populate the GSC-CS memory
header and send the message packet to the FW by dispatching
the GSC_HECI_CMD_PKT instruction on the GSC engine.
We use
== Series Details ==
Series: drm/i915/xehp: LNCF/LBCF workarounds should be on the GT list
URL : https://patchwork.freedesktop.org/series/113857/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12722 -> Patchwork_113857v1
On Fri, Feb 10, 2023 at 9:47 AM Stephen Rothwell wrote:
>
> Hi all,
>
> The following commit is also in the drm-fixes tree as a different commit
> (but the same patch):
>
> 94d8b6572a1f ("nvidiafb: detect the hardware support before removing
> console.")
>
> This is commit
>
> 04119ab1a49f
== Series Details ==
Series: drm/i915/xehp: LNCF/LBCF workarounds should be on the GT list
URL : https://patchwork.freedesktop.org/series/113857/
State : warning
== Summary ==
Error: dim checkpatch failed
c4134c967979 drm/i915/xehp: LNCF/LBCF workarounds should be on the GT list
-:10:
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
(rev2)
URL : https://patchwork.freedesktop.org/series/113808/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12718_full -> Patchwork_113808v2_full
Hi all,
The following commit is also in the drm-fixes tree as a different commit
(but the same patch):
94d8b6572a1f ("nvidiafb: detect the hardware support before removing
console.")
This is commit
04119ab1a49f ("nvidiafb: detect the hardware support before removing
console.")
in the
missed somethings on host-session-handle - for next rev.
On Wed, 2023-01-25 at 00:06 -0800, Teres Alexis, Alan Previn wrote:
> Add GSC engine based method for sending PXP firmware packets
> to the GSC firmware for MTL (and future) products.
>
> Use the newly added helpers to populate the GSC-CS
Although registers in the L3 bank/node configuration ranges are marked
as having "DEV" reset characteristics in the bspec, this appears to be a
hold-over from pre-Xe_HP platforms. In reality, these registers
maintain their values across engine resets, meaning that workarounds
and tuning settings
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
(rev3)
URL : https://patchwork.freedesktop.org/series/113808/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12722 -> Patchwork_113808v3
== Series Details ==
Series: series starting with [1/2] drm/i915: Populate wm.max_level for everyone
(rev3)
URL : https://patchwork.freedesktop.org/series/113808/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked
From: Ville Syrjälä
Replaces wm.max_level with wm.num_levels, since that generally
results in nicer looking code (for-loops can be in standard
form etc.).
Also get rid of the two different wrappers we have for this
(ilk_wm_max_level() and intel_wm_num_levels()). They don't
really do anything
On Thu, Feb 09, 2023 at 05:40:14PM +0200, Jani Nikula wrote:
> On Thu, 09 Feb 2023, Ville Syrjala wrote:
> > @@ -3229,7 +3216,7 @@ static void ilk_wm_merge(struct drm_i915_private
> > *dev_priv,
> > merged->fbc_wm_enabled = DISPLAY_VER(dev_priv) >= 6;
> >
> > /* merge each WM1+ level
On Tue, 2023-02-07 at 14:59 +0200, Imre Deak wrote:
> Hi all,
>
> On Mon, Feb 06, 2023 at 01:48:53PM +0200, Imre Deak wrote:
> > Add the MST topology for a CRTC to the atomic state if the driver
> > needs to force a modeset on the CRTC after the encoder compute config
> > functions are called.
>
On Wed, 2023-02-08 at 09:41 +0200, Imre Deak wrote:
> On Tue, Feb 07, 2023 at 07:21:48PM -0500, Lyude Paul wrote:
> > On Tue, 2023-02-07 at 14:11 +0200, Imre Deak wrote:
> >
> > And then disabled say, payload #1, that immediately after we get the ACT
> > that
> > the payload table in hardware
== Series Details ==
Series: drm: Add plane SIZE_HINTS property (rev2)
URL : https://patchwork.freedesktop.org/series/113758/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12716_full -> Patchwork_113758v2_full
Summary
== Series Details ==
Series: drm/i915/dg2: Drop one PCI ID
URL : https://patchwork.freedesktop.org/series/113802/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12716_full -> Patchwork_113802v1_full
Summary
---
On Fri, 3 Feb 2023 16:50:25 -0500
Matthew Rosato wrote:
> Hi Alex,
>
> Here is the latest group_lock vs kvm lock deadlock fix + a non-fix
> follow-on to remove the kvm argument from vfio_device_open and
> vfio_device_first_open.
>
> Changes from v3:
> * Remove device->group->kvm reference in
== Series Details ==
Series: drm/i915: add guard page to ggtt->error_capture (rev6)
URL : https://patchwork.freedesktop.org/series/113560/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12715_full -> Patchwork_113560v6_full
If any of *-without-i915 subtests fails or skips for any reason, it may
leave the i915 module unloaded while keeping our device list populated
with initially collected data. In a follow up igt_fixture section we then
try to reopen the device. If the test has been executed with a device
filter
On Wed, 08 Feb 2023, Ville Syrjälä wrote:
> On Wed, Feb 08, 2023 at 11:48:42AM +0200, Jani Nikula wrote:
>> Get rid of the if ladder in intel_modeset_setup_hw_state() and hide a
>> number of functions by adding a .get_hw_state() hook to watermark
>> functions. At least for now, combine the
On Wed, 08 Feb 2023, Ville Syrjälä wrote:
> On Wed, Feb 08, 2023 at 11:48:40AM +0200, Jani Nikula wrote:
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c
>> b/drivers/gpu/drm/i915/intel_pm.c
>> index ee8f8d2d2a66..649c4d222f79 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++
== Series Details ==
Series: Waitboost drm syncobj waits
URL : https://patchwork.freedesktop.org/series/113846/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12721 -> Patchwork_113846v1
Summary
---
**FAILURE**
== Series Details ==
Series: Waitboost drm syncobj waits
URL : https://patchwork.freedesktop.org/series/113846/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Hi Dave and Daniel,
Here goes our fixes for this week with a few patches targeting stable.
drm-intel-fixes-2023-02-09:
- Display watermark fix (Ville)
- fbdev fix for PSR, FBC, DRRS (Jouni)
- Move fd_install after last use of fence (Rob)
- Initialize the obj flags for shmem objects (Aravind)
-
From: Tvrtko Ursulin
Use the previously added dma-fence tracking of explicit waiters.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_syncobj.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index
From: Tvrtko Ursulin
Userspace waits coming via the drm_syncobj route have so far been
bypassing the waitboost mechanism.
Use the previously added dma-fence wait tracking API and apply the
same waitboosting logic which applies to other entry points.
This should fix the perfomance regressions
From: Tvrtko Ursulin
Track how many callers are explicity waiting on a fence to signal and
allow querying that via new dma_fence_wait_count() API.
This provides infrastructure on top of which generic "waitboost" concepts
can be implemented by individual drivers. Wait-boosting is any reactive
From: Tvrtko Ursulin
In i915 we have this concept of "wait boosting" where we give a priority boost
for instance to fences which are actively waited upon from userspace. This has
it's pros and cons and can certainly be discussed at lenght. However fact is
some workloads really like it.
Problem
On Thu, 09 Feb 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Switch ilk+ and skl+ platforms to also setting up
> wm.max_level and remove a bunch of if ladders as a result.
>
> There will be a tiny change in the debugfs on CHV machines
> that have DVFS disabled in the BIOS. Presviously
On Thu, 09 Feb 2023, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replaces wm.max_level with wm.num_levels, since that generally
> results in nicer looking code (for-loops can be in standard
> form etc.).
>
> Also get rid of the two different wrappers we have for this
> (ilk_wm_max_level() and
On Wed, Feb 08, 2023 at 11:10:16PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Add a new immutable plane property by which a plane can advertise
> a handful of recommended plane sizes. This would be mostly exposed
> by cursor planes as a slightly more capable replacement for
> the
On Thu, Feb 09, 2023 at 01:58:55PM +0200, Pekka Paalanen wrote:
> On Wed, 8 Feb 2023 23:10:16 +0200
> Ville Syrjala wrote:
>
> > From: Ville Syrjälä
> >
> > Add a new immutable plane property by which a plane can advertise
> > a handful of recommended plane sizes. This would be mostly exposed
Users reported oopses on list corruptions when using i915 perf with a
number of concurrently running graphics applications. That indicates we
are currently missing some important tests for such scenarios. Cover
that gap.
Since root cause analysis pointed out to an issue in barrier processing
Users reported oopses on list corruptions when using i915 perf with a
number of concurrently running graphics applications. That indicates we
are currently missing some important tests for such scenarios. Cover
that gap.
v2: drop open-race subtest for now, not capable of triggering the user
On Wed, 08 Feb 2023, Ville Syrjälä wrote:
> On Wed, Feb 08, 2023 at 10:23:55AM -0500, Rodrigo Vivi wrote:
>> On Tue, Feb 07, 2023 at 08:43:37AM +0200, Ville Syrjala wrote:
>> > From: Ville Syrjälä
>> >
>> > Use the second backlight controller on ICP+ if the VBT asks
>> > us to do so.
>> >
>> >
On Wed, Feb 08, 2023 at 08:15:23AM -0500, Rodrigo Vivi wrote:
> On Wed, Feb 08, 2023 at 11:45:50AM +0200, Stanislav Lisovskiy wrote:
> > From: Jigar Bhatt
> >
> > Display to communicate "display configuration" to Pcode for more accurate
> > power accounting for DG2. Existing sequence is only
On Wed, Feb 08, 2023 at 01:46:40PM +0200, Jani Nikula wrote:
> On Wed, 08 Feb 2023, Stanislav Lisovskiy
> wrote:
> > From: Jigar Bhatt
> >
> > Display to communicate "display configuration" to Pcode for more accurate
> > power accounting for DG2. Existing sequence is only sending the voltage
>
On Wed, 08 Feb 2023, Ville Syrjälä wrote:
> On Wed, Feb 08, 2023 at 11:48:39AM +0200, Jani Nikula wrote:
>> The memory frequency detection is a bit spread out here and
>> there. Consolidate to intel_dram.c.
>>
>> Cc: Ville Syrjälä
>> Signed-off-by: Jani Nikula
>> ---
>>
Hi Dave and Daniel,
here's the weekly PR for drm-misc-next-fixes.
Best regards
Thomas
drm-misc-next-fixes-2023-02-09:
Short summary of fixes pull:
Contains a number of fixes to vc4 and ivpu. The patches to the probe
helpers were cherry-picked from the regular development branch.
The following
== Series Details ==
Series: series starting with [1/4] drm/gem-vram: handle NULL bo->resource in
move callback
URL : https://patchwork.freedesktop.org/series/113788/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713_full -> Patchwork_113788v1_full
Hi Dave, Daniel,
Here's this week drm-misc-fixes PR
Maxime
drm-misc-fixes-2023-02-09:
A fix for a circular refcounting in drm/client, one for a memory leak in
amdgpu and a virtio fence fix when interrupted
The following changes since commit a3ee9e0b57f8ecca02d1c16fad4941e09bfe2941:
On 08/02/2023 12:31, Kamil Konieczny wrote:
Hi Tvrtko,
one small nit, see below.
On 2023-02-03 at 11:16:34 +, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
If output is redirected to a file, or a pipe, lets not repeat the headers
because that can usually mean user is trying to parse the
== Series Details ==
Series: mei: gsc proxy component
URL : https://patchwork.freedesktop.org/series/113786/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12713_full -> Patchwork_113786v1_full
Summary
---
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