[PATCH] drm/display/dp: Update the name of bit#4 of DPCD TEST_REQUEST

DP_TEST_LINK_FAUX_PATTERN is deprecated since DP1.3 Spec. Update to the latest definition in DP2.1 spec to reflect its true usage in the code. Cc: Jani Nikula Cc: Rob Clark Cc: Abhinav Kumar Cc: Sean Paul Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/msm/dp/dp_link.c | 2 +- include

[PATCH v4 3/3] drm/i915/dp: Fix passing the correct DPCD_REV for drm_dp_set_phy_test_pattern

Using link_status to get DPCD_REV fails when disabling/defaulting phy pattern. Use intel_dp->dpcd to access DPCD_REV correctly. Fixes: 8cdf72711928 ("drm/i915/dp: Program vswing, pre-emphasis, test-pattern") Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khale

[PATCH v4 2/3] drm/i915/dp: Add TPS4 PHY test pattern support

: 50482, 50484, 7557 Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 18 +- drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm

[PATCH v4 1/3] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names

for future series. v2: rebase Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v3 3/3] drm/i915/dp: Fix passing the correct DPCD_REV for drm_dp_set_phy_test_pattern

Using link_status to get DPCD_REV fails when disabling/defaulting phy pattern. Use intel_dp->dpcd to access DPCD_REV correctly. Fixes: 8cdf72711928 ("drm/i915/dp: Program vswing, pre-emphasis, test-pattern") Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khale

[Intel-gfx] [PATCH v3 2/3] drm/i915/dp: Add TPS4 PHY test pattern support

: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 17 - drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 20 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v3 1/3] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names

for future series. v2: rebase Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy Reviewed-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v2] drm/display/dp: Add the remaining Square PHY patterns DPCD register definitions

Transmitter Equalization Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h index 83d2039c018b..3731828825bd 100644

[Intel-gfx] [PATCH v2 2/2] drm/i915/dp: Add TPS4 PHY test pattern support

Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: rebase Bspec: 50482, 50484 Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 11 +++ drivers/gpu/drm/i915/i915_reg.h | 4

[Intel-gfx] [PATCH v2 1/2] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names

for future series. v2: rebase Cc: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned

of the phy lane reset sequence (Step#8) Bspec: 65451 Cc: Mika Kahola Cc: Gustavo Sousa Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu

[Intel-gfx] [PATCH] drm/display/dp: Add the remaining Square PHY patterns DPCD register definitions

DP Scope may send requests for all Square PHY pattern configuration during automation. Add them instead of failing these tests. Cc: Jani Nikula Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- include/drm/display/drm_dp.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/drm

[Intel-gfx] [PATCH 2/2] drm/i915/dp: Add TPS4 PHY test pattern support

Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. Bspec: 50482, 50484 CC: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 11 +++ drivers/gpu/drm/i915/i915_reg.h | 4 2 files

[Intel-gfx] [PATCH 1/2] drm/i915/dp: Use LINK_QUAL_PATTERN_* Phy test pattern names

for future series. CC: Jani Nikula Cc: Imre Deak Cc: Lee Shawn C Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915

[Intel-gfx] [PATCH] drm/i915/dp: Fix log level for "CDS interlane align done"

"CDS interlane align done" is a passing condition not an error. Before adding new macros for logs it was drm_dbg_kms. Fixes: f48eab290287 ("drm/i915/dp: Add link training debug and error printing helpers") Cc: Imre Deak CC: Jani Nikula Signed-off-by: Khaled Almahallawy

[Intel-gfx] [PATCH v4] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

: Jani Nikula Tested-by: Khaled Almahallawy Signed-off-by: Khaled Almahallawy Reviewed-by: Clint Taylor Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 59 - 1 file changed, 59 deletions(-) diff --git a/drivers/gpu/drm/i915/display

[Intel-gfx] [PATCH v3] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

invalidating link training, which will affect the quality of the phy test pattern when the transcoder is enabled again. v2: Update commit message (Clint) v3: Add missing Signed-off in v2 Bspec: 50482 Cc: Imre Deak Cc: Clint Taylor CC: Jani Nikula Tested-by: Khaled Almahallawy Signed-off-by: Khaled

[Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

invalidating link training, which will affect the quality of the phy test pattern when the transcoder is enabled again. v2: Update commit message (Clint) Bspec: 50482 Cc: Imre Deak Cc: Clint Taylor Cc: Or Cochvi Tested-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 59

[Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

: Or Cochvi Tested-by: Khaled Almahallawy Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 59 - 1 file changed, 59 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index c9be61d2348e

[Intel-gfx] [PATCH] drm/display: Don't rewrite link config when setting phy test pattern

ikula Cc: Or Cochvi Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/display/drm_dp_helper.c | 9 - 1 file changed, 9 deletions(-) diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index 92990a3d577a..9f055d9710ea 100644 --- a/dri

[Intel-gfx] [PATCH] drm/dp: Don't rewrite link config when setting phy CTS test pattern with LTTPR

e PHY test patterns and swing/pre-emph levels. [1]: LTTPR Re-timer PHY test procedure proposal https://groups.vesa.org/wg/Link/document/16521 Cc: Imre Deak Cc: Jani Nikula Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/dp/drm_dp.c | 9 - 1 file changed, 9 deletions(-)

[Intel-gfx] [RFC PATCH 4/4] drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions

(CP2520; Normative)) That is why the change from DP_PHY_TEST_PATTERN_SEL_MASK to DP_LINK_QUAL_PATTERN_CP2520_PAT_3 No functional changes Cc: Chandan Uddaraju Cc: Kuogee Hsieh Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ++-- drivers/gpu/drm/msm/dp

[Intel-gfx] [RFC PATCH 3/4] drm/amd/dc: Use DPCD 248h DP 2.0 new name

Use the new definition of DPCD 248h (DP_LINK_QUAL_PATTERN_SELECT) No functional changes. Cc: Harry Wentland Cc: Alex Deucher Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu

[Intel-gfx] [RFC PATCH 2/4] drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions

Update selected phy test pattern names to use the new names/definitions of DPCD 248h in DP2.0/drm_dp_helpers.h No functional changes Cc: Manasi Navare CC: Jani Nikula Cc: Imre Deak Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 12 ++-- 1 file

[Intel-gfx] [RFC PATCH 1/4] drm/dp: Rename DPCD 248h according to DP 2.0 specs

” https://groups.vesa.org/wg/AllMem/documentComment/2738 Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 6 +++--- include/drm/drm_dp_helper.h | 13 +++-- 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers

[Intel-gfx] [RFC PATCH 0/4] drm/dp: Use DP2.0 DPCD 248h updated register/field names for DP PHY CTS

://groups.vesa.org/wg/AllMem/documentComment/2738 Khaled Almahallawy (4): drm/dp: Rename DPCD 248h according to DP 2.0 specs drm/i915/dp: Use DP 2.0 LINK_QUAL_PATTERN_* Phy test pattern definitions drm/amd/dc: Use DPCD 248h DP 2.0 new name drm/msm/dp: Use DPCD 248h DP 2.0 new names/definitions

[Intel-gfx] [PATCH] drm/i915/dp: Add missing TPS4 programming bits

Cc: Imre Deak Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index

[Intel-gfx] [PATCH] drm/i915: Add enable_lttpr param to select between different LTTPR modes

-transparent modes) to debug. This patch allows us to do that by just setting driver parameters instead of sending patches to ODMs to switch between LTTPR modes. Cc: Imre Deak Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 7 +++ drivers/gpu/drm/i915

[Intel-gfx] [PATCH v2] drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during PHY Layer testing

/Pre-emphasis equalization level) for DP output channel. If the source doesn't write to DPCD 103-106, the retimer may not output the requested swing/pre-emphasis and eventually we fail compliance. v2: Rebase and use crtc->lane_count (Imre) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i

[Intel-gfx] [RFC PATCH 2/2] drm/i915/dp: Retry AUX requests 7 times.

Given that intel_dp_aux_xfer retries 5 times, so configure drm_dpcd_access to retry only 7 times, which means the max number of retries for i915 = 7 * 5 = 35 times. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 ++ 1 file changed, 2 insertions(+) diff

[Intel-gfx] [RFC PATCH 1/2] drm/dp: Make number of AUX retries configurable by display drivers.

a variable to allow for fine tuning and optimization of aux timing. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 10 +++--- include/drm/drm_dp_helper.h | 1 + 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b

[Intel-gfx] [PATCH v2] drm/i915: Add link rate and lane count to i915_display_info

is. v2(Ville): Uniform style for '=' and use 'port clock' instead of 'link rate' Cc: Imre Deak Cc: Ville Syrjälä CC: José Roberto de Souza Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH] drm/i915: Add link rate and lane count to i915_display_info

is. Cc: Imre Deak Cc: Ville Syrjälä CC: José Roberto de Souza Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/tgl: Set drm_crtc_state.active=false for all added disconnected CRTCs sharing MST stream.

ling reconnect of MST hub or even worse leaving TC PHY in a connected state while the MST Hub is disconnected. Tested on Ubuntu(drm-tip) and Chrome(kernel-next 5.9 rc7) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 +++ 1 file changed, 3 insert

[Intel-gfx] [PATCH] drm/i915/dp: DPTX writes Swing/Pre-emphs(DPCD 0x103-0x106) requested during PHY Layer testing.

/Pre-emphasis equalization level) for DP output channel . If the source doesn't write to DPCD 103-106, the retimer may not output the requested swing/pre-emphasis and eventually we fail compliance. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 3 +++ 1 file changed

[Intel-gfx] [PATCH v2 2/2] drm/i915/dp: TPS4 PHY test pattern compliance support

Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. v2: uniform bit names TP4a/b/c (Manasi) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 16 insertions

[Intel-gfx] [PATCH v2 1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

Add the missing CP2520 pattern 2 and 3 phy compliance patterns v2: cosemtic changes Reviewed-by: Manasi Navare (v1) Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff

[Intel-gfx] [PATCH 2/2] drm/i915/dp: TPS4 PHY test pattern compliance support

Adding support for TPS4 (CP2520 Pattern 3) PHY pattern source tests. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_dp.c | 14 -- drivers/gpu/drm/i915/i915_reg.h | 4 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 1/2] drm/dp: Add PHY_TEST_PATTERN CP2520 Pattern 2 and 3

Add the missing CP2520 pattern 2 and 3 phy compliance patterns Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/drm_dp_helper.c | 2 +- include/drm/drm_dp_helper.h | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm

[Intel-gfx] [PATCH] drm/i915/tc: fix the reset of ln0

Setting ln0 similar to ln1 Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_ddi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 96eaa4b39c68..1c0c369573e7

[Intel-gfx] [PATCH] drm/i915/tgl: Enable DDI/Port G

In TGL there we are missing the initialization of port G. Do the same as for other ports. Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/display/intel_bios.c | 4 drivers/gpu/drm/i915/display/intel_display.c | 6 ++ drivers/gpu/drm/i915/display/intel_display.h | 1

Re: [Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

On 5/30/19 2:20 PM, Manasi Navare wrote: On Thu, May 30, 2019 at 12:33:40PM -0700, Almahallawy, Khaled wrote: On Wed, 2019-05-22 at 12:25 -0700, Manasi Navare wrote: On Tue, May 21, 2019 at 04:24:58PM +0300, Ville Syrjälä wrote: On Mon, May 20, 2019 at 04:25:41PM -0700, Khaled Almahallawy

[Intel-gfx] [PATCH] drm/i915: Fix the interpretation of MAX_PRE-EMPHASIS_REACHED bit inorder to pass Link Layer compliance test number 400.3.1.15

all active lanes) and the Source DUT supports pre-emphasis level 3 (9.5db). Cc: Clint Taylor Cc: Manasi Navare Signed-off-by: Khaled Almahallawy --- drivers/gpu/drm/i915/intel_ddi.c | 20 drivers/gpu/drm/i915/intel_dp.c | 2 +- 2 files changed, 1 insertion(+), 21 deletions