[Intel-gfx] [PATCH 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread han . lu
From: "Lu, Han" Signed-off-by: Lu, Han diff --git a/drivers/gpu/drm/i915/intel_audio.c b/drivers/gpu/drm/i915/intel_audio.c index 63d4706..8310bf3 100644 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@ -591,7 +591,8 @@

[Intel-gfx] [PATCH V3 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread han . lu
From: "Lu, Han" For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override enabled/disable callback"), in order to enable codec wakeup override signal, to allow re-enumeration of the controller on SKL after resume from low power state. In SKL, HDMI/DP

Re: [Intel-gfx] [PATCH V2 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread Han Lu
N(dev_priv) && + !IS_KABYLAKE(dev_priv)) if (INTEL_INFO(dev)->gen < 9) return; for future-proofing? At least make it an IS_GEN9 check instead of listening all of them in a long list. http://mid.gmane.org/87a8qacq5w@intel.com ... Yes, that's right. Thanks. I'l

[Intel-gfx] [PATCH V2 1/1] drm/i915/audio: apply SKL codec wake up patch to BXT

2015-11-19 Thread han . lu
From: "Lu, Han" For SKL we added a commit 632f3ab95fe2 ("drm/i915/audio: add codec wakeup override enabled/disable callback"), in order to enable codec wakeup override signal, to allow re-enumeration of the controller on SKL after resume from low power state. In SKL, HDMI/DP

[Intel-gfx] [PATCH 1/1] tools/intel_audio_dump: add support for Broxton

2015-06-25 Thread han . lu
From: Lu, Han han...@intel.com This patch adds support for dumping audio registers of Broxton. Signed-off-by: Lu, Han han...@intel.com diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c index d447902..8c24230 100644 --- a/tools/intel_audio_dump.c +++ b/tools/intel_audio_dump.c @@

[Intel-gfx] [PATCH-V4 2/2] ALSA:hda - reset display codec when power on

2015-05-04 Thread han . lu
From: Lu, Han han...@intel.com In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs when power well on, otherwise display audio codecs will disappear when resume from low power state. Reset steps when power on: enable

[Intel-gfx] [PATCH-V4 1/2] drm/i915/audio: add codec wakeup override enabled/disable callback

2015-05-04 Thread han . lu
From: Lu, Han han...@intel.com Add support for enabling codec wakeup override signal to allow re-enumeration of the controller on SKL after resume from low power state. In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs

[Intel-gfx] [PATCH-V3 2/2] ALSA:hda - reset display codec when power on

2015-04-29 Thread han . lu
From: Lu, Han han...@intel.com In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs when power well on, otherwise display audio codecs will disappear when resume from low power state. Reset steps when power on: enable

[Intel-gfx] [PATCH-V3 1/2] drm/i915/audio: add codec wakeup override enabled/disable callback

2015-04-29 Thread han . lu
From: Lu, Han han...@intel.com Add support for enabling codec wakeup override signal to allow re-enumeration of the controller on SKL after resume from low power state. v3 by Jani: Simplify to only support toggling the appropriate chicken bit. Signed-off-by: Lu, Han han...@intel.com

[Intel-gfx] [PATCH-V2 2/2] ALSA:hda - reset display codec when power on

2015-04-28 Thread han . lu
From: Lu, Han han...@intel.com In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs when power well on, otherwise display audio codecs will disappear when resume from low power state. The reset step when power on is:

[Intel-gfx] [PATCH-V2 1/2] drm/i915: add callback to enable/disable codec wakeup

2015-04-28 Thread han . lu
From: Lu, Han han...@intel.com In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs when power well on, otherwise display audio codecs will disappear when resume from low power state. The reset step when power on is:

[Intel-gfx] [PATCH 1/1] tools/intel_audio_dump: add support for Skylake

2015-02-11 Thread han . lu
From: Lu, Han han...@intel.com This patch adds support for dumping audio registers of Skylake. Signed-off-by: Lu, Han han...@intel.com diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c index 945b136..d447902 100644 --- a/tools/intel_audio_dump.c +++ b/tools/intel_audio_dump.c @@