subject:"\[Intel\-gfx\] \[PATCH v2\] drm\/i915\: Handle PipeC fused off on GEN7\+"

[Intel-gfx] [PATCH v2] drm/i915: Handle PipeC fused off on GEN7+

2016-01-13 Thread Gabriel Feceoru

Starting with Gen7 (IVB) Display PipeC can be fused off on some production parts. When disabled, display hardware will prevent the pipe C register bit from being set to 1. Fixed by adjusting pipe_count to reflect this. Signed-off-by: Gabriel Feceoru ---

Re: [Intel-gfx] [PATCH v2] drm/i915: Handle PipeC fused off on GEN7+

2016-01-13 Thread Damien Lespiau

On Wed, Jan 13, 2016 at 04:46:43PM +0200, Gabriel Feceoru wrote: > Starting with Gen7 (IVB) Display PipeC can be fused off on some production > parts. When disabled, display hardware will prevent the pipe C register bit > from being set to 1. > > Fixed by adjusting pipe_count to reflect this.