On Fri, May 22, 2015 at 11:22:40AM +0300, Mika Kahola wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Implement support for changing the cdclk frequency during runtime on
HSW. VLV/CHV already have support for this, so we can follow their
example for the most part. Only the actual
-Original Message-
From: Lespiau, Damien
Sent: Friday, May 29, 2015 2:31 PM
To: Kahola, Mika
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 10/12] drm/i915: HSW cdclk support
On Fri, May 22, 2015 at 11:22:40AM +0300, Mika Kahola wrote:
From: Ville Syrjälä
On Fri, May 29, 2015 at 01:06:47PM +0100, Kahola, Mika wrote:
static void broxton_modeset_global_resources(struct drm_atomic_state
*old_state)
broxton_set_cdclk(dev, req_cdclk);
}
+/* compute the max rate for new configuration */ static int
+ilk_max_pixel_rate(struct
On Fri, May 29, 2015 at 12:30:41PM +0100, Damien Lespiau wrote:
On Fri, May 22, 2015 at 11:22:40AM +0300, Mika Kahola wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Implement support for changing the cdclk frequency during runtime on
HSW. VLV/CHV already have support for this,
From: Ville Syrjälä ville.syrj...@linux.intel.com
Implement support for changing the cdclk frequency during runtime on
HSW. VLV/CHV already have support for this, so we can follow their
example for the most part. Only the actual hardware programming differs,
the rest is pretty much the same.
The
