On Mon, Jan 16, 2012 at 04:55:34PM +0100, Jan Kiszka wrote:
Changes in v7:
- introduce {apic,pic,ioapic}_qdev_register and use
{APIC,PIC,IOAPIC}CommonInfo to move more code into the common modules
- clean up forgotten fragments of backend/frontend approach
- rephrased potentially misleading
On Sun, Jan 15, 2012 at 12:41:31PM +0900, Takuya Yoshikawa wrote:
My 32 bit host running on an intel core i3 box said:
$ ./api/dirty-log-perf
dirty-log-perf: 262144 slot pages / 262144 mem pages
rip 804a74a
rip 804a74a
get dirty log: 51571 ns for 1 dirty pages
On Mon, Jan 16, 2012 at 10:11:51AM -0700, Alex Williamson wrote:
The core PCI code sets the multifunction bit in the header before
calling the device initfn. For device assignment, we're blasting
that value with the actual hardware value, so nobody sees the
additional functions if the devices
https://bugzilla.kernel.org/show_bug.cgi?id=42600
Summary: Live migration of very large vm get's stuck
Product: Virtualization
Version: unspecified
Kernel Version: 2.6.32-131.6.1.el6.x86_64
Platform: All
OS/Version: Linux
Tree:
find_index_from_host_irq returns 0 on error
but callers assume 0 on error. This should
not matter much: an out of range irq should never happen since
irq handler was registered with this irq #,
and even if it does we get a spurious msix irq in guest
and typically nothing terrible happens.
Still,
We can deliver certain interrupts, notably MSIX,
from atomic context. Add a new API kvm_set_irq_inatomic,
that does exactly that, and use it to implement
an irq handler for msi.
This reduces the pressure on scheduler in case
where host and guest irq share a host cpu.
Signed-off-by: Michael S.
On 2011-12-18 21:48, Vadim Rozenfeld wrote:
---
Makefile.target |2 +
target-i386/cpuid.c | 14 ++
target-i386/hyperv.c | 65
++
target-i386/hyperv.h | 37
4 files changed, 118
On 2012-01-18 10:48, Marcelo Tosatti wrote:
On Mon, Jan 16, 2012 at 04:55:34PM +0100, Jan Kiszka wrote:
Changes in v7:
- introduce {apic,pic,ioapic}_qdev_register and use
{APIC,PIC,IOAPIC}CommonInfo to move more code into the common modules
- clean up forgotten fragments of backend/frontend
On Wed, Jan 18, 2012 at 09:09:22PM +0100, Jan Kiszka wrote:
Patchset does not apply, please regenarate
OK, working on it. I think it had some build issue with !CONFIG_KVM anyway.
(patch 2 is missing actual
file move), thanks.
Hmm, possibly requires a fairly recent diff. Are you fine
On 2012-01-18 21:05, Jan Kiszka wrote:
On 2011-12-18 21:48, Vadim Rozenfeld wrote:
---
Makefile.target |2 +
target-i386/cpuid.c | 14 ++
target-i386/hyperv.c | 65
++
target-i386/hyperv.h | 37
There's no vnclisten param in the virt-install command
shipped in RHEL 5, so let's add it to the command line
only if does support this option.
Signed-off-by: Lucas Meneghel Rodrigues l...@redhat.com
---
client/virt/libvirt_vm.py |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
From: Jan Kiszka jan.kis...@siemens.com
Avoid changing the IRQ level to high on reset as it may trigger spurious
events. Instead, open-code the effects of pit_load_count(0) in the reset
handler.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
hw/i8254.c |8 +++-
1 files changed, 7
This is a preparatory series to allow the introduction of the KVM
in-kernel PIT. A working and fairly clean version for that is ready. It
is just waiting for the irqchip baseline and this series to be merged.
This series also fixes various bugs in the PIT and HPET code, see
patches for details.
From: Jan Kiszka jan.kis...@siemens.com
Instead of providing 4 individual query functions for mode, gate, output
and initial counter state, introduce a service that queries all
information at once. This comes with tiny additional costs for
pcspk_callback but with a much cleaner interface. Also,
From: Jan Kiszka jan.kis...@siemens.com
Convert the PC speaker device to a qdev ISA model. Move the public
interface to a dedicated header file at this chance.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch_init.c|1 +
hw/mips_jazz.c |3 ++-
hw/pc.c|3 ++-
From: Jan Kiszka jan.kis...@siemens.com
Instead of retrieving the IRQ object from the ISA bus, let the creator
of the PIT pick it. pit_init can then connect it to a generic GPIO
output pin.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
hw/alpha_dp264.c |2 +-
hw/i8254.c |
From: Jan Kiszka jan.kis...@siemens.com
In legacy mode, the HPET suppresses the RTC interrupt delivery via IRQ
8 but keeps track of the RTC output level and applies it when legacy
mode is turned off again. This value has to be preserved across save/
restore as it cannot be reconstructed
From: Jan Kiszka jan.kis...@siemens.com
When the HPET enters legacy mode, the IRQ output of the PIT is
suppressed and replaced by the HPET timer 0. But the current code to
emulate this was broken in many ways. It reset the PIT state after
re-enabling, it worked against a stale static PIT
From: Jan Kiszka jan.kis...@siemens.com
Move the public interface of the PIT into its own header file and update
all users.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
hw/alpha_dp264.c |1 +
hw/hpet.c |1 +
hw/i8254.c |1 +
hw/i8254.h | 54
We're currently allocating 16MB of linear memory on demand when creating
a guest. That does work some times, but finding 16MB of linear memory
available in the system at runtime is definitely not a given.
So let's add another command line option similar to the RMA preallocator,
that we can use to
While using the book3s hv code on a 970 system, we quickly ran into situations
where we didn't have enough contiguous memory available to allocate a 16MB
region for the page table we need to manage the guest's memory.
So I went ahead, cleaned up the code we currently use to preallocate RMAs and
RMAs and HPT preallocated spaces should be zeroed, so we don't accidently
leak information from previous VM executions.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_hv_builtin.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git
We have code to allocate big chunks of linear memory on bootup for later use.
This code is currently used for RMA allocation, but can be useful beyond that
extent.
Make it generic so we can reuse it for other stuff later.
Signed-off-by: Alexander Graf ag...@suse.de
---
When enabling the current KVM code on e500mc, I get the following oops:
Oops: Exception in kernel mode, sig: 4 [#1]
SMP NR_CPUS=8 P2041 RDB
Modules linked in:
NIP: c067df4c LR: c067df44 CTR:
REGS: ee055ed0 TRAP: 0700 Not tainted (3.2.0-10391-g36c5afe)
MSR:
On Wed, Jan 18, 2012 at 08:10:24PM +0200, Michael S. Tsirkin wrote:
We can deliver certain interrupts, notably MSIX,
from atomic context. Add a new API kvm_set_irq_inatomic,
that does exactly that, and use it to implement
an irq handler for msi.
This reduces the pressure on scheduler in
RMAs and HPT preallocated spaces should be zeroed, so we don't accidently
leak information from previous VM executions.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_hv_builtin.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git
We're currently allocating 16MB of linear memory on demand when creating
a guest. That does work some times, but finding 16MB of linear memory
available in the system at runtime is definitely not a given.
So let's add another command line option similar to the RMA preallocator,
that we can use to
While using the book3s hv code on a 970 system, we quickly ran into situations
where we didn't have enough contiguous memory available to allocate a 16MB
region for the page table we need to manage the guest's memory.
So I went ahead, cleaned up the code we currently use to preallocate RMAs and
We have code to allocate big chunks of linear memory on bootup for later use.
This code is currently used for RMA allocation, but can be useful beyond that
extent.
Make it generic so we can reuse it for other stuff later.
Signed-off-by: Alexander Graf ag...@suse.de
---
When enabling the current KVM code on e500mc, I get the following oops:
Oops: Exception in kernel mode, sig: 4 [#1]
SMP NR_CPUS=8 P2041 RDB
Modules linked in:
NIP: c067df4c LR: c067df44 CTR:
REGS: ee055ed0 TRAP: 0700 Not tainted (3.2.0-10391-g36c5afe)
MSR:
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