On Wed, Mar 9, 2016 at 11:13 PM, Ganapatrao Kulkarni
wrote:
> On Wed, Mar 9, 2016 at 9:33 PM, Catalin Marinas
> wrote:
>> On Wed, Mar 09, 2016 at 05:17:39PM +0530, Ganapatrao Kulkarni wrote:
>>> On Wed, Mar 9, 2016 at 3:36 PM, Catalin Marinas
On Wed, Mar 9, 2016 at 11:13 PM, Ganapatrao Kulkarni
wrote:
> On Wed, Mar 9, 2016 at 9:33 PM, Catalin Marinas
> wrote:
>> On Wed, Mar 09, 2016 at 05:17:39PM +0530, Ganapatrao Kulkarni wrote:
>>> On Wed, Mar 9, 2016 at 3:36 PM, Catalin Marinas
>>> wrote:
>>> > On Wed, Mar 09, 2016 at
Setting TF prevents fastpath returns in most cases, which causes the
test to fail on 32-bit kernels because 32-bit kernels do not, in
fact, handle NT correctly on SYSENTER entries.
The next patch will fix 32-bit kernels.
Signed-off-by: Andy Lutomirski
---
Right after SYSENTER, we can get a #DB or NMI. On x86_32, there's no IST,
so the exception handler is invoked on the temporary SYSENTER stack.
Because the SYSENTER stack is very small, we have a fixup to switch
off the stack quickly when this happens. The old fixup had several issues:
1. It
Setting TF prevents fastpath returns in most cases, which causes the
test to fail on 32-bit kernels because 32-bit kernels do not, in
fact, handle NT correctly on SYSENTER entries.
The next patch will fix 32-bit kernels.
Signed-off-by: Andy Lutomirski
---
Right after SYSENTER, we can get a #DB or NMI. On x86_32, there's no IST,
so the exception handler is invoked on the temporary SYSENTER stack.
Because the SYSENTER stack is very small, we have a fixup to switch
off the stack quickly when this happens. The old fixup had several issues:
1. It
Due to a blatant design error, SYSENTER doesn't clear TF. As a result,
if a user does SYSENTER with TF set, we will single-step through the
kernel until something clears TF. There is absolutely nothing we can
do to prevent this short of turning off SYSENTER [1].
Simplify the handling
The SYSENTER stack is only used on 32-bit kernels. Remove it in
64-bit kernels.
(We may end up using it down the road on 64-bit kernels. If so,
we'll re-enable it for CONFIG_IA32_EMULATION.)
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/processor.h | 2 ++
1 file
Due to a blatant design error, SYSENTER doesn't clear TF. As a result,
if a user does SYSENTER with TF set, we will single-step through the
kernel until something clears TF. There is absolutely nothing we can
do to prevent this short of turning off SYSENTER [1].
Simplify the handling
The SYSENTER stack is only used on 32-bit kernels. Remove it in
64-bit kernels.
(We may end up using it down the road on 64-bit kernels. If so,
we'll re-enable it for CONFIG_IA32_EMULATION.)
Signed-off-by: Andy Lutomirski
---
arch/x86/include/asm/processor.h | 2 ++
1 file changed, 2
The first instruction of the SYSENTER entry runs on its own tiny
stack. That stack can be used if a #DB or NMI is delivered before
the SYSENTER prologue switches to a real stack.
We have code in place to prevent us from overflowing the tiny stack.
For added paranoia, add a canary to the stack
The first instruction of the SYSENTER entry runs on its own tiny
stack. That stack can be used if a #DB or NMI is delivered before
the SYSENTER prologue switches to a real stack.
We have code in place to prevent us from overflowing the tiny stack.
For added paranoia, add a canary to the stack
The SDM says that debug exceptions clear BTF, and we need to keep
TIF_BLOCKSTEP in sync with BTF. Clear it unconditionally and improve
the comment.
I suspect that the fact that kmemcheck could cause TIF_BLOCKSTEP not
to be cleared was just an oversight.
Signed-off-by: Andy Lutomirski
Ingo suggested that the comments should explain when the various
entries are used. This adds these explanations and improves other
parts of the comments.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_32.S| 61 +++-
This makes the 32-bit code work just like the 64-bit code. It should
speed up syscalls on 32-bit kernels on Skylake by something like 20
cycles (by analogy to the 64-bit compat case).
It also cleans up NT just like we do for the 64-bit case.
Signed-off-by: Andy Lutomirski
---
The SDM says that debug exceptions clear BTF, and we need to keep
TIF_BLOCKSTEP in sync with BTF. Clear it unconditionally and improve
the comment.
I suspect that the fact that kmemcheck could cause TIF_BLOCKSTEP not
to be cleared was just an oversight.
Signed-off-by: Andy Lutomirski
---
Ingo suggested that the comments should explain when the various
entries are used. This adds these explanations and improves other
parts of the comments.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/entry_32.S| 61 +++-
arch/x86/entry/entry_64.S| 10
This makes the 32-bit code work just like the 64-bit code. It should
speed up syscalls on 32-bit kernels on Skylake by something like 20
cycles (by analogy to the 64-bit compat case).
It also cleans up NT just like we do for the 64-bit case.
Signed-off-by: Andy Lutomirski
---
We weren't restoring FLAGS at all on SYSEXIT. Apparently no one cared.
With this patch applied, native kernels should always honor
task_pt_regs()->flags, which opens the door for some sys_iopl
cleanups. I'll do those as a separate series, though, since getting
it right will involve tweaking
Leaving any bits set in DR6 on return from a debug exception is
asking for trouble. Prevent it by writing zero right away and
clarify the comment.
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/traps.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
Now that SYSENTER with TF set puts X86_EFLAGS_TF directly into
regs->flags, we don't need a TIF_SINGLESTEP fixup in the syscall
entry code. Remove it.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/common.c| 10 --
arch/x86/include/asm/thread_info.h | 2
Leaving any bits set in DR6 on return from a debug exception is
asking for trouble. Prevent it by writing zero right away and
clarify the comment.
Signed-off-by: Andy Lutomirski
---
arch/x86/kernel/traps.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git
Now that SYSENTER with TF set puts X86_EFLAGS_TF directly into
regs->flags, we don't need a TIF_SINGLESTEP fixup in the syscall
entry code. Remove it.
Signed-off-by: Andy Lutomirski
---
arch/x86/entry/common.c| 10 --
arch/x86/include/asm/thread_info.h | 2 +-
2 files
We weren't restoring FLAGS at all on SYSEXIT. Apparently no one cared.
With this patch applied, native kernels should always honor
task_pt_regs()->flags, which opens the door for some sys_iopl
cleanups. I'll do those as a separate series, though, since getting
it right will involve tweaking
hpa asked me to get rid of the ASM_CLAC at the beginning of the SYSENTER
path. Little did he know...
This series makes the observed behavior of SYSENTER wrt flags the same
for all sane flags and kernel bitnesses. That is, SYSENTER preserves
flags now unless you do a syscall that explicitly
CLAC is slow, and the SYSENTER code already has an unlikely path
that runs if unusual flags are set. Drop the CLAC and instead rely
on the unlikely path to clear AC.
This seems to save ~24 cycles on my Skylake laptop. (Hey, Intel,
make this faster please!)
Signed-off-by: Andy Lutomirski
hpa asked me to get rid of the ASM_CLAC at the beginning of the SYSENTER
path. Little did he know...
This series makes the observed behavior of SYSENTER wrt flags the same
for all sane flags and kernel bitnesses. That is, SYSENTER preserves
flags now unless you do a syscall that explicitly
CLAC is slow, and the SYSENTER code already has an unlikely path
that runs if unusual flags are set. Drop the CLAC and instead rely
on the unlikely path to clear AC.
This seems to save ~24 cycles on my Skylake laptop. (Hey, Intel,
make this faster please!)
Signed-off-by: Andy Lutomirski
---
On Wed, Mar 9, 2016 at 6:34 PM, Stefan Berger
wrote:
> On 03/09/2016 01:01 PM, Andy Lutomirski wrote:
>>
>> On Wed, Mar 9, 2016 at 9:39 AM, Stefan Berger
>> wrote:
>>>
>>> This patch implements a driver for supporting multiple emulated TPMs
On Wed, Mar 9, 2016 at 6:34 PM, Stefan Berger
wrote:
> On 03/09/2016 01:01 PM, Andy Lutomirski wrote:
>>
>> On Wed, Mar 9, 2016 at 9:39 AM, Stefan Berger
>> wrote:
>>>
>>> This patch implements a driver for supporting multiple emulated TPMs in a
>>> system.
>>>
>>> The driver implements a device
It is reported that the following commit triggers regressions:
Linux commit: efaed9be998b5ae0afb7458e057e5f4402b43fa0
ACPICA commit: 31178590dde82368fdb0f6b0e466b6c0add96c57
Subject: ACPICA: Events: Enhance acpi_ev_execute_reg_method() to
ensure no _REG evaluations can happen during
It is reported that the following commit triggers regressions:
Linux commit: efaed9be998b5ae0afb7458e057e5f4402b43fa0
ACPICA commit: 31178590dde82368fdb0f6b0e466b6c0add96c57
Subject: ACPICA: Events: Enhance acpi_ev_execute_reg_method() to
ensure no _REG evaluations can happen during
On 03/09/2016 11:58 AM, Bastien Nocera wrote:
Hey Frederic,
On Tue, 2016-03-08 at 20:40 -0500, Frederic Jacob wrote:
Add power supply support for the PS3 remote controller
Isn't something like "add battery state reporting for PS3 remotes"
better?
Also, as I don't think it's physically
On 03/09/2016 11:58 AM, Bastien Nocera wrote:
Hey Frederic,
On Tue, 2016-03-08 at 20:40 -0500, Frederic Jacob wrote:
Add power supply support for the PS3 remote controller
Isn't something like "add battery state reporting for PS3 remotes"
better?
Also, as I don't think it's physically
Hi Linus,
A few imx fixes I missed from a couple of weeks ago, they still aren't
that big and fix some regression and a fail to boot problem.
Other than that, a couple of regression fixes for radeon/amdgpu, one
regression fix for vmwgfx and one regression fix for tda998x.
Dave.
The following
Hi Linus,
A few imx fixes I missed from a couple of weeks ago, they still aren't
that big and fix some regression and a fail to boot problem.
Other than that, a couple of regression fixes for radeon/amdgpu, one
regression fix for vmwgfx and one regression fix for tda998x.
Dave.
The following
This driver is modified to support RK3399 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 55 +++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
This driver is modified to support RK3399 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 55 +++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Signed-off-by: Elaine Zhang
---
.../bindings/soc/rockchip/power_domain.txt | 37 ++
1 file changed, 37 insertions(+)
diff --git
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Signed-off-by: Elaine Zhang
---
.../bindings/soc/rockchip/power_domain.txt | 37 ++
1 file changed, 37 insertions(+)
diff --git
fix some idle handling
support sub-power domain
add rk3399-power.h
modify document for RK3399 Soc
modify power domain for RK3399 SoC
Changes in v6:
[PATCH v6 3/6]:
fix up some coding style
[PATCH v6 4/6]:
fix up the volatge domain follow the TRM table
fix up the power
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3399-power.h | 53
1 file changed, 53 insertions(+)
create mode 100644 include/dt-bindings/power/rk3399-power.h
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c
fix some idle handling
support sub-power domain
add rk3399-power.h
modify document for RK3399 Soc
modify power domain for RK3399 SoC
Changes in v6:
[PATCH v6 3/6]:
fix up some coding style
[PATCH v6 4/6]:
fix up the volatge domain follow the TRM table
fix up the power
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3399-power.h | 53
1 file changed, 53 insertions(+)
create mode 100644 include/dt-bindings/power/rk3399-power.h
diff --git
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 64
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a parent-domain.
So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.
There exist one special case if both
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a parent-domain.
So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.
There exist one special case if both
在 2016年03月10日 05:35, Eduardo Valentin 写道:
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the local points and unregister calls.
Cc: Zhang Rui
Cc: Heiko Stuebner
Cc: linux...@vger.kernel.org
Cc:
在 2016年03月10日 05:35, Eduardo Valentin 写道:
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the local points and unregister calls.
Cc: Zhang Rui
Cc: Heiko Stuebner
Cc: linux...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc:
On 03/09/2016 01:01 PM, Andy Lutomirski wrote:
On Wed, Mar 9, 2016 at 9:39 AM, Stefan Berger
wrote:
This patch implements a driver for supporting multiple emulated TPMs in a
system.
The driver implements a device /dev/vtpmx that is used to created
a client device
On 03/09/2016 01:01 PM, Andy Lutomirski wrote:
On Wed, Mar 9, 2016 at 9:39 AM, Stefan Berger
wrote:
This patch implements a driver for supporting multiple emulated TPMs in a
system.
The driver implements a device /dev/vtpmx that is used to created
a client device pair /dev/tpmX (e.g.,
On 03/09/2016 01:35 PM, Eduardo Valentin wrote:
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the local points and unregister calls.
Cc: Jean Delvare
Cc: Guenter Roeck
Cc: lm-sens...@lm-sensors.org
Cc:
Hi Heiko,
Thank you for helping me to optimize these details. :-)
On 2016年03月10日 06:25, Heiko Stübner wrote:
Hi Xing,
Am Mittwoch, 9. März 2016, 10:37:04 schrieb Xing Zheng:
There are need to support Multi-CRUs probability in future, but
it is not supported on the current Rockchip Clock
On 03/09/2016 01:35 PM, Eduardo Valentin wrote:
This changes the driver to use the devm_ version
of thermal_zone_of_sensor_register and cleans
up the local points and unregister calls.
Cc: Jean Delvare
Cc: Guenter Roeck
Cc: lm-sens...@lm-sensors.org
Cc: linux-kernel@vger.kernel.org
Hi Heiko,
Thank you for helping me to optimize these details. :-)
On 2016年03月10日 06:25, Heiko Stübner wrote:
Hi Xing,
Am Mittwoch, 9. März 2016, 10:37:04 schrieb Xing Zheng:
There are need to support Multi-CRUs probability in future, but
it is not supported on the current Rockchip Clock
This patch creates new driver that supports StreamLabs usb watchdog
device. This device plugs into 9-pin usb header and connects to
reset pin and reset button on common PC.
USB commands used to communicate with device were reverse
engineered using usbmon.
Signed-off-by: Alexey Klimov
This patch creates new driver that supports StreamLabs usb watchdog
device. This device plugs into 9-pin usb header and connects to
reset pin and reset button on common PC.
USB commands used to communicate with device were reverse
engineered using usbmon.
Signed-off-by: Alexey Klimov
---
My name is Jack, from the US. I'm in Syria right now fighting IS. I want to get
to know you better, if I may be so bold. I consider myself an easy-going man,
and I am currently looking for a relationship in which I feel loved.
Please tell me more about yourself, if you don't mind.
My name is Jack, from the US. I'm in Syria right now fighting IS. I want to get
to know you better, if I may be so bold. I consider myself an easy-going man,
and I am currently looking for a relationship in which I feel loved.
Please tell me more about yourself, if you don't mind.
Hi Matt,
> -Original Message-
> From: Matt Fleming [mailto:m...@codeblueprint.co.uk]
> Sent: Wednesday, March 09, 2016 11:35 PM
> To: Chen, Yu C
> Cc: Rafael J. Wysocki; Rafael J. Wysocki; ACPI Devel Maling List;
> x...@kernel.org; linux-...@vger.kernel.org; Linux Kernel Mailing List;
Hi Matt,
> -Original Message-
> From: Matt Fleming [mailto:m...@codeblueprint.co.uk]
> Sent: Wednesday, March 09, 2016 11:35 PM
> To: Chen, Yu C
> Cc: Rafael J. Wysocki; Rafael J. Wysocki; ACPI Devel Maling List;
> x...@kernel.org; linux-...@vger.kernel.org; Linux Kernel Mailing List;
This driver is modified to support RK3399 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 55 +++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
On Wed, Mar 09, 2016 at 11:05:01AM -0800, Davidlohr Bueso wrote:
> On Wed, 09 Mar 2016, Paul E. McKenney wrote:
> >Queued for 4.7, thank you!!!
> >
> >(If you need it earlier, please let me know.)
>
> Thanks, Paul. Could we have them for 4.6 at least? Both are small and
> rather trivial but fix
This driver is modified to support RK3399 SoC.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 55 +++
1 file changed, 55 insertions(+)
diff --git a/drivers/soc/rockchip/pm_domains.c
b/drivers/soc/rockchip/pm_domains.c
index
On Wed, Mar 09, 2016 at 11:05:01AM -0800, Davidlohr Bueso wrote:
> On Wed, 09 Mar 2016, Paul E. McKenney wrote:
> >Queued for 4.7, thank you!!!
> >
> >(If you need it earlier, please let me know.)
>
> Thanks, Paul. Could we have them for 4.6 at least? Both are small and
> rather trivial but fix
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Signed-off-by: Elaine Zhang
---
.../bindings/soc/rockchip/power_domain.txt | 37 ++
1 file changed, 37 insertions(+)
diff --git
Add binding documentation for the power domains
found on Rockchip RK3399 SoCs
Signed-off-by: Elaine Zhang
---
.../bindings/soc/rockchip/power_domain.txt | 37 ++
1 file changed, 37 insertions(+)
diff --git
Add Vybrids massive on-chip SRAM areas. Make use of the memory
region functionality to denominate the retained SRAM area in
LPSTOP2 and LPSTOP3.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 37 +
1 file changed, 37
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index b038ea4..335f4e5 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3399-power.h | 53
1 file changed, 53 insertions(+)
create mode 100644 include/dt-bindings/power/rk3399-power.h
Add Vybrids massive on-chip SRAM areas. Make use of the memory
region functionality to denominate the retained SRAM area in
LPSTOP2 and LPSTOP3.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 37 +
1 file changed, 37 insertions(+)
diff --git
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index b038ea4..335f4e5 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@
According to a description from TRM, add all the power domains
Signed-off-by: Elaine Zhang
---
include/dt-bindings/power/rk3399-power.h | 53
1 file changed, 53 insertions(+)
create mode 100644 include/dt-bindings/power/rk3399-power.h
diff --git
fix some idle handling
support sub-power domain
add rk3399-power.h
modify document for RK3399 Soc
modify power domain for RK3399 SoC
Changes in v6:
[PATCH v6 3/6]:
fix up some coding style
[PATCH v6 4/6]:
fix up the volatge domain follow the TRM table
fix up the power
Enable GPIO wakeup key on Vybrid PAD 41 which is routed to the
Colibri default wakeup pin SO-DIMM 45.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c
Hi Jaegeuk,
[auto build test ERROR on f2fs/dev]
[also build test ERROR on next-20160309]
[cannot apply to v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Jaegeuk-Kim/f2fs-support
fix some idle handling
support sub-power domain
add rk3399-power.h
modify document for RK3399 Soc
modify power domain for RK3399 SoC
Changes in v6:
[PATCH v6 3/6]:
fix up some coding style
[PATCH v6 4/6]:
fix up the volatge domain follow the TRM table
fix up the power
Enable GPIO wakeup key on Vybrid PAD 41 which is routed to the
Colibri default wakeup pin SO-DIMM 45.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/vf-colibri-eval-v3.dtsi
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 64
Hi Jaegeuk,
[auto build test ERROR on f2fs/dev]
[also build test ERROR on next-20160309]
[cannot apply to v4.5-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improving the system]
url:
https://github.com/0day-ci/linux/commits/Jaegeuk-Kim/f2fs-support
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a parent-domain.
So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.
There exist one special case if both
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Signed-off-by: Elaine Zhang
---
drivers/soc/rockchip/pm_domains.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/soc/rockchip/pm_domains.c
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a parent-domain.
So allow such types of domains. For them, we can determine their
state (on/of) by checking the inverse idle-state instead.
There exist one special case if both
On 03/07/2016 06:48 PM, Yongji Xie wrote:
When using resource_alignment kernel parameter, the current
implement reassigns the alignment by changing resources' size
which can potentially break some drivers.
How can this possibly break any driver?... It rounds up, not down, what do
I miss here?
The clock register are lost when enterying LPSTOPx, hence provide
suspend/resume functions restoring them. The clock gates get
restored by the individual driver, hence we do not need to restore
them here.
Signed-off-by: Stefan Agner
---
drivers/clk/imx/clk-vf610.c | 49
The 2-bit gates found i.MX and Vybrid SoC support different clock
configuration:
0b00: clk disabled
0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode
0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid)
0b11: clk enabled in RUN and WAIT mode
For some clocks, we might want to
Signed-off-by: Stefan Agner
---
drivers/clk/imx/clk-vf610.c | 2 ++
include/dt-bindings/clock/vf610-clock.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index f0ff458..610a724 100644
On 03/07/2016 06:48 PM, Yongji Xie wrote:
When using resource_alignment kernel parameter, the current
implement reassigns the alignment by changing resources' size
which can potentially break some drivers.
How can this possibly break any driver?... It rounds up, not down, what do
I miss here?
The clock register are lost when enterying LPSTOPx, hence provide
suspend/resume functions restoring them. The clock gates get
restored by the individual driver, hence we do not need to restore
them here.
Signed-off-by: Stefan Agner
---
drivers/clk/imx/clk-vf610.c | 49
The 2-bit gates found i.MX and Vybrid SoC support different clock
configuration:
0b00: clk disabled
0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode
0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid)
0b11: clk enabled in RUN and WAIT mode
For some clocks, we might want to
Signed-off-by: Stefan Agner
---
drivers/clk/imx/clk-vf610.c | 2 ++
include/dt-bindings/clock/vf610-clock.h | 3 ++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-vf610.c b/drivers/clk/imx/clk-vf610.c
index f0ff458..610a724 100644
---
Some GPIO have extended wake-up capabilities through the WKPU
module. Encode the connection between the GPIO's and the WKPU
interrupt sources in the device tree.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 8
1 file changed, 8 insertions(+)
diff
In order to allow wake support in STOP sleep mode, clocks are
needed. Use imx_clk_gate2_cgr to disable automatic clock gating
in low power mode STOP. This allows to enable wake by UART using:
echo enabled > /sys/class/tty/ttyLP0/power/wakeup
However, if wake is not enabled, the driver should
> "Yaniv" == Yaniv Gardi writes:
Yaniv> Currently we use the host quirks mechanism in order to handle
Yaniv> both device and host controller quirks. In order to support
Yaniv> various of UFS devices we should separate handling the device
Yaniv> quirks from the host
Some GPIO have extended wake-up capabilities through the WKPU
module. Encode the connection between the GPIO's and the WKPU
interrupt sources in the device tree.
Signed-off-by: Stefan Agner
---
arch/arm/boot/dts/vfxxx.dtsi | 8
1 file changed, 8 insertions(+)
diff --git
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