[PATCH v11 25/27] ARM: davinci: add device tree support to timer

This adds device tree support to the davinci timer so that when clocks are moved to device tree, the timer will still work. Signed-off-by: David Lechner --- v11 changes: - drop fallback to ref_clk v10 changes: - change compatible to "ti,da830-timer" - remove comment

[PATCH v11 25/27] ARM: davinci: add device tree support to timer

This adds device tree support to the davinci timer so that when clocks are moved to device tree, the timer will still work. Signed-off-by: David Lechner --- v11 changes: - drop fallback to ref_clk v10 changes: - change compatible to "ti,da830-timer" - remove comment clocks as platform devices

[PATCH v11 26/27] ARM: davinci: da8xx-dt: switch to device tree clocks

This removes all of the clock init code from da8xx-dt.c. This includes all of the OF_DEV_AUXDATA that was just used for looking up clocks. Signed-off-by: David Lechner --- v11 changes: - none v10 changes: - removed unused header files - removed

[PATCH v11 26/27] ARM: davinci: da8xx-dt: switch to device tree clocks

This removes all of the clock init code from da8xx-dt.c. This includes all of the OF_DEV_AUXDATA that was just used for looking up clocks. Signed-off-by: David Lechner --- v11 changes: - none v10 changes: - removed unused header files - removed arch/arm/mach-davinci/time.c changes accidentally

[PATCH v11 27/27] ARM: dts: da850: Add clocks

This adds clock provider nodes for da850 and wires them up to all of the devices. Signed-off-by: David Lechner --- v11 changes: - rebased v10 changes: - change compatible to "ti,da830-timer" and add interrupt and interrupt-names properties to new clocksource timer node

[PATCH v11 27/27] ARM: dts: da850: Add clocks

This adds clock provider nodes for da850 and wires them up to all of the devices. Signed-off-by: David Lechner --- v11 changes: - rebased v10 changes: - change compatible to "ti,da830-timer" and add interrupt and interrupt-names properties to new clocksource timer node v9 changes: - change

[PATCH v11 20/27] ARM: davinci: dm644x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm644x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - rebased v8 changes: - none v7 changes: - rebased - add

[PATCH v11 20/27] ARM: davinci: dm644x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm644x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - rebased v8 changes: - none v7 changes: - rebased - add davinci prefix to commit message v6

[PATCH v11 21/27] ARM: davinci: dm646x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm646x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - rebased v8 changes: - none v7 changes: - rebased - add

[PATCH v11 21/27] ARM: davinci: dm646x: Remove legacy clock init

This removes the unused legacy clock init code from arch/arm/mach-davinci/dm646x.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - rebased v8 changes: - none v7 changes: - rebased - add davinci prefix to commit message v6

[PATCH] drm/nouveau/kms/nv50-: fix drm-get-put.cocci warnings

From: kbuild test robot Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference() and drm_*_unreference() helpers. Generated by: scripts/coccinelle/api/drm-get-put.cocci Fixes: 30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath dispnv50/")

[PATCH] drm/nouveau/kms/nv50-: fix drm-get-put.cocci warnings

From: kbuild test robot Use drm_*_get() and drm_*_put() helpers instead of drm_*_reference() and drm_*_unreference() helpers. Generated by: scripts/coccinelle/api/drm-get-put.cocci Fixes: 30ed49b55b6e ("drm/nouveau/kms/nv50-: move code underneath dispnv50/") Signed-off-by: kbuild test robot

[PATCH v11 22/27] ARM: davinci: da8xx: Remove legacy USB and SATA clock init

This removes the unused legacy USB and SATA clock init code from arch/arm/mach-davinci/{devices,usb}-da8xx}.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - none v8 changes: - none v7

[PATCH v11 22/27] ARM: davinci: da8xx: Remove legacy USB and SATA clock init

This removes the unused legacy USB and SATA clock init code from arch/arm/mach-davinci/{devices,usb}-da8xx}.c. Signed-off-by: David Lechner Reviewed-by: Sekhar Nori --- v11 changes: - none v10 changes: - none v9 changes: - none v8 changes: - none v7 changes: - rebased - add davinci prefix

Re: [PATCH] audit: add containerid support for IMA-audit

On 2018-05-18 12:34, Mimi Zohar wrote: > On Fri, 2018-05-18 at 11:56 -0400, Richard Guy Briggs wrote: > > On 2018-05-18 10:39, Mimi Zohar wrote: > > > On Fri, 2018-05-18 at 09:54 -0400, Stefan Berger wrote: > > > > On 05/18/2018 08:53 AM, Mimi Zohar wrote: > > > > > > [..] > > > > > > > If

Re: [PATCH] audit: add containerid support for IMA-audit

On 2018-05-18 12:34, Mimi Zohar wrote: > On Fri, 2018-05-18 at 11:56 -0400, Richard Guy Briggs wrote: > > On 2018-05-18 10:39, Mimi Zohar wrote: > > > On Fri, 2018-05-18 at 09:54 -0400, Stefan Berger wrote: > > > > On 05/18/2018 08:53 AM, Mimi Zohar wrote: > > > > > > [..] > > > > > > > If

[PATCH v11 10/27] ARM: davinci: dm646x: add new clock init using common clock framework

This adds the new board-specific clock init in mach-davinci/dm646x.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner

[PATCH v11 10/27] ARM: davinci: dm646x: add new clock init using common clock framework

This adds the new board-specific clock init in mach-davinci/dm646x.c using the new common clock framework drivers. The #ifdefs are needed to prevent compile errors until the entire ARCH_DAVINCI is converted. Also clean up the #includes since we are adding some here. Signed-off-by: David Lechner

[PATCH v11 01/27] clk: davinci: pll: allow dev == NULL

This modifies the TI Davinci PLL clock driver to allow for the case when dev == NULL. On some (most) SoCs that use this driver, the PLL clock needs to be registered during early boot because it is used for clocksource/clkevent and there will be no platform device available. Some function

[PATCH v11 01/27] clk: davinci: pll: allow dev == NULL

This modifies the TI Davinci PLL clock driver to allow for the case when dev == NULL. On some (most) SoCs that use this driver, the PLL clock needs to be registered during early boot because it is used for clocksource/clkevent and there will be no platform device available. Some function

Re: [PATCH] audit: add containerid support for IMA-audit

On 05/18/2018 11:45 AM, Richard Guy Briggs wrote: On 2018-05-18 07:49, Stefan Berger wrote: On 05/17/2018 05:30 PM, Richard Guy Briggs wrote: On 2018-05-17 10:18, Stefan Berger wrote: On 03/08/2018 06:21 AM, Richard Guy Briggs wrote: On 2018-03-05 09:24, Mimi Zohar wrote: On Mon, 2018-03-05

Re: [PATCH] audit: add containerid support for IMA-audit

On 05/18/2018 11:45 AM, Richard Guy Briggs wrote: On 2018-05-18 07:49, Stefan Berger wrote: On 05/17/2018 05:30 PM, Richard Guy Briggs wrote: On 2018-05-17 10:18, Stefan Berger wrote: On 03/08/2018 06:21 AM, Richard Guy Briggs wrote: On 2018-03-05 09:24, Mimi Zohar wrote: On Mon, 2018-03-05

Re: [PATCH] kvm: rename HINTS_DEDICATED to KVM_HINTS_REALTIME

CCing qemu-devel, as I'm now discussing userspace. On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote: > On Thu, May 17, 2018 at 03:46:58PM -0300, Eduardo Habkost wrote: > > On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote: > > > HINTS_DEDICATED seems to be

Re: [PATCH] kvm: rename HINTS_DEDICATED to KVM_HINTS_REALTIME

CCing qemu-devel, as I'm now discussing userspace. On Thu, May 17, 2018 at 10:55:33PM +0300, Michael S. Tsirkin wrote: > On Thu, May 17, 2018 at 03:46:58PM -0300, Eduardo Habkost wrote: > > On Thu, May 17, 2018 at 05:54:24PM +0300, Michael S. Tsirkin wrote: > > > HINTS_DEDICATED seems to be

Re: [PATCH v7 2/2] iommu/amd: Add basic debugfs infrastructure for AMD IOMMU

On 05/18/2018 08:20 AM, Gary R Hook wrote: > On 05/15/2018 08:46 AM, Joerg Roedel wrote: >> On Mon, May 14, 2018 at 03:00:50PM -0500, Gary R Hook wrote: >>> This was brought up a few weeks ago in, I believe, version 3 of this patch. >>> That question was discussed (because that's what I did the

Re: [PATCH v7 2/2] iommu/amd: Add basic debugfs infrastructure for AMD IOMMU

On 05/18/2018 08:20 AM, Gary R Hook wrote: > On 05/15/2018 08:46 AM, Joerg Roedel wrote: >> On Mon, May 14, 2018 at 03:00:50PM -0500, Gary R Hook wrote: >>> This was brought up a few weeks ago in, I believe, version 3 of this patch. >>> That question was discussed (because that's what I did the

Should new code have forward declarations of static functions or not?

Is it preferred to have forward declarations of static funcs, or to omit them altogether? I know that different files in kernel code follow one style or the other. Just wondering if there's a preferred style for new code. Simon

Should new code have forward declarations of static functions or not?

Is it preferred to have forward declarations of static funcs, or to omit them altogether? I know that different files in kernel code follow one style or the other. Just wondering if there's a preferred style for new code. Simon

[PATCH 01/11] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35

Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs. While at it, also add description of the CPU to which the ETM belongs, to make it easier to identify the ETM devices. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose ---

[PATCH 01/11] coresight: ETM: Add support for Arm Cortex-A73 and Cortex-A35

Add ETM PIDs of the Arm cortex-A CPUs to the white list of ETMs. While at it, also add description of the CPU to which the ETM belongs, to make it easier to identify the ETM devices. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etm4x.c | 32

[PATCH 04/11] coresight: tmc-etr: Disallow perf mode

We don't support ETR in perf mode yet. So, don't even try to enable the hardware, even by mistake. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 28 ++--- 1 file

[PATCH 04/11] coresight: tmc-etr: Disallow perf mode

We don't support ETR in perf mode yet. So, don't even try to enable the hardware, even by mistake. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 28 ++--- 1 file changed, 2 insertions(+), 26 deletions(-) diff

[PATCH 03/11] coresight: tmc-etr: Do not clean trace buffer

We zero out the entire trace buffer used for ETR before it is enabled, for helping with debugging. With the addition of scatter-gather mode, the buffer could be bigger and non-contiguous. Get rid of this step; if someone wants to debug, they can always add it as and when needed. Cc: Mathieu

[PATCH 03/11] coresight: tmc-etr: Do not clean trace buffer

We zero out the entire trace buffer used for ETR before it is enabled, for helping with debugging. With the addition of scatter-gather mode, the buffer could be bigger and non-contiguous. Get rid of this step; if someone wants to debug, they can always add it as and when needed. Cc: Mathieu

Re: [PATCH -mm] mm, huge page: Copy to access sub-page last when copy huge page

On 05/17/2018 11:24 PM, Michal Hocko wrote: > On Fri 18-05-18 11:03:16, Huang, Ying wrote: > [...] >> The patch is a generic optimization which should benefit quite some >> workloads, not for a specific use case. To demonstrate the performance >> benefit of the patch, we tested it with

Re: [PATCH -mm] mm, huge page: Copy to access sub-page last when copy huge page

On 05/17/2018 11:24 PM, Michal Hocko wrote: > On Fri 18-05-18 11:03:16, Huang, Ying wrote: > [...] >> The patch is a generic optimization which should benefit quite some >> workloads, not for a specific use case. To demonstrate the performance >> benefit of the patch, we tested it with

Re: [PATCH v3 0/5]

[/me beats himself for not writing a subject line...] On 18/05/18 17:29, Vince Weaver wrote: > On Fri, 18 May 2018, Marc Zyngier wrote: > >> There is also the case of people natively running 32bit kernels on >> 64bit HW and trying to upstream unspeakable hacks, hoping that the >> stars will

Re: [PATCH v5 2/4] Documentation: bindings: add phy_config for Rockchip USB Type-C PHY

On Thu, May 17, 2018 at 05:17:58PM +0800, Lin Huang wrote: > If want to do training outside DP Firmware, need phy voltage swing > and pre_emphasis value. "dt-bindings: phy: ..." for the subject please. > > Signed-off-by: Lin Huang > --- > Changes in v2: > - None > Changes

Re: [PATCH v3 0/5]

[/me beats himself for not writing a subject line...] On 18/05/18 17:29, Vince Weaver wrote: > On Fri, 18 May 2018, Marc Zyngier wrote: > >> There is also the case of people natively running 32bit kernels on >> 64bit HW and trying to upstream unspeakable hacks, hoping that the >> stars will

Re: [PATCH v5 2/4] Documentation: bindings: add phy_config for Rockchip USB Type-C PHY

On Thu, May 17, 2018 at 05:17:58PM +0800, Lin Huang wrote: > If want to do training outside DP Firmware, need phy voltage swing > and pre_emphasis value. "dt-bindings: phy: ..." for the subject please. > > Signed-off-by: Lin Huang > --- > Changes in v2: > - None > Changes in v3: > - modify

[PATCH 07/11] dts: juno: Add scatter-gather support for all revisions

Advertise that the scatter-gather is properly integrated on all revisions of Juno board. Cc: Mathieu Poirier Cc: Sudeep Holla Cc: Liviu Dudau Cc: Lorenzo Pieralisi Signed-off-by: Suzuki K Poulose

[PATCH 05/11] coresight: Add helper for inserting synchronization packets

Right now we open code filling the trace buffer with synchronization packets when the circular buffer wraps around in different drivers. Move this to a common place. While at it, clean up the barrier_pkt array to strip off the trailing '\0'. Cc: Mathieu Poirier Cc:

[PATCH 07/11] dts: juno: Add scatter-gather support for all revisions

Advertise that the scatter-gather is properly integrated on all revisions of Juno board. Cc: Mathieu Poirier Cc: Sudeep Holla Cc: Liviu Dudau Cc: Lorenzo Pieralisi Signed-off-by: Suzuki K Poulose --- arch/arm64/boot/dts/arm/juno-base.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git

[PATCH 05/11] coresight: Add helper for inserting synchronization packets

Right now we open code filling the trace buffer with synchronization packets when the circular buffer wraps around in different drivers. Move this to a common place. While at it, clean up the barrier_pkt array to strip off the trailing '\0'. Cc: Mathieu Poirier Cc: Mike Leach Signed-off-by:

[PATCH 09/11] coresight: Add support for TMC ETR SG unit

This patch adds support for setting up an SG table used by the TMC ETR inbuilt SG unit. The TMC ETR uses 4K page sized tables to hold pointers to the 4K data pages with the last entry in a table pointing to the next table with the entries, by kind of chaining. The 2 LSBs determine the type of the

[PATCH 09/11] coresight: Add support for TMC ETR SG unit

This patch adds support for setting up an SG table used by the TMC ETR inbuilt SG unit. The TMC ETR uses 4K page sized tables to hold pointers to the 4K data pages with the last entry in a table pointing to the next table with the entries, by kind of chaining. The 2 LSBs determine the type of the

[PATCH 10/11] coresight: tmc-etr: Add transparent buffer management

At the moment we always use contiguous memory for TMC ETR tracing when used from sysfs. The size of the buffer is fixed at boot time and can only be changed by modifiying the DT. With the introduction of SG support we could support really large buffers in that mode. This patch abstracts the buffer

[PATCH 11/11] coresight: tmc: Add configuration support for trace buffer size

Now that we can dynamically switch between contiguous memory and SG table depending on the trace buffer size, provide the support for selecting an appropriate buffer size. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose ---

[PATCH 11/11] coresight: tmc: Add configuration support for trace buffer size

Now that we can dynamically switch between contiguous memory and SG table depending on the trace buffer size, provide the support for selecting an appropriate buffer size. Cc: Mathieu Poirier Signed-off-by: Suzuki K Poulose --- .../ABI/testing/sysfs-bus-coresight-devices-tmc| 8 ++

[PATCH 10/11] coresight: tmc-etr: Add transparent buffer management

At the moment we always use contiguous memory for TMC ETR tracing when used from sysfs. The size of the buffer is fixed at boot time and can only be changed by modifiying the DT. With the introduction of SG support we could support really large buffers in that mode. This patch abstracts the buffer

[PATCH 08/11] coresight: Add generic TMC sg table framework

This patch introduces a generic sg table data structure and associated operations. An SG table can be used to map a set of Data pages where the trace data could be stored by the TMC ETR. The information about the data pages could be stored in different formats, depending on the type of the

[PATCH 08/11] coresight: Add generic TMC sg table framework

This patch introduces a generic sg table data structure and associated operations. An SG table can be used to map a set of Data pages where the trace data could be stored by the TMC ETR. The information about the data pages could be stored in different formats, depending on the type of the

[PATCH 06/11] dts: bindings: Restrict coresight tmc-etr scatter-gather mode

We are about to add the support for ETR builtin scatter-gather mode for dealing with large amount of trace buffers. However, on some of the platforms, using the ETR SG mode can lock up the system due to the way the ETR is connected to the memory subsystem. In SG mode, the ETR performs READ from

[PATCH 06/11] dts: bindings: Restrict coresight tmc-etr scatter-gather mode

We are about to add the support for ETR builtin scatter-gather mode for dealing with large amount of trace buffers. However, on some of the platforms, using the ETR SG mode can lock up the system due to the way the ETR is connected to the memory subsystem. In SG mode, the ETR performs READ from

[PATCH 00/11] coresight: tmc-etr Transparent buffer management

This series is split of the Coresight ETR perf support patches posted here [0]. The CATU support and perf backend support will be posted as separate series for better management and review of the patches. This series adds the support for TMC ETR Scatter-Gather mode to allow using physical

[PATCH 00/11] coresight: tmc-etr Transparent buffer management

This series is split of the Coresight ETR perf support patches posted here [0]. The CATU support and perf backend support will be posted as separate series for better management and review of the patches. This series adds the support for TMC ETR Scatter-Gather mode to allow using physical

[PATCH 02/11] coresight: tmc: Hide trace buffer handling for file read

At the moment we adjust the buffer pointers for reading the trace data via misc device in the common code for ETF/ETB and ETR. Since we are going to change how we manage the buffer for ETR, let us move the buffer manipulation to the respective driver files, hiding it from the common code. We do so

[PATCH 02/11] coresight: tmc: Hide trace buffer handling for file read

At the moment we adjust the buffer pointers for reading the trace data via misc device in the common code for ETF/ETB and ETR. Since we are going to change how we manage the buffer for ETR, let us move the buffer manipulation to the respective driver files, hiding it from the common code. We do so

Re: [PATCH] net: ethernet: ti: cpsw: fix packet leaking in dual_mac mode

On 05/17/2018 02:10 PM, Greg Kroah-Hartman wrote: On Thu, May 17, 2018 at 11:18:16PM +0530, Naresh Kamboju wrote: On 2 May 2018 at 20:38, David Miller wrote: From: Grygorii Strashko Date: Tue, 1 May 2018 12:41:22 -0500 Signed-off-by:

Re: [PATCH] net: ethernet: ti: cpsw: fix packet leaking in dual_mac mode

On 05/17/2018 02:10 PM, Greg Kroah-Hartman wrote: On Thu, May 17, 2018 at 11:18:16PM +0530, Naresh Kamboju wrote: On 2 May 2018 at 20:38, David Miller wrote: From: Grygorii Strashko Date: Tue, 1 May 2018 12:41:22 -0500 Signed-off-by: Grygorii Strashko Applied and queued up for

Re: [PATCH v5 4/4] drm/rockchip: support dp training outside dp firmware

Am Freitag, 18. Mai 2018, 17:36:56 CEST schrieb Sean Paul: > On Fri, May 18, 2018 at 10:52:17AM +0200, Heiko Stuebner wrote: > > Am Freitag, 18. Mai 2018, 03:45:46 CEST schrieb Brian Norris: > > > On Thu, May 17, 2018 at 6:41 PM, hl wrote: > > > > On Thursday, May 17, 2018

Re: [PATCH v5 4/4] drm/rockchip: support dp training outside dp firmware

Am Freitag, 18. Mai 2018, 17:36:56 CEST schrieb Sean Paul: > On Fri, May 18, 2018 at 10:52:17AM +0200, Heiko Stuebner wrote: > > Am Freitag, 18. Mai 2018, 03:45:46 CEST schrieb Brian Norris: > > > On Thu, May 17, 2018 at 6:41 PM, hl wrote: > > > > On Thursday, May 17, 2018 09:51 PM, Sean Paul

Re: [PATCH v5 3/9] dt-bindings: input: touchscreen: add minimum pressure touchscreen property

On Thu, May 10, 2018 at 01:45:08PM +0300, Eugen Hristev wrote: > Add a common touchscreen optional property that will specify > the minimum pressure applied to the screen that is needed > such that the driver will report the touch event. > > Signed-off-by: Eugen Hristev

Re: [PATCH v5 3/9] dt-bindings: input: touchscreen: add minimum pressure touchscreen property

On Thu, May 10, 2018 at 01:45:08PM +0300, Eugen Hristev wrote: > Add a common touchscreen optional property that will specify > the minimum pressure applied to the screen that is needed > such that the driver will report the touch event. > > Signed-off-by: Eugen Hristev > --- > Changes in v5: >

Re: [PATCH v6 2/4] rtc: ds1307: support m41t11 variant

On Wed, May 16, 2018 at 11:08:40PM +0200, Giulio Benetti wrote: > The m41t11 variant is very similar to the already supported m41t00 and > m41t0, but it has also 56 bytes of NVRAM. > > Add it to driver taking into account NVRAM section. > > Signed-off-by: Giulio Benetti

Re: [PATCH v6 2/4] rtc: ds1307: support m41t11 variant

On Wed, May 16, 2018 at 11:08:40PM +0200, Giulio Benetti wrote: > The m41t11 variant is very similar to the already supported m41t00 and > m41t0, but it has also 56 bytes of NVRAM. > > Add it to driver taking into account NVRAM section. > > Signed-off-by: Giulio Benetti > --- >

Re: [PATCH] audit: add containerid support for IMA-audit

On Fri, 2018-05-18 at 11:56 -0400, Richard Guy Briggs wrote: > On 2018-05-18 10:39, Mimi Zohar wrote: > > On Fri, 2018-05-18 at 09:54 -0400, Stefan Berger wrote: > > > On 05/18/2018 08:53 AM, Mimi Zohar wrote: > > > > [..] > > > > > If so, which ones? We could probably refactor the current

Re: [PATCH v5 3/4] phy: rockchip-typec: support variable phy config value

Hi, Am Donnerstag, 17. Mai 2018, 11:17:59 CEST schrieb Lin Huang: > the phy config values used to fix in dp firmware, but some boards > need change these values to do training and get the better eye diagram > result. So support that in phy driver. > > Signed-off-by: Chris Zhong

Re: [PATCH] audit: add containerid support for IMA-audit

On Fri, 2018-05-18 at 11:56 -0400, Richard Guy Briggs wrote: > On 2018-05-18 10:39, Mimi Zohar wrote: > > On Fri, 2018-05-18 at 09:54 -0400, Stefan Berger wrote: > > > On 05/18/2018 08:53 AM, Mimi Zohar wrote: > > > > [..] > > > > > If so, which ones? We could probably refactor the current

Re: [PATCH v5 3/4] phy: rockchip-typec: support variable phy config value

Hi, Am Donnerstag, 17. Mai 2018, 11:17:59 CEST schrieb Lin Huang: > the phy config values used to fix in dp firmware, but some boards > need change these values to do training and get the better eye diagram > result. So support that in phy driver. > > Signed-off-by: Chris Zhong > Signed-off-by:

Re: [PATCH v6 8/9] counter: stm32-lptimer: add counter device

On Wed, May 16, 2018 at 01:52:27PM -0400, William Breathitt Gray wrote: > From: Fabrice Gasnier > > Add support for new counter device to stm32-lptimer. > > Signed-off-by: Fabrice Gasnier > Signed-off-by: William Breathitt Gray

Re: [PATCH v6 8/9] counter: stm32-lptimer: add counter device

On Wed, May 16, 2018 at 01:52:27PM -0400, William Breathitt Gray wrote: > From: Fabrice Gasnier > > Add support for new counter device to stm32-lptimer. > > Signed-off-by: Fabrice Gasnier > Signed-off-by: William Breathitt Gray > --- > .../{iio => }/counter/stm32-lptimer-cnt.txt | 0 >

Re: [PATCH 00/10] Misc block layer patches for bcachefs

On 5/18/18 10:23 AM, Christoph Hellwig wrote: > On Fri, May 11, 2018 at 03:13:38PM -0600, Jens Axboe wrote: >> Looked over the series, and looks like both good cleanups and optimizations. >> If we can get the mempool patch sorted, I can apply this for 4.18. > > FYI, I agree on the actual cleanups

Re: [PATCH 00/10] Misc block layer patches for bcachefs

On 5/18/18 10:23 AM, Christoph Hellwig wrote: > On Fri, May 11, 2018 at 03:13:38PM -0600, Jens Axboe wrote: >> Looked over the series, and looks like both good cleanups and optimizations. >> If we can get the mempool patch sorted, I can apply this for 4.18. > > FYI, I agree on the actual cleanups

[PATCH] tc-testing: fix ip address in u32 test

Fix expected ip address to actually match configured ip address. Fix test to expect single matched filter. Signed-off-by: Vlad Buslov --- tools/testing/selftests/tc-testing/tc-tests/filters/tests.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

[PATCH] tc-testing: fix ip address in u32 test

Fix expected ip address to actually match configured ip address. Fix test to expect single matched filter. Signed-off-by: Vlad Buslov --- tools/testing/selftests/tc-testing/tc-tests/filters/tests.json | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git

Re: [PATCH 2/6] x86: bug: prevent gcc distortions

Borislav Petkov wrote: > On Fri, May 18, 2018 at 03:46:33PM +, Nadav Amit wrote: >> In case you didn’t read the cover-letter: the patch-set does give a 2% >> performance improvement for #PF-MADV_DONTNEED microbenchmark loop. > > I saw it but *micro*-benchmark doesn't tell me

Re: [PATCH 2/6] x86: bug: prevent gcc distortions

Borislav Petkov wrote: > On Fri, May 18, 2018 at 03:46:33PM +, Nadav Amit wrote: >> In case you didn’t read the cover-letter: the patch-set does give a 2% >> performance improvement for #PF-MADV_DONTNEED microbenchmark loop. > > I saw it but *micro*-benchmark doesn't tell me a whole lot. If

Re: [PATCH v3 0/5]

On Fri, 18 May 2018, Marc Zyngier wrote: > There is also the case of people natively running 32bit kernels on > 64bit HW and trying to upstream unspeakable hacks, hoping that the > stars will align and that they'll win the lottery (see [1]). I've tested these patches on a Raspberry Pi 3B running

Re: [PATCH v3 0/5]

On Fri, 18 May 2018, Marc Zyngier wrote: > There is also the case of people natively running 32bit kernels on > 64bit HW and trying to upstream unspeakable hacks, hoping that the > stars will align and that they'll win the lottery (see [1]). I've tested these patches on a Raspberry Pi 3B running

Re: [PATCH v6 6/9] dt-bindings: counter: Document stm32 quadrature encoder

On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: > 2018-05-17 18:23 GMT+02:00 Rob Herring : > > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray > > wrote: > >> From: Benjamin Gaignard > > > > v6?

Re: [PATCH v6 6/9] dt-bindings: counter: Document stm32 quadrature encoder

On Thu, May 17, 2018 at 08:59:40PM +0200, Benjamin Gaignard wrote: > 2018-05-17 18:23 GMT+02:00 Rob Herring : > > On Wed, May 16, 2018 at 12:51 PM, William Breathitt Gray > > wrote: > >> From: Benjamin Gaignard > > > > v6? Where's v1-v5? > > > >> Add bindings for STM32 Timer quadrature encoder.

[PATCH] uprobes/x86: remove the wrong WARN_ON() in uprobe_init_insn()

insn_get_length() has the side-effect of processing the entire instruction but only if it was decoded successfully, otherwise insn_complete() can fail and in this case we need to just return an error without warning. Reported-by: syzbot+30d675e3ca03c1c35...@syzkaller.appspotmail.com

[PATCH] uprobes/x86: remove the wrong WARN_ON() in uprobe_init_insn()

insn_get_length() has the side-effect of processing the entire instruction but only if it was decoded successfully, otherwise insn_complete() can fail and in this case we need to just return an error without warning. Reported-by: syzbot+30d675e3ca03c1c35...@syzkaller.appspotmail.com

Re: [PATCH] scsi: snic: fix a couple of spelling mistakes: "COMPLETE"

Colin, > Trivial fix to spelling mistakes/typos: > "SNIC_IOREQ_ABTS_COMPELTE" -> "SNIC_IOREQ_ABTS_COMPLETE" > "SNIC_IOREQ_LR_COMPELTE" -> "SNIC_IOREQ_LR_COMPLETE" > "SNIC_IOREQ_CMD_COMPELTE" -> "SNIC_IOREQ_CMD_COMPLETE" Applied to 4.18/scsi-queue. Thanks! -- Martin K. Petersen Oracle

Re: [PATCH] scsi: snic: fix a couple of spelling mistakes: "COMPLETE"

Colin, > Trivial fix to spelling mistakes/typos: > "SNIC_IOREQ_ABTS_COMPELTE" -> "SNIC_IOREQ_ABTS_COMPLETE" > "SNIC_IOREQ_LR_COMPELTE" -> "SNIC_IOREQ_LR_COMPLETE" > "SNIC_IOREQ_CMD_COMPELTE" -> "SNIC_IOREQ_CMD_COMPLETE" Applied to 4.18/scsi-queue. Thanks! -- Martin K. Petersen Oracle

Re: [PATCH] scsi: qlogicpti: Fix an error handling path in 'qpti_sbus_probe()'

Christophe, > The 'free_irq()' call is not at the right place in the error handling > path. The changed order has been introduced in commit 3d4253d9afab > ("[SCSI] qlogicpti: Convert to new SBUS device framework.") Applied to 4.18/scsi-queue. Thanks! -- Martin K. Petersen Oracle Linux

Re: [PATCH] scsi: qlogicpti: Fix an error handling path in 'qpti_sbus_probe()'

Christophe, > The 'free_irq()' call is not at the right place in the error handling > path. The changed order has been introduced in commit 3d4253d9afab > ("[SCSI] qlogicpti: Convert to new SBUS device framework.") Applied to 4.18/scsi-queue. Thanks! -- Martin K. Petersen Oracle Linux

Re: [RFC PATCH] PM / devfreq: Add policy notifier

On Fri, May 18, 2018 at 08:26:30AM +0900, Chanwoo Choi wrote: > Hi, > > On 2018년 05월 18일 08:07, Matthias Kaehlcke wrote: > > Hi, > > > > On Thu, May 17, 2018 at 11:01:34AM +0900, Chanwoo Choi wrote: > >> Hi, > >> > >> Could you give some use-case of DEVFREQ_POLICY_NOTIFIER > >> or send use-case

Re: [RFC PATCH] PM / devfreq: Add policy notifier

On Fri, May 18, 2018 at 08:26:30AM +0900, Chanwoo Choi wrote: > Hi, > > On 2018년 05월 18일 08:07, Matthias Kaehlcke wrote: > > Hi, > > > > On Thu, May 17, 2018 at 11:01:34AM +0900, Chanwoo Choi wrote: > >> Hi, > >> > >> Could you give some use-case of DEVFREQ_POLICY_NOTIFIER > >> or send use-case

Re: [PATCH v5 2/4] Documentation: bindings: add phy_config for Rockchip USB Type-C PHY

Am Donnerstag, 17. Mai 2018, 11:17:58 CEST schrieb Lin Huang: > If want to do training outside DP Firmware, need phy voltage swing > and pre_emphasis value. > > Signed-off-by: Lin Huang > --- > Changes in v2: > - None > Changes in v3: > - modify property description and add

Re: [PATCH v5 2/4] Documentation: bindings: add phy_config for Rockchip USB Type-C PHY

Am Donnerstag, 17. Mai 2018, 11:17:58 CEST schrieb Lin Huang: > If want to do training outside DP Firmware, need phy voltage swing > and pre_emphasis value. > > Signed-off-by: Lin Huang > --- > Changes in v2: > - None > Changes in v3: > - modify property description and add this property to

Re: [PATCH 2/6] x86: bug: prevent gcc distortions

On Fri, May 18, 2018 at 12:59 AM Peter Zijlstra wrote: > This is an awesome hack, but is there really nothing we can do to make > it more readable? Esp, that global asm doing the macro definition is a > pain to read. I actually find that macro to be *more* legible than

Re: [PATCH 2/6] x86: bug: prevent gcc distortions

On Fri, May 18, 2018 at 12:59 AM Peter Zijlstra wrote: > This is an awesome hack, but is there really nothing we can do to make > it more readable? Esp, that global asm doing the macro definition is a > pain to read. I actually find that macro to be *more* legible than what we do now, although

Re: [PATCH 00/10] Misc block layer patches for bcachefs

On Fri, May 11, 2018 at 03:13:38PM -0600, Jens Axboe wrote: > Looked over the series, and looks like both good cleanups and optimizations. > If we can get the mempool patch sorted, I can apply this for 4.18. FYI, I agree on the actual cleanups and optimization, but we really shouldn't add new

Re: [PATCH 00/10] Misc block layer patches for bcachefs

On Fri, May 11, 2018 at 03:13:38PM -0600, Jens Axboe wrote: > Looked over the series, and looks like both good cleanups and optimizations. > If we can get the mempool patch sorted, I can apply this for 4.18. FYI, I agree on the actual cleanups and optimization, but we really shouldn't add new

Re: mmotm 2018-05-17-16-26 uploaded (autofs)

On 05/17/2018 11:09 PM, Ian Kent wrote: > On 18/05/18 12:38, Ian Kent wrote: >> On 18/05/18 12:23, Randy Dunlap wrote: >>> On 05/17/2018 08:50 PM, Ian Kent wrote: On 18/05/18 08:21, Randy Dunlap wrote: > On 05/17/2018 04:26 PM, a...@linux-foundation.org wrote: >> The mm-of-the-moment

Re: mmotm 2018-05-17-16-26 uploaded (autofs)

On 05/17/2018 11:09 PM, Ian Kent wrote: > On 18/05/18 12:38, Ian Kent wrote: >> On 18/05/18 12:23, Randy Dunlap wrote: >>> On 05/17/2018 08:50 PM, Ian Kent wrote: On 18/05/18 08:21, Randy Dunlap wrote: > On 05/17/2018 04:26 PM, a...@linux-foundation.org wrote: >> The mm-of-the-moment

[PATCH] tc-testing: flush gact actions on test teardown

Test 6fb4 creates one mirred and one pipe action, but only flushes mirred on teardown. Leaking pipe action causes failures in other tests. Add additional teardown command to also flush gact actions. Signed-off-by: Vlad Buslov ---

[PATCH] tc-testing: flush gact actions on test teardown

Test 6fb4 creates one mirred and one pipe action, but only flushes mirred on teardown. Leaking pipe action causes failures in other tests. Add additional teardown command to also flush gact actions. Signed-off-by: Vlad Buslov --- tools/testing/selftests/tc-testing/tc-tests/actions/mirred.json

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