* Pavel Machek [190826 22:14]:
> On Mon 2019-08-26 14:58:22, Tony Lindgren wrote:
> > Hi,
> >
> > * Dan Murphy [190820 19:53]:
> > > Fix the brightness control for I2C mode. Instead of
> > > changing the full scale current register update the ALS target
> > > register for the appropriate
Em Mon, Aug 26, 2019 at 07:14:19PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Aug 26, 2019 at 06:58:52PM +0200, Jiri Olsa escreveu:
> > On Mon, Aug 26, 2019 at 01:18:49PM -0300, Arnaldo Carvalho de Melo wrote:
> >
> > SNIP
> >
> > > [perfbuilder@490c2c7bdaab ~]$ grep 'printf("lost'
> >
Hi Neil,
On Mon, Aug 26, 2019 at 10:10 AM Neil Armstrong wrote:
>
> On 25/08/2019 23:10, Martin Blumenstingl wrote:
> > Hi Neil,
> >
> > thank you for this update
> > I haven't tried this on the 32-bit SoCs yet, but I am confident that I
> > can make it work by "just" adding the SoC specific
Hi Thomas,
The following changes since commit 3e2d94535adb2df15f3907e4b4c7cd8a5a4c2b5a:
clocksource/drivers/hyperv: Enable TSC page clocksource on 32bit
(2019-08-23 16:59:54 +0200)
are available in the Git repository at:
https://git.linaro.org/people/daniel.lezcano/linux.git
On 26.08.19 09:34, Alexandre Ghiti wrote:
On 6/20/19 7:03 AM, Alexandre Ghiti wrote:
This series fixes the fallback of the top-down mmap: in case of
failure, a bottom-up scheme can be tried as a last resort between
the top-down mmap base and the stack, hoping for a large unused stack
limit.
Hi Petr,
AndreaP responded with some explanation (and great links!) on the topic
of READ_ONCE. But I feel like your comments about the WRITE_ONCE were
not addressed. I address that (and your other comments) below...
On 2019-08-23, Petr Mladek wrote:
>> --- /dev/null
>> +++
On 8/20/19 7:56 AM, shuah wrote:
On 8/20/19 12:58 AM, Nathan Royce wrote:
While your mention of quirks-table.h certainly had possibilities, I'm
afraid adding the "AU0828_DEVICE(0x05e1, 0x0400, "Hauppauge",
"Woodbury")," entry for my tuner did not make any difference regarding
the "Tuner is
On 26/08/2019 22:59, Thomas Gleixner wrote:
> On Mon, 26 Aug 2019, Daniel Lezcano wrote:
>
>> The following changes since commit 08a3c192c93f4359a94bf47971e55b0324b72b8b:
>>
>> posix-timers: Prepare for PREEMPT_RT (2019-08-01 20:51:25 +0200)
>>
>> are available in the Git repository at:
>>
>>
On 8/26/19 11:47 AM, Andrew Lunn wrote:
> On Tue, Aug 27, 2019 at 09:45:20AM +0800, Voon Weifeng wrote:
>> From: "Chuah, Kim Tatt"
>>
>> DW EQoS v5.xx controllers added capability for interrupt generation
>> when MDIO interface is done (GMII Busy bit is cleared).
>> This patch adds support for
According to the ACPI 6.3 specification, the _PSD method is optional
when using CPPC. The underlying assumption is that each CPU can change
frequency independently from all other CPUs; _PSD is provided to tell
the OS that some processors can NOT do that.
However, the acpi_get_psd() function
On Wed, Aug 21, 2019 at 09:09:20PM +0200, Thomas Gleixner wrote:
> With the array based samples and expiry cache, the expiry function can use
> a loop to collect timers from the clock specific lists.
>
> Signed-off-by: Thomas Gleixner
Reviewed-by: Frederic Weisbecker
On Mon, 26 Aug 2019, Cristian Marussi wrote:
> On 8/26/19 4:32 PM, Christoph Hellwig wrote:
> > > +config ARCH_USE_COMMON_SMP_STOP
> > > + def_bool y if SMP
> >
> > The option belongs into common code and the arch code shoud only
> > select it.
> >
>
> In fact that was my first approach, but
On Mon 29 Jul 11:31 PDT 2019, Paul Cercueil wrote:
> This driver is used to boot, communicate with and load firmwares to the
> MIPS co-processor found in the VPU hardware of the JZ47xx SoCs from
> Ingenic.
>
> Signed-off-by: Paul Cercueil
> ---
>
> Notes:
> v2: Remove exception for
Hi, Peter,
On Mon, Aug 26, 2019 at 09:42:15AM +0200, Peter Zijlstra wrote:
> On Sun, Aug 25, 2019 at 09:23:22PM +0800, Changbin Du wrote:
> > Add generic DWARF constant definitions. We will use it later.
> >
> > Signed-off-by: Changbin Du
> > ---
> > include/asm-generic/dwarf.h | 199
On Mon 2019-08-26 14:58:22, Tony Lindgren wrote:
> Hi,
>
> * Dan Murphy [190820 19:53]:
> > Fix the brightness control for I2C mode. Instead of
> > changing the full scale current register update the ALS target
> > register for the appropriate banks.
> >
> > In addition clean up some code
Em Mon, Aug 26, 2019 at 06:58:52PM +0200, Jiri Olsa escreveu:
> On Mon, Aug 26, 2019 at 01:18:49PM -0300, Arnaldo Carvalho de Melo wrote:
>
> SNIP
>
> > [perfbuilder@490c2c7bdaab ~]$ grep 'printf("lost'
> > /tmp/build/perf/builtin-sched.i
> > printf("lost %" "l" "ll""u" " events on cpu %d\n",
Em Mon, Aug 26, 2019 at 10:57:58AM -0700, Andi Kleen escreveu:
> >
> > >
> > > All those are already merged, after long reviewing phases and lots of
> > > testing, right?
> >
> > Right. These changes now constitute parts of the Linux kernel source tree.
>
> Might be better to focus on future
Em Mon, Aug 26, 2019 at 06:47:34PM +0200, Jiri Olsa escreveu:
> On Mon, Aug 26, 2019 at 12:41:38PM -0300, Arnaldo Carvalho de Melo wrote:
> > Em Sun, Aug 25, 2019 at 08:17:40PM +0200, Jiri Olsa escreveu:
> > > hi,
> > > as a preparation for sampling libperf interface, moving event
> > >
On Mon, Aug 26, 2019 at 05:42:42PM +0300, Mika Westerberg wrote:
> On Mon, Aug 26, 2019 at 09:07:12AM -0500, Bjorn Helgaas wrote:
> > On Mon, Aug 26, 2019 at 01:17:26PM +0300, Mika Westerberg wrote:
> > > On Fri, Aug 23, 2019 at 09:12:54PM -0500, Bjorn Helgaas wrote:
> > > > But the "wait
Hi,
* Dan Murphy [190820 19:53]:
> Fix the brightness control for I2C mode. Instead of
> changing the full scale current register update the ALS target
> register for the appropriate banks.
>
> In addition clean up some code errors and random misspellings found
> during coding.
>
> Tested on
On Wed, Aug 21, 2019 at 09:09:19PM +0200, Thomas Gleixner wrote:
> Deactivation of the expiry cache is done by setting all clock caches to
> 0. That requires to have a check for zero in all places which update the
> expiry cache:
>
> if (cache == 0 || new < cache)
> cache =
Hi,
On Mon, Aug 26, 2019 at 6:01 AM Chuan Hua, Lei
wrote:
>
> Hi Martin,
>
> Thanks for your comment.
thank you for the quick reply
> On 8/25/2019 5:11 AM, Martin Blumenstingl wrote:
> > Hi Dilip,
> >
> >> Add driver for the reset controller present on Intel
> >> Lightening Mountain (LGM) SoC
On Mon, 26 Aug 2019, Frederic Weisbecker wrote:
> On Wed, Aug 21, 2019 at 09:09:15PM +0200, Thomas Gleixner wrote:
> > @@ -884,7 +888,7 @@ static void check_process_timers(struct
> > struct list_head *firing)
> > {
> > struct signal_struct *const sig =
On Wed, Aug 21, 2019 at 09:09:18PM +0200, Thomas Gleixner wrote:
> The comment above the function which arms RLIMIT_CPU in the posix CPU timer
> code makes no sense at all. It claims that the kernel does not return an
> error code when it rejected the attempt to set RLIMIT_CPU. That's clearly
>
On 8/21/19 9:23 PM, Naveen N. Rao wrote:
Since BPF constant blinding is performed after the verifier pass, the
ALU32 instructions inserted for doubleword immediate loads don't have a
corresponding zext instruction. This is causing a kernel oops on powerpc
and can be reproduced by running
[ add Jan ]
On Mon, Aug 26, 2019 at 1:58 PM Vivek Goyal wrote:
>
> On Mon, Aug 26, 2019 at 04:33:26PM -0400, Vivek Goyal wrote:
> > On Mon, Aug 26, 2019 at 04:53:16AM -0700, Christoph Hellwig wrote:
> > > On Wed, Aug 21, 2019 at 01:57:03PM -0400, Vivek Goyal wrote:
> > > > Right now
On 8/26/19 4:06 AM, Greg Kroah-Hartman wrote:
>
> Can you provide backports that work if they really are needed?
>
It seems they aren't needed.
Sorry about the noise.
--
Gustavo
On Mon, 2019-08-26 at 14:17 -0700, Palmer Dabbelt wrote:
> On Sun, 18 Aug 2019 21:49:01 PDT (-0700), a...@brainfault.org wrote:
> > On Sun, Aug 18, 2019 at 11:49 PM Christoph Hellwig <
> > h...@infradead.org> wrote:
> > > > +#define FIXADDR_TOP (VMALLOC_START)
> > >
> > > Nit: no need for
There is something wrong with the clock on the computer you are
posting these patches from, the date in these postings are in the
future by several hours.
This messes up the ordering of changes in patchwork and makes my life
miserable to a certain degree, so please fix this.
Thank you.
Quoting Stephen Boyd (2019-08-21 11:10:08)
> Quoting Stephen Boyd (2019-07-29 15:46:51)
> > Quoting Bjorn Andersson (2019-07-22 22:14:46)
> > > As clocks are registered their parents are resolved and the parent_map
> > > is updated to cache the clk_core objects of each existing parent.
> > > But
Quoting Vinod Koul (2019-08-26 10:42:33)
> RPM clock controller has parent as xo, so specify that in DT node for
> rpmhcc
>
> Signed-off-by: Vinod Koul
> ---
Reviewed-by: Stephen Boyd
I'm looking into a linkage failure for one of our device kernels, and
it seems that genksyms isn't producing a hash value correctly for
aggregate definitions that contain __attribute__s like
__attribute__((packed)).
Example:
$ echo 'struct foo { int bar; };' | ./scripts/genksyms/genksyms -d
Defn
The return value of of_parse_clkspec() is peculiar. If the function is
called with a NULL argument for 'name' it will return -ENOENT, but if
it's called with a non-NULL argument for 'name' it will return -EINVAL.
This peculiarity is documented by commit 5c56dfe63b6e ("clk: Add comment
about
On Wed, Aug 21, 2019 at 09:09:17PM +0200, Thomas Gleixner wrote:
> The RTIME limit expiry code does not check the hard RTTIME limit for
> INFINITY, i.e. being disabled. Add it.
>
> While this could be considered an ABI breakage if something would depend on
> this behaviour. Though it's highly
On Sun, 18 Aug 2019 21:49:01 PDT (-0700), a...@brainfault.org wrote:
On Sun, Aug 18, 2019 at 11:49 PM Christoph Hellwig wrote:
> +#define FIXADDR_TOP (VMALLOC_START)
Nit: no need for the braces, the definitions below don't use it
either.
Sure, I will update and send v2 soon.
>
Hello,
On Mon, Aug 26, 2019 at 5:31 AM Chuan Hua, Lei
wrote:
>
> Hi Martin,
>
> Thanks for your valuable comments. I reply some of them as below.
you're welcome
[...]
> >> +config PCIE_INTEL_AXI
> >> +bool "Intel AHB/AXI PCIe host controller support"
> > I believe that this is mostly
Hi,
On Mon, Oct 08, 2018 at 10:32:45AM -0400, Boris Ostrovsky wrote:
> On 10/3/18 11:51 AM, Pasi Kärkkäinen wrote:
> > On Wed, Sep 19, 2018 at 11:05:26AM +0200, Roger Pau Monné wrote:
> >> On Tue, Sep 18, 2018 at 02:09:53PM -0400, Boris Ostrovsky wrote:
> >>> On 9/18/18 5:32 AM, George Dunlap
On Wed, Aug 21, 2019 at 09:09:16PM +0200, Thomas Gleixner wrote:
> That allows more simplifications in various places.
>
> Signed-off-by: Thomas Gleixner
Reviewed-by: Frederic Weisbecker
On Fri, 2019-08-23 at 15:56 -0400, Qian Cai wrote:
> In file included from ./arch/powerpc/include/asm/paca.h:15,
> from ./arch/powerpc/include/asm/current.h:13,
> from ./include/linux/thread_info.h:21,
> from ./include/asm-generic/preempt.h:5,
>
Hrmm.. the subject is misleading. Let me reword it and resend.
Quoting Stephen Boyd (2019-08-19 15:29:15)
> The return value of of_parse_clkspec() is peculiar. If the function is
> called with a NULL argument for 'name' it will return -ENOENT, but if
> it's called with a non-NULL argument for
On Wed, Aug 21, 2019 at 09:09:15PM +0200, Thomas Gleixner wrote:
> @@ -884,7 +888,7 @@ static void check_process_timers(struct
>struct list_head *firing)
> {
> struct signal_struct *const sig = tsk->signal;
> - struct list_head *timers =
Replace preprocessor macro aliases for legacy LED registration helpers
with inline functions. It will allow to avoid misleading compiler error
messages about missing symbol that actually wasn't explicitly used
in the code. It used to occur when CONFIG_LEDS_CLASS was undefined
and legacy (non-ext)
On Mon, 26 Aug 2019, Daniel Lezcano wrote:
> The following changes since commit 08a3c192c93f4359a94bf47971e55b0324b72b8b:
>
> posix-timers: Prepare for PREEMPT_RT (2019-08-01 20:51:25 +0200)
>
> are available in the Git repository at:
>
>
On Mon, Aug 26, 2019 at 04:33:26PM -0400, Vivek Goyal wrote:
> On Mon, Aug 26, 2019 at 04:53:16AM -0700, Christoph Hellwig wrote:
> > On Wed, Aug 21, 2019 at 01:57:03PM -0400, Vivek Goyal wrote:
> > > Right now dax_writeback_mapping_range() is passed a bdev and dax_dev
> > > is searched from that
On Wed, May 29, 2019 at 08:36:47PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
>
> Introduce task_struct::core_cookie as an opaque identifier for core
> scheduling. When enabled; core scheduling will only allow matching
> task to be on the core; where idle matches everything.
>
From: Hayes Wang
Date: Mon, 26 Aug 2019 09:43:32 +
> Jiri Slaby [mailto:jsl...@suse.cz]
>> Sent: Monday, August 26, 2019 4:55 PM
> [...]
>> Could you clarify *why* it conflicts? And how is the problem fixed by
>> 0ee1f473496 avoided now?
>
> In rtl8152_disconnect(), the flow would be as
Quoting Amit Kucheria (2019-08-21 05:55:39)
> On Mon, Aug 19, 2019 at 7:57 PM Stephen Boyd wrote:
> >
> > Quoting Amit Kucheria (2019-08-19 00:58:23)
> > > On Sat, Aug 17, 2019 at 9:37 AM Stephen Boyd wrote:
> > > > > +
> > > > > +static void tsens_debug_init(struct platform_device *pdev)
> > >
> On Aug 26, 2019, at 8:08 AM, Song Liu wrote:
>
>
>
>> On Aug 26, 2019, at 2:23 AM, Peter Zijlstra wrote:
>>
>> So only the high mapping is ever executable; the identity map should not
>> be. Both should be RO.
>>
>>> kprobe (with CONFIG_KPROBES_ON_FTRACE) should work on kernel identity
Alex,
On 8/19/2019 5:42 AM, Alexander Graf wrote:
>
>
> On 15.08.19 18:25, Suthikulpanit, Suravee wrote:
>> ACK notifiers don't work with AMD SVM w/ AVIC when the PIT interrupt
>> is delivered as edge-triggered fixed interrupt since AMD processors
>> cannot exit on EOI for these interrupts.
>>
From: Jon Hunter
Deferred probe is an expected return value for clk_get() on many
platforms. The driver deals with it properly, so there's no need
to output a warning that may potentially confuse users.
Signed-off-by: Jon Hunter
Signed-off-by: Daniel Lezcano
---
From: Geert Uytterhoeven
Use the DIV_ROUND_CLOSEST() helper instead of open-coding the same
operation.
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Simon Horman
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/renesas-ostm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Anson Huang
Add i.MX8MQ system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang
Signed-off-by: Daniel Lezcano
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8
1 file changed, 8 insertions(+)
diff --git
From: Maxime Ripard
Newer Allwinner SoCs have different number of interrupts, let's add
different compatibles for all of them to deal with this properly.
Signed-off-by: Maxime Ripard
Acked-by: Daniel Lezcano
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/timer-sun4i.c | 4
1
From: Avi Fishman
NPCM7XX_Tx_OPER GENMASK bits are wrong, fix them.
Hopefully the NPCM7XX_REG_TICR0 register reset value of those bits was 0,
so it did not cause an issue.
The function npcm7xx_timer_oneshot() reads the register
NPCM7XX_REG_TCSR0, modifies it and then reads it again overwriting
From: Magnus Damm
Document the on-chip CMT devices included in r8a7740 and sh73a0.
Included in this patch is DT binding documentation for 32-bit CMTs
CMT0, CMT2, CMT3 and CMT4. They all contain a single channel and are
quite similar however some minor differences still exist:
- "Counter input
From: Magnus Damm
Add SoC-specific matching for CMT1 on r8a7740 and sh73a0.
This allows us to move away from the old DT bindings such as
- "renesas,cmt-48-sh73a0"
- "renesas,cmt-48-r8a7740"
- "renesas,cmt-48"
in favour for the now commonly used format "renesas,-"
Signed-off-by: Magnus Damm
From: Magnus Damm
Update the CMT driver to mark "renesas,cmt-48" as deprecated.
Instead of documenting a theoretical hardware device based on current software
support level, define DT bindings top-down based on available data sheet
information and make use of part numbers in the DT compat
From: Magnus Damm
The R-Car Gen3 SoCs so far come with a total for 4 on-chip CMT devices:
- CMT0
- CMT1
- CMT2
- CMT3
CMT0 includes two rather basic 32-bit timer channels. The rest of the on-chip
CMT devices support 48-bit counters and have 8 channels each.
Based on the data sheet
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen2 V2H (r8a7792) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
Signed-off-by: Daniel Lezcano
---
From: Magnus Damm
This patch adds DT binding documentation for the CMT devices on
the R-Car Gen3 D3 (r8a77995) SoC.
Signed-off-by: Magnus Damm
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
Reviewed-by: Simon Horman
Signed-off-by: Daniel Lezcano
---
From: Jon Hunter
Deferred probe is an expected return value on many platforms and so
there's no need to output a warning that may potentially confuse users.
Signed-off-by: Jon Hunter
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/timer-probe.c | 4 +++-
1 file changed, 3
From: Magnus Damm
This patch reworks the DT binding documentation for the 6-channel
48-bit CMTs known as CMT1 on r8a7740 and sh73a0.
After the update the same style of DT binding as the rest of the upstream
SoCs will now also be used by r8a7740 and sh73a0. The DT binding "cmt-48"
is removed
From: Alexandre Belloni
Implement and register delay timer to allow get_cycles() to work properly.
Signed-off-by: Alexandre Belloni
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/Kconfig | 2 +-
drivers/clocksource/timer-atmel-tcb.c | 18 ++
2 files changed,
From: Maxime Ripard
The newer Allwinner SoCs have a High Speed Timer supported in Linux, with a
matching Device Tree binding.
Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.
Signed-off-by: Maxime Ripard
From: Anson Huang
Add i.MX8MM system counter node to enable timer-imx-sysctr
broadcast timer driver.
Signed-off-by: Anson Huang
Signed-off-by: Daniel Lezcano
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 8
1 file changed, 8 insertions(+)
diff --git
From: Maxime Ripard
Newer Allwinner SoCs have different number of interrupts, let's add
different compatibles for all of them to deal with this properly.
Signed-off-by: Maxime Ripard
Reviewed-by: Rob Herring
Signed-off-by: Daniel Lezcano
---
.../timer/allwinner,sun4i-a10-timer.yaml |
Hi Michal,
Here are some of my thoughts,
On Wed, Aug 21, 2019 at 04:06:32PM +0200, Michal Hocko wrote:
> On Thu 15-08-19 14:51:04, Khalid Aziz wrote:
> > Hi Michal,
> >
> > The smarts for tuning these knobs can be implemented in userspace and
> > more knobs added to allow for what is missing
From: Maxime Ripard
The older Allwinner SoCs have a Timer supported in Linux, with a matching
Device Tree binding.
While the original binding only mentions one interrupt, the timer actually
has 6 of them.
Now that we have the DT validation in place, let's convert the device tree
bindings for
From: Anson Huang
The system counter block guide states that the base clock is
internally divided by 3 before use, that means the clock input of
system counter defined in DT should be base clock which is normally
from OSC, and then internally divided by 3 before use.
Signed-off-by: Anson Huang
From: Stephen Boyd
We don't need dev_err() messages when platform_get_irq() fails now that
platform_get_irq() prints an error message itself when something goes
wrong. Let's remove these prints with a simple semantic patch.
//
@@
expression ret;
struct platform_device *E;
@@
ret =
(
On Tue, Aug 13, 2019 at 08:55:29AM +0800, Wanpeng Li wrote:
> On Sun, 4 Aug 2019 at 04:21, Marcelo Tosatti wrote:
> >
> > On Thu, Aug 01, 2019 at 06:54:49PM +0200, Paolo Bonzini wrote:
> > > On 01/08/19 18:51, Rafael J. Wysocki wrote:
> > > > On 8/1/2019 9:06 AM, Wanpeng Li wrote:
> > > >> From:
Whenever a parent requests to generate mdev alias, generate a mdev
alias.
It is an optional attribute that parent can request to generate
for each of its child mdev.
mdev alias is generated using sha1 from the mdev name.
Signed-off-by: Parav Pandit
---
drivers/vfio/mdev/mdev_core.c| 98
Provide a module parameter to set alias length to optionally generate
mdev alias.
Example to request mdev alias.
$ modprobe mtty alias_length=12
Signed-off-by: Parav Pandit
---
samples/vfio-mdev/mtty.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/samples/vfio-mdev/mtty.c
The following changes since commit 08a3c192c93f4359a94bf47971e55b0324b72b8b:
posix-timers: Prepare for PREEMPT_RT (2019-08-01 20:51:25 +0200)
are available in the Git repository at:
https://git.linaro.org/people/daniel.lezcano/linux.git tags/timers-v5.5
for you to fetch changes up to
Mdev alias should be unique among all the mdevs, so that when such alias
is used by the mdev users to derive other objects, there is no
collision in a given system.
Signed-off-by: Parav Pandit
---
drivers/vfio/mdev/mdev_core.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Expose mdev alias as string in a sysfs tree so that such attribute can
be used to generate netdevice name by systemd/udev or can be used to
match other kernel objects based on the alias of the mdev.
Signed-off-by: Parav Pandit
---
drivers/vfio/mdev/mdev_sysfs.c | 13 +
1 file
To have consistent naming for the netdevice of a mdev and to have
consistent naming of the devlink port [1] of a mdev, which is formed using
phys_port_name of the devlink port, current UUID is not usable because
UUID is too long.
UUID in string format is 36-characters long and in binary 128-bit.
On Mon, Aug 26, 2019 at 04:53:16AM -0700, Christoph Hellwig wrote:
> On Wed, Aug 21, 2019 at 01:57:03PM -0400, Vivek Goyal wrote:
> > Right now dax_writeback_mapping_range() is passed a bdev and dax_dev
> > is searched from that bdev name.
> >
> > virtio-fs does not have a bdev. So pass in
On Mon, Aug 26, 2019 at 08:53:05AM -0400, Boris Ostrovsky wrote:
> On 8/24/19 4:53 AM, Borislav Petkov wrote:
> >
> > +wait_for_siblings:
> > + if (__wait_for_cpus(_cpus_out, NSEC_PER_SEC))
> > + panic("Timeout during microcode update!\n");
> > +
> > /*
> > -* Increase the
From: Tejas Patel
For "0" requirement which is used to inform firmware that device is
not required currently by master, Versal PLM (Platform Loader and
Manager) which runs on Platform Management Controller and is responsible
platform management of devices that disables clock, power it down
and
On Wed, Aug 21, 2019 at 1:33 PM Rob Herring wrote:
>
> On Wed, 7 Aug 2019 15:31:09 -0700, Saravana Kannan wrote:
> > Interconnects often quantify their performance points in terms of
> > bandwidth. So, add opp-peak-kBps (required) and opp-avg-kBps (optional) to
> > allow specifying Bandwidth OPP
Hi Boris
Minor nit: Small commit log fixup below.
On Sat, Aug 24, 2019 at 10:53:00AM +0200, Borislav Petkov wrote:
> From: Ashok Raj
> Date: Thu, 22 Aug 2019 23:43:47 +0300
>
> Microcode update was changed to be serialized due to restrictions after
> Spectre days. Updating serially on a large
On Fri, 2019-08-23 at 15:18 -0700, David Miller wrote:
> Saeed, I assume I'll get this from you.
Yes, i will handle it.
Hi Dilip,
On Mon, Aug 26, 2019 at 8:42 AM Dilip Kota wrote:
[...]
> intel_pcie_port structure is having "struct dw_pcie" as mentioned below:
>
> struct intel_pcie_port {
> struct dw_pcie *pci;
> unsigned intid; /* Physical RC Index */
> void __iomem
Hi all,
Next round. Changes:
- I kept the two lockdep annotations patches since when I rebased this
before retesting linux-next didn't yet have them. Otherwise unchanged
except for a trivial conflict.
- Ack from Peter Z. on the kernel.h patch.
- Added annotations for non_block to
On Mon, Aug 26, 2019 at 12:55:31PM -0700, Florian Fainelli wrote:
> On 8/26/19 6:38 PM, Voon Weifeng wrote:
> > EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
> > ptp clock and ptp_max_adj to 200MHz.
> >
> > Signed-off-by: Voon Weifeng
> > Signed-off-by: Ong Boon Leong
> > ---
On Mon, Aug 26, 2019 at 5:50 PM Jason Gunthorpe wrote:
>
> On Mon, Aug 26, 2019 at 01:32:09AM +0530, Souptick Joarder wrote:
> > On Mon, Aug 26, 2019 at 1:13 AM Jason Gunthorpe wrote:
> > >
> > > On Sun, Aug 25, 2019 at 11:37:27AM +0530, Souptick Joarder wrote:
> > > > First, length passed to
Le 26/08/2019 à 18:50, Greg Kroah-Hartman a écrit :
On Wed, Aug 21, 2019 at 10:19:27AM +1000, Alastair D'Silva wrote:
From: Alastair D'Silva
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of
From: Claire Lin
In brcmstb_nand_verify_erased_page(), fix ecc chunk pointer calculation
while correcting erased page bitflip.
Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips")
Signed-off-by: Claire Lin
Reviewed-by: Ray Jui
Signed-off-by: Kamal Dasu
---
The core AMD PMU has a 4-bit wide per-cycle increment for each
performance monitor counter. That works for most counters, but
now with AMD Family 17h and above processors, for some, more than 15
events can occur in a cycle. Those events are called "Large
Increment per Cycle" events, and one
When counting dispatched micro-ops with cnt_ctl=1, in order to prevent
sample bias, IBS hardware preloads the least significant 7 bits of
current count (IbsOpCurCnt) with random values, such that, after the
interrupt is handled and counting resumes, the next sample taken
will be slightly
Hi
On 8/26/19 4:32 PM, Christoph Hellwig wrote:
+config ARCH_USE_COMMON_SMP_STOP
+ def_bool y if SMP
The option belongs into common code and the arch code shoud only
select it.
In fact that was my first approach, but then I noticed that in kernel/ topdir
there was no generic Kconfig
On 8/26/19 6:38 PM, Voon Weifeng wrote:
> EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
> ptp clock and ptp_max_adj to 200MHz.
>
> Signed-off-by: Voon Weifeng
> Signed-off-by: Ong Boon Leong
> ---
> drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 +
Make the computation of a memory mask representing the width of the memory
bus into a function so that it can be re-used by the ETR driver.
Signed-off-by: Mathieu Poirier
---
.../hwtracing/coresight/coresight-tmc-etf.c | 23 ++-
drivers/hwtracing/coresight/coresight-tmc.c | 28
This patch adds barrier packets in the trace stream when the offset in the
data buffer needs to be moved forward. Otherwise the decoder isn't aware
of the break in the stream and can't synchronise itself with the trace
data.
Signed-off-by: Mathieu Poirier
Tested-by: Yabin Cui
---
This set builds on top of an original patch by Yabin Cui[1] that deals with
cases where the ETR buffer it bigger than the space available in the perf
ring buffer. The work herein complements Yabin's by inserting barrier
packets after the head of the memory buffer has been moved forward in order
If less space is available in the perf ring buffer than the ETR buffer,
barrier packets inserted in the trace stream by tmc_sync_etr_buf() are
skipped over when the head of the buffer is moved forward, resulting in
traces that can't be decoded.
This patch decouples the process of syncing ETR
On Mon, Aug 26, 2019 at 08:22:24PM +0200, Thomas Gleixner wrote:
> Now that the abused struct task_cputime is gone, it's more natural to
> bundle the expiry cache and the list head of each clock into a struct and
> have an array of those structs.
>
> Follow the hrtimer naming convention of
Alex,
On 8/19/2019 4:57 AM, Alexander Graf wrote:
>
>
> On 15.08.19 18:25, Suthikulpanit, Suravee wrote:
>> Currently, there is no way to tell whether APICv is active
>> on a particular VM. This often cause confusion since APICv
>> can be deactivated at runtime.
>>
>> Introduce a debugfs entry
Adds config option and code to support printing a Process / Thread Summary
of process / thread activity when an OOM event occurs. The information
provided includes the number of process and threads active, the number
of oom eligible and oom ineligible tasks, the total number of forks
that have
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