From: Tudor Ambarus
The goal is to move the quad_enable manufacturer specific init in the
nor->manufacturer->fixups->default_init()
The legacy quad_enable() implementation is spansion_quad_enable(),
select this method by default.
Set specific manufacturer fixups->default_init() hooks to
From: Tudor Ambarus
nor->params.setup() configures the SPI NOR memory. Useful for SPI NOR
flashes that have peculiarities to the SPI NOR standard, e.g.
different opcodes, specific address calculation, page size, etc.
Right now the only user will be the S3AN chips, but other
manufacturers can
From: Boris Brezillon
In order to separate manufacturer quirks from the core we need to get
rid of all the manufacturer specific flags, like the
SNOR_F_S3AN_ADDR_DEFAULT one.
This can easily be replaced by a ->convert_addr() hook, which when
implemented will provide the core with an easy way to
From: Boris Brezillon
Add the SNOR_F_HAS_LOCK flag and set it when SPI_NOR_HAS_LOCK is set
in the flash_info entry or when it's a Micron or ST flash.
Move the locking hooks in a separate struct so that we have just
one field to update when we change the locking implementation.
Signed-off-by:
From: Tudor Ambarus
Parsing of flash parameters were interleaved with setting of the
nor addr width. Dedicate a function for setting nor addr width.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: no changes
drivers/mtd/spi-nor/spi-nor.c | 50
From: Boris Brezillon
S3AN flashes use a specific opcode to read the status register.
We currently use the SPI_S3AN flag to decide whether this specific
SR read opcode should be used, but SPI_S3AN is about to disappear, so
let's add a new flag.
Note that we use the same bit as SPI_S3AN implies
From: Boris Brezillon
SFDP tables are sometimes wrong and we need a way to override the
config chosen by the SFDP parsing logic without discarding all of it.
Add a new hook called after the SFDP parsing has taken place to deal
with such problems.
Signed-off-by: Boris Brezillon
Signed-off-by:
From: Tudor Ambarus
Add functions to delimit what the chunks of code do:
static void spi_nor_init_params()
{
spi_nor_info_init_params()
spi_nor_manufacturer_init_params()
spi_nor_sfdp_init_params()
}
Add descriptions to all methods.
spi_nor_init_params() becomes of
From: Boris Brezillon
Add a spansion_post_sfdp_fixups() function to fix the erase opcode,
erase sector size and set the SNOR_F_4B_OPCODES flag.
This way, all spansion related quirks are placed in the
spansion_post_sfdp_fixups() function.
Signed-off-by: Boris Brezillon
Signed-off-by: Tudor
From: Tudor Ambarus
The Flash parameters and settings are now stored in 'struct spi_nor'.
Use this instead of the stack allocated params.
Few functions stop passing pointer to params, as they can get it from
'struct spi_nor'. spi_nor_parse_sfdp() and children will keep passing
pointer to params
From: Tudor Ambarus
All flash parameters and settings should reside inside
'struct spi_nor_flash_parameter'. Move the SMPT parsed erase map
from 'struct spi_nor' to 'struct spi_nor_flash_parameter'.
Please note that there is a roll-back mechanism for the flash
parameter and settings, for cases
From: Tudor Ambarus
All flash parameters and settings should reside inside
'struct spi_nor_flash_parameter'. Drop the local copy of
quad_enable() and use the one from 'struct spi_nor_flash_parameter'.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: Collect R-b
From: Boris Brezillon
gd25q256 needs to tweak the ->quad_enable() implementation and the
->default_init() fixup hook is the perfect place to do that. This way,
if we ever need to tweak more things for this flash, we won't have to
add new fields in flash_info.
We can get rid of the
From: Tudor Ambarus
v3:
- Drop patches:
"mtd: spi-nor: Move clear_sr_bp() to 'struct spi_nor_flash_parameter'"
"mtd: spi-nor: Rework the disabling of block write protection"
and replace them with the RFC patch:
"mtd: spi-nor: Rework the disabling of block write protection"
- rename
From: Tudor Ambarus
The scope is to move all [FLASH-SPECIFIC] parameters and settings
from 'struct spi_nor' to 'struct spi_nor_flash_parameter'.
'struct spi_nor_flash_parameter' describes the hardware capabilities
and associated settings of the SPI NOR flash memory. It includes
legacy flash
From: Tudor Ambarus
As of now, the flash parameters initialization logic is as following:
a/ default flash parameters init in spi_nor_init_params()
b/ manufacturer specific flash parameters updates, split across entire
spi-nor core code
c/ flash parameters updates based on SFDP tables
d/
On 8/21/19 11:09 PM, Yizhuo wrote:
> Inside function ctrl_cx2341x_getv4lflags(), qctrl.flag
> will be uninitlaized if cx2341x_ctrl_query() returns -EINVAL.
> However, it will be used in the later if statement, which is
> potentially unsafe.
>
> Signed-off-by: Yizhuo
> ---
>
On Mon, Aug 26, 2019 at 09:41:39PM +1000, Michael Ellerman wrote:
> Given how many 601 users there are, maybe 1?, I think that would be a
> simpler option and avoids complicating the code / binary for everyone
> else.
Or you could remove 601 support altogether?
Segher
Hi,
On 13/08/19 1:12 PM, Anil Varughese wrote:
> Some UFS devices have issues if LCC is enabled. So we
> are setting PA_LOCAL_TX_LCC_Enable to 0 before link
> startup which will make sure that both host and device
> TX LCC are disabled once link startup is completed.
>
> Signed-off-by: Anil
On Tue 13-08-19 12:51:43, Michal Hocko wrote:
> On Mon 12-08-19 11:07:25, Johannes Weiner wrote:
> > On Mon, Aug 12, 2019 at 10:09:47AM +0200, Michal Hocko wrote:
[...]
> > > > Maybe the refaults will be fine - but latency expectations around
> > > > mapped page cache certainly are a lot higher
On Fri, Aug 23, 2019 at 9:54 AM Krzysztof Kozlowski wrote:
>
> Convert Samsung S3C/Exynos Real Time Clock bindings to DT schema format
> using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/rtc/s3c-rtc.txt | 31 --
>
On 12/08/2019 15.28, Guenter Roeck wrote:
> On 8/12/19 6:13 AM, Rasmus Villemoes wrote:
>> Converting from ms to s requires dividing by 1000, not multiplying. So
>> this is currently taking the smaller of new_timeout and 1.28e8,
>> i.e. effectively new_timeout.
>>
>> The driver knows what it set
From: Boris Brezillon
Add a spansion_post_sfdp_fixups() function to fix the erase opcode,
erase sector size and set the SNOR_F_4B_OPCODES flag.
This way, all spansion related quirks are placed in the
spansion_post_sfdp_fixups() function.
Signed-off-by: Boris Brezillon
Signed-off-by: Tudor
From: Boris Brezillon
SFDP tables are sometimes wrong and we need a way to override the
config chosen by the SFDP parsing logic without discarding all of it.
Add a new hook called after the SFDP parsing has taken place to deal
with such problems.
Signed-off-by: Boris Brezillon
Signed-off-by:
From: Boris Brezillon
In order to separate manufacturer quirks from the core we need to get
rid of all the manufacturer specific flags, like the
SNOR_F_S3AN_ADDR_DEFAULT one.
This can easily be replaced by a ->convert_addr() hook, which when
implemented will provide the core with an easy way to
From: Boris Brezillon
Add the SNOR_F_HAS_LOCK flag and set it when SPI_NOR_HAS_LOCK is set
in the flash_info entry or when it's a Micron or ST flash.
Move the locking hooks in a separate struct so that we have just
one field to update when we change the locking implementation.
Signed-off-by:
From: Tudor Ambarus
nor->params.setup() configures the SPI NOR memory. Useful for SPI NOR
flashes that have peculiarities to the SPI NOR standard, e.g.
different opcodes, specific address calculation, page size, etc.
Right now the only user will be the S3AN chips, but other
manufacturers can
On Mon, 2019-08-26 at 12:00 +, Wei Yongjun wrote:
> In case of error, the function devm_ioremap_wc() returns NULL pointer
> not ERR_PTR(). The IS_ERR() test in the return value check should be
> replaced with NULL test.
>
> Fixes: 202acc565a1f ("ASoC: SOF: imx: Add i.MX8 HW support")
>
From: Boris Brezillon
The procedure used to enable 4 byte addressing mode depends on the NOR
device, so let's provide a hook so that manufacturer specific handling
can be implemented in a sane way.
Signed-off-by: Boris Brezillon
[tudor.amba...@microchip.com: use nor->params.set_4byte() instead
From: Tudor Ambarus
Add functions to delimit what the chunks of code do:
static void spi_nor_init_params()
{
spi_nor_info_init_params()
spi_nor_manufacturer_init_params()
spi_nor_sfdp_init_params()
}
Add descriptions to all methods.
spi_nor_init_params() becomes of
From: Tudor Ambarus
The goal is to move the quad_enable manufacturer specific init in the
nor->manufacturer->fixups->default_init()
The legacy quad_enable() implementation is spansion_quad_enable(),
select this method by default.
Set specific manufacturer fixups->default_init() hooks to
From: Tudor Ambarus
All flash parameters and settings should reside inside
'struct spi_nor_flash_parameter'. Move the SMPT parsed erase map
from 'struct spi_nor' to 'struct spi_nor_flash_parameter'.
Please note that there is a roll-back mechanism for the flash
parameter and settings, for cases
On Fri, 2019-08-23 at 10:42 +0100, Marc Zyngier wrote:
> On 23/08/2019 08:21, Lubomir Rintel wrote:
> > On Thu, 2019-08-22 at 11:31 +0100, Marc Zyngier wrote:
> > > On 22/08/2019 10:26, Lubomir Rintel wrote:
> > > > Hi,
> > > >
> > > > this is a second spin of a patch set that adds support for
Hi!
On 19/08/2019 11:07, Adamski, Krzysztof (Nokia - PL/Wroclaw) wrote:
> This device contains both master and slave controllers which can be
> enabled simultaneously. Both controllers share the same SDA/SCL lines
> and interrupt source but has separate control and status registers.
> Controllers
From: Tudor Ambarus
The Flash parameters and settings are now stored in 'struct spi_nor'.
Use this instead of the stack allocated params.
Few functions stop passing pointer to params, as they can get it from
'struct spi_nor'. spi_nor_parse_sfdp() and children will keep passing
pointer to params
From: Tudor Ambarus
The scope is to move all [FLASH-SPECIFIC] parameters and settings
from 'struct spi_nor' to 'struct spi_nor_flash_parameter'.
'struct spi_nor_flash_parameter' describes the hardware capabilities
and associated settings of the SPI NOR flash memory. It includes
legacy flash
From: Tudor Ambarus
As of now, the flash parameters initialization logic is as following:
a/ default flash parameters init in spi_nor_init_params()
b/ manufacturer specific flash parameters updates, split across entire
spi-nor core code
c/ flash parameters updates based on SFDP tables
d/
From: Tudor Ambarus
All flash parameters and settings should reside inside
'struct spi_nor_flash_parameter'. Drop the local copy of
quad_enable() and use the one from 'struct spi_nor_flash_parameter'.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v3: Collect R-b
From: Tudor Ambarus
v3:
- Drop patches:
"mtd: spi-nor: Move clear_sr_bp() to 'struct spi_nor_flash_parameter'"
"mtd: spi-nor: Rework the disabling of block write protection"
and replace them with the RFC patch:
"mtd: spi-nor: Rework the disabling of block write protection"
- rename
From: Boris Brezillon
gd25q256 needs to tweak the ->quad_enable() implementation and the
->default_init() fixup hook is the perfect place to do that. This way,
if we ever need to tweak more things for this flash, we won't have to
add new fields in flash_info.
We can get rid of the
In case of error, the function devm_ioremap_wc() returns NULL pointer
not ERR_PTR(). The IS_ERR() test in the return value check should be
replaced with NULL test.
Fixes: 202acc565a1f ("ASoC: SOF: imx: Add i.MX8 HW support")
Signed-off-by: Wei Yongjun
---
sound/soc/sof/imx/imx8.c | 4 ++--
1
On Mon, 26 Aug 2019, Vitaly Kuznetsov wrote:
> Sasha Levin writes:
>
> > On Thu, Aug 22, 2019 at 10:39:46AM +0200, Vitaly Kuznetsov wrote:
> >>lantianyu1...@gmail.com writes:
> >>
> >>> From: Tianyu Lan
> >>>
> >>> Both Hyper-V tsc page and Hyper-V tsc MSR code use variable
> >>>
On Fri, Aug 23, 2019 at 9:54 AM Krzysztof Kozlowski wrote:
>
> Convert Samsung Exynos Power Management Unit (PMU) bindings to DT schema
> format using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/arm/samsung/pmu.txt | 72 --
>
From: Chong Qiao
Such as:
cpu_cgroup_attach>
sched_move_task>
task_change_group_fair>
task_move_group_fair>
detach_task_cfs_rq>
vruntime_normalized>
/*
* When !on_rq, vruntime of the task has usually NOT been normalized.
* But there are some cases where
On Wed, Aug 21, 2019 at 01:57:03PM -0400, Vivek Goyal wrote:
> Right now dax_writeback_mapping_range() is passed a bdev and dax_dev
> is searched from that bdev name.
>
> virtio-fs does not have a bdev. So pass in dax_dev also to
> dax_writeback_mapping_range(). If dax_dev is passed in, bdev is
On Wed, Aug 21, 2019 at 01:57:02PM -0400, Vivek Goyal wrote:
> From: Stefan Hajnoczi
>
> Although struct dax_device itself is not tied to a block device, some
> DAX code assumes there is a block device. Make block devices optional
> by allowing bdev to be NULL in commonly used DAX APIs.
>
>
Hi all,
After merging the devfreq tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
drivers/devfreq/governor_passive.c: In function 'devfreq_passive_event_handler':
drivers/devfreq/governor_passive.c:152:17: warning: unused variable 'dev'
[-Wunused-variable]
struct
Le 26/08/2019 à 13:41, Michael Ellerman a écrit :
Christophe Leroy writes:
sched_clock(), used by printk(), calls __USE_RTC() to know
whether to use realtime clock or timebase.
__USE_RTC() uses cpu_has_feature() which is initialised by
machine_init(). Before machine_init(), __USE_RTC()
On Thu, Aug 22, 2019 at 09:57:22PM +, Nitin Gupta wrote:
> > Note that proactive compaction may reduce allocation latency but it is not
> > free either. Even though the scanning and migration may happen in a kernel
> > thread, tasks can incur faults while waiting for compaction to complete if
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: d5e4ef22e053072ce03951a5beed0ce5244bee81
Gitweb:
https://git.kernel.org/tip/d5e4ef22e053072ce03951a5beed0ce5244bee81
Author:Peter Zijlstra
AuthorDate:Thu, 22 Aug 2019 12:23:10 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 2c1ce2da5925a725fa6a4b9561304fb61ed1f31f
Gitweb:
https://git.kernel.org/tip/2c1ce2da5925a725fa6a4b9561304fb61ed1f31f
Author:Peter Zijlstra
AuthorDate:Thu, 22 Aug 2019 12:23:08 +02:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 90583af61d0c0d2826f42a297a03645b35c49085
Gitweb:
https://git.kernel.org/tip/90583af61d0c0d2826f42a297a03645b35c49085
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:22 +03:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 26ee9ccc117b9c4179f0a1c65c67f71a0a5a0afe
Gitweb:
https://git.kernel.org/tip/26ee9ccc117b9c4179f0a1c65c67f71a0a5a0afe
Author:Ingo Molnar
AuthorDate:Mon, 26 Aug 2019 12:19:06 +02:00
Committer:
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 539f7c26b41d4ed7d88dd9756de3966ae7ca07b4
Gitweb:
https://git.kernel.org/tip/539f7c26b41d4ed7d88dd9756de3966ae7ca07b4
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:24 +03:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 39152ee51b77851689f9b23fde6f610d13566c39
Gitweb:
https://git.kernel.org/tip/39152ee51b77851689f9b23fde6f610d13566c39
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:27 +03:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: b95a1e89f1007dd552d9756c077bedc74183d8ac
Gitweb:
https://git.kernel.org/tip/b95a1e89f1007dd552d9756c077bedc74183d8ac
Author:Peter Zijlstra
AuthorDate:Thu, 22 Aug 2019 12:23:11 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 33b154d766de704c11a098f3528debbcfb74326f
Gitweb:
https://git.kernel.org/tip/33b154d766de704c11a098f3528debbcfb74326f
Author:Peter Zijlstra
AuthorDate:Thu, 22 Aug 2019 12:23:07 +02:00
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 3e5bedc2c258341702ddffbd7688c5e6eb01eafa
Gitweb:
https://git.kernel.org/tip/3e5bedc2c258341702ddffbd7688c5e6eb01eafa
Author:Thomas Gleixner
AuthorDate:Wed, 21 Aug 2019 15:16:31 +02:00
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 7d54f81be6a3acea9e7289f25aba83a9ab5adc6e
Gitweb:
https://git.kernel.org/tip/7d54f81be6a3acea9e7289f25aba83a9ab5adc6e
Author:Peter Zijlstra
AuthorDate:Thu, 22 Aug 2019 12:23:09 +02:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 38bb8d77d0b932a0773b5de2ef42479409314f96
Gitweb:
https://git.kernel.org/tip/38bb8d77d0b932a0773b5de2ef42479409314f96
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:25 +03:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: fffec50f541ace292383c0cbe9a2a97d16d201c6
Gitweb:
https://git.kernel.org/tip/fffec50f541ace292383c0cbe9a2a97d16d201c6
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:23 +03:00
The following commit has been merged into the perf/core branch of tip:
Commit-ID: 91feca5e2ecc9752894d57c9a72c2645471929c3
Gitweb:
https://git.kernel.org/tip/91feca5e2ecc9752894d57c9a72c2645471929c3
Author:Alexander Shishkin
AuthorDate:Wed, 21 Aug 2019 15:47:26 +03:00
On Mon, Aug 26, 2019 at 07:22:44PM +0800, Peter Xu wrote:
> On Mon, Aug 26, 2019 at 01:09:58PM +0200, Andrew Jones wrote:
> > On Mon, Aug 26, 2019 at 03:57:28PM +0800, Peter Xu wrote:
> > > The dirty_log_test is failing on some old machines like Xeon E3-1220
> > > with tripple faults when writting
Christophe Leroy writes:
> sched_clock(), used by printk(), calls __USE_RTC() to know
> whether to use realtime clock or timebase.
>
> __USE_RTC() uses cpu_has_feature() which is initialised by
> machine_init(). Before machine_init(), __USE_RTC() returns true,
> leading to a program check
On Tue, 13 Aug 2019 at 12:00, Ludovic Barre wrote:
>
> From: Ludovic Barre
>
> In some variants, the data timer starts and decrements
> when the DPSM enters in Wait_R or Busy state
> (while data transfer or MMC_RSP_BUSY), and generates a
> data timeout error if the counter reach 0.
I don't
On Mon, Aug 26, 2019 at 06:47:57PM +0800, Peter Xu wrote:
> On Mon, Aug 26, 2019 at 10:25:55AM +0200, Vitaly Kuznetsov wrote:
> > Peter Xu writes:
> >
> > > The dirty_log_test is failing on some old machines like Xeon E3-1220
> > > with tripple faults when writting to the tracked memory region:
On Fri, Aug 23, 2019 at 9:54 AM Krzysztof Kozlowski wrote:
>
> Convert Samsung S5P and Exynos SoC bindings to DT schema format using
> json-schema. This is purely conversion of already documented bindings
> so it does not cover all of DTS in the Linux kernel (few S5P/Exynos and
> all S3C are
Hi,
There is a BoF session scheduled on Linux Plumbers Conference 2019 event.
If you plan attend the event feel free to join and discuss about the BoF
topic and beyond:
Linux Perf advancements for compute intensive and server systems:
"Modern server and compute intensive systems are
On Wed, Aug 21, 2019 at 06:26:58PM +0900, Masahiro Yamada wrote:
> Use the standard obj-y form to specify the sub-directories under
> arch/riscv/. No functional change intended.
>
> Signed-off-by: Masahiro Yamada
Do you have a document what the grand scheme here is? Less of the magic
in
Peter Xu writes:
> On Mon, Aug 26, 2019 at 10:25:55AM +0200, Vitaly Kuznetsov wrote:
>> Peter Xu writes:
>>
>> > The dirty_log_test is failing on some old machines like Xeon E3-1220
>> > with tripple faults when writting to the tracked memory region:
>>
>> s,writting,writing,
>>
>> >
>> >
On Fri, 23 Aug 2019 11:36:37 +0200
Peter Zijlstra wrote:
> On Thu, Aug 22, 2019 at 10:23:35PM -0700, Song Liu wrote:
> > As 4k pages check was removed from cpa [1], set_kernel_text_rw() leads to
> > split_large_page() for all kernel text pages. This means a single kprobe
> > will put all kernel
On Mon, Aug 26, 2019 at 04:44:00PM +0900, Seunghun Han wrote:
> I'm Seunghun Han and work at the Affiliated Institute of ETRI. I found
You can drop the first sentence from the commit message. The SoB below
is sufficient.
> a bug related to improper buffer size calculation in crb_fixup_cmd_size
>
From: Markus Elfring
Date: Mon, 26 Aug 2019 13:14:02 +0200
A null pointer would be passed to a call of the function "kfree" directly
after a call of the function "kcalloc" failed at one place.
Pass the data structure member "urb" instead for which memory
was allocated before (so that this
On Mon, Aug 26, 2019 at 11:51:17AM +0200, Dietmar Eggemann wrote:
> Not sure about the extra 'if trace_cpu_frequency_enabled()' but I guess
> it doesn't hurt.
Without that you do that for_each_cpu() iteration unconditionally, even
if the tracepoint is disabled.
On Mon, Aug 26, 2019 at 4:52 AM Dilip Kota wrote:
>
> Hi Rob,
>
> On 8/23/2019 8:25 PM, Rob Herring wrote:
> > On Fri, Aug 23, 2019 at 12:28 AM Dilip Kota
> > wrote:
> >> Add YAML schemas for the reset controller on Intel
> >> Lightening Mountain (LGM) SoC.
> >>
> >> Signed-off-by: Dilip Kota
On Mon, Aug 26, 2019 at 01:09:58PM +0200, Andrew Jones wrote:
> On Mon, Aug 26, 2019 at 03:57:28PM +0800, Peter Xu wrote:
> > The dirty_log_test is failing on some old machines like Xeon E3-1220
> > with tripple faults when writting to the tracked memory region:
> >
> > Test iterations: 32,
- On 22 Aug, 2019, at 02:06, Christoph Hellwig h...@lst.de wrote:
> On Fri, Aug 16, 2019 at 11:47:21AM +0200, Marta Rybczynska wrote:
>> It is not possible to get 64-bit results from the passthru commands,
>> what prevents from getting for the Capabilities (CAP) property value.
>>
>> As a
This patch aim at documenting USB related dt-bindings for the
Cadence USBSS-DRD controller.
Signed-off-by: Pawel Laszczak
Reviewed-by: Rob Herring
---
.../devicetree/bindings/usb/cdns-usb3.txt | 45 +++
1 file changed, 45 insertions(+)
create mode 100644
This patch introduce new Cadence USBSS DRD driver to linux kernel.
The Cadence USBSS DRD Controller is a highly configurable IP Core which
can be instantiated as Dual-Role Device (DRD), Peripheral Only and
Host Only (XHCI)configurations.
The current driver has been validated with FPGA burned. We
* Tetsuo Handa wrote:
> On 2019/08/26 1:54, Linus Torvalds wrote:
> > On Sat, Aug 24, 2019 at 10:50 PM Tetsuo Handa
> > wrote:
> >>
> >> @@ -142,7 +144,7 @@ static ssize_t read_mem(struct file *file, char __user
> >> *buf,
> >> sz = size_inside_page(p, count);
> >>
On Mon, Aug 26, 2019 at 1:03 PM Stephen Rothwell wrote:
> Today's linux-next merge of the pinctrl tree got a conflict in:
>
> drivers/pinctrl/bcm/pinctrl-bcm2835.c
>
> between commit:
>
> 82357f82ec69 ("pinctrl: bcm2835: Pass irqchip when adding gpiochip")
>
> from the gpio tree and commit:
SLOB currently doesn't account its pages at all, so in /proc/meminfo the Slab
field shows zero. Modifying a counter on page allocation and freeing should be
acceptable even for the small system scenarios SLOB is intended for.
Since reclaimable caches are not separated in SLOB, account everything
In most configurations, kmalloc() happens to return naturally aligned (i.e.
aligned to the block size itself) blocks for power of two sizes. That means
some kmalloc() users might unknowingly rely on that alignment, until stuff
breaks when the kernel is built with e.g. CONFIG_SLUB_DEBUG or
On 09.08.19 09:19, Paolo Bonzini wrote:
> KVM/s390 does not have a list of its own, and linux-s390 is in the
> loop anyway thanks to the generic arch/s390 match. So use the generic
> KVM list for s390 patches.
>
> Signed-off-by: Paolo Bonzini
I see its already in next, but consider this
On Mon 26-08-19 12:41:50, Oscar Salvador wrote:
[...]
> I checked [1], and it seems that [2] was going towards fixing this kind of
> issue.
>
> I think it is about time to revamp the whole thing.
I completely agree. The current state of hwpoison is just too fragile to
be practically usable. We
On Mon, Aug 26, 2019 at 05:53:28PM +0800, Gao Xiang wrote:
[]
> The attempt above compiles successfully as well... And I have tried
> the following commands (Just in case...) and the result turns out
> without any difference...
>
> $ make ARCH=x86_64 allmodconfig
> $ make ARCH=x86_64 -j16
>
Prior to commit 1bd98d7fbaf5 ("ppc64: Update BUG handling based on
ppc32"), BUG() family was using BUG_ILLEGAL_INSTRUCTION which
was an invalid instruction opcode to trap into program check
exception.
That commit converted them to using standard trap instructions,
but prom/prom_init and their
On Mon, Aug 26, 2019 at 03:57:28PM +0800, Peter Xu wrote:
> The dirty_log_test is failing on some old machines like Xeon E3-1220
> with tripple faults when writting to the tracked memory region:
>
> Test iterations: 32, interval: 10 (ms)
> Testing guest mode: PA-bits:52, VA-bits:48, 4K pages
Hello,
Stephen Boyd wrote:
> We don't need dev_err() messages when platform_get_irq() fails now that
> platform_get_irq() prints an error message itself when something goes
> wrong. Let's remove these prints with a simple semantic patch.
>
> //
> @@
> expression ret;
> struct platform_device
- Original Message -
> Hi!
> > Do you see this LTP prot_hsymlinks failure on linux next 20190823 on
> > x86_64 and i386 devices?
> >
> > test output log,
> > useradd: failure while writing changes to /etc/passwd
> > useradd: /home/hsym was created, but could not be removed
>
> This
Hello,
Florian Fainelli wrote:
> When building on a 64-bit host, we will get warnings like those:
>
> drivers/firmware/broadcom/bcm47xx_nvram.c:103:3: note: in expansion of macro
> 'pr_err'
>pr_err("nvram on flash (%i bytes) is bigger than the reserved space in
> memory, will just copy the
Hi all,
Today's linux-next merge of the pinctrl tree got a conflict in:
drivers/pinctrl/bcm/pinctrl-bcm2835.c
between commit:
82357f82ec69 ("pinctrl: bcm2835: Pass irqchip when adding gpiochip")
from the gpio tree and commit:
e38a9a437fb9 ("pinctrl: bcm2835: Add support for BCM2711
On Fri 23-08-19 18:03:01, Yang Shi wrote:
>
>
> On 8/23/19 3:00 PM, Adric Blake wrote:
> > Synopsis:
> > A WARN_ON_ONCE is hit twice in set_task_reclaim_state under the
> > following conditions:
> > - a memory cgroup has been created and a task assigned it it
> > - memory.limit_in_bytes has been
On Mon, Aug 26, 2019 at 10:25:55AM +0200, Vitaly Kuznetsov wrote:
> Peter Xu writes:
>
> > The dirty_log_test is failing on some old machines like Xeon E3-1220
> > with tripple faults when writting to the tracked memory region:
>
> s,writting,writing,
>
> >
> > Test iterations: 32, interval:
Adds secondary SPI flash chip into dts for vesnin.
Signed-off-by: Ivan Mikhaylov
---
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
index
ASPEED SoCs support dual-boot feature for SPI Flash.
When strapped appropriately, the SoC starts wdt2 (/dev/watchdog1)
and if within a minute it is not disabled, it goes off and reboots
the SoC from an alternate SPI Flash chip by changing CS0 controls
to actually drive CS1 line.
When booted from
Adds wdt2 section with 'alt-boot' option into dts for vesnin.
Signed-off-by: Ivan Mikhaylov
---
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
index
Set WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION into WDT_CLEAR_TIMEOUT_STATUS
to clear out boot code source and re-enable access to the primary SPI flash
chip while booted via wdt2 from the alternate chip.
AST2400 datasheet says:
"In the 2nd flash booting mode, all the address mapping to CS0# would
The option for the ast2400/2500 to get access to CS0 at runtime.
Signed-off-by: Ivan Mikhaylov
---
Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/aspeed-wdt.txt
Hi,
When analyzing a problem reported by one of our customers, I stumbbled upon an
issue
that origins from the fact that poisoned pages end up in the buddy allocator.
Let me break down the stepts that lie to the problem:
1) We soft-offline a page
2) Page gets flagged as HWPoison and is being
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