Stefano Stabellini wrote on Thu, May 21, 2020:
> From: Stefano Stabellini
>
> Increase XEN_9PFS_RING_ORDER to 9 for performance reason. Order 9 is the
> max allowed by the protocol.
>
> We can't assume that all backends will support order 9. The xenstore
> property max-ring-page-order specifies
Hi all,
Today's linux-next merge of the devicetree tree got a conflict in:
Documentation/devicetree/bindings/pci/cdns-pcie.yaml
between commit:
fb5f8f3ca5f8 ("dt-bindings: PCI: cadence: Deprecate inbound/outbound specific
bindings")
from the pci tree and commit:
3d21a4609335
Daniel Jordan writes:
> On Wed, May 20, 2020 at 11:15:02AM +0800, Huang Ying wrote:
>> @@ -2827,6 +2865,11 @@ static struct swap_info_struct *alloc_swap_info(void)
>> p = kvzalloc(struct_size(p, avail_lists, nr_node_ids), GFP_KERNEL);
>> if (!p)
>> return ERR_PTR(-ENOMEM);
I've only seen this livelock on one machine (repeatably, but not to
order), and not fully analyzed it - two processes seen looping around
getting -EEXIST from swapcache_prepare(), I guess a third (at lower
priority? but wanting the same cpu as one of the loopers? preemption
or cond_resched() not
This enables CRIU to checkpoint and restore a process as non-root.
Over the last years CRIU upstream has been asked a couple of time if it
is possible to checkpoint and restore a process as non-root. The answer
usually was: 'almost'.
The main blocker to restore a process was that selecting the
On Fri, May 22, 2020 at 1:35 AM Sean Anderson wrote:
>
> On 5/21/20 9:45 AM, Anup Patel wrote:
> > We add DT bindings documentation for CLINT device.
> >
> > Signed-off-by: Anup Patel
> > ---
> > .../bindings/timer/sifive,clint.txt | 33 +++
> > 1 file changed, 33
Hi RobH,
On 5/14/2020 8:29 PM, Kishon Vijay Abraham I wrote:
> Add device tree schema for PCI endpoint function bus to which
> endpoint function devices should be attached. Then add device tree
> schema for PCI endpoint function device to include bindings thats
> generic to all endpoint
2020년 5월 22일 (금) 오전 3:57, Mike Kravetz 님이 작성:
>
> On 5/17/20 6:20 PM, js1...@gmail.com wrote:
> > From: Joonsoo Kim
> >
> > Currently, page allocation functions for migration requires some arguments.
> > More worse, in the following patch, more argument will be needed to unify
> > the similar
When copy_from_user() returns an error code, there
is a runtime PM usage counter imbalance.
Fix this by moving copy_from_user() to the beginning
of this function.
Signed-off-by: Dinghao Liu
---
Changelog:
v2: - Move copy_from_user() to the beginning rather
than adding
On Fri, May 22, 2020 at 9:45 AM Yuehaibing wrote:
>
> On 2020/5/21 14:49, Xin Long wrote:
> > On Tue, May 19, 2020 at 4:53 PM Steffen Klassert
> > wrote:
> >>
> >> On Fri, May 15, 2020 at 04:39:57PM +0800, Yuehaibing wrote:
> >>>
> >>> Friendly ping...
> >>>
> >>> Any plan for this issue?
> >>
>
From: Qiushi Wu
In intel_gtt_setup_scratch_page(), pointer "page" is not released if
pci_dma_mapping_error() return an error, leading to a memory leak bug.
Fix this issue by freeing "page" before return.
Fixes: 0e87d2b06cb46 ("intel-gtt: initialize our own scratch page")
Signed-off-by: Qiushi
On Fri, May 22, 2020 at 01:22:24PM +0800, dinghao@zju.edu.cn wrote:
> Sorry, it's my carelessness. In v1 I added pm_runtime_put_autosuspend()
> after copy_from_user() to fix this problem. Since copy_from_user() is
> moved to the beginning now, we need not to add PM decrement.
THat's fine,
When axi_dma_resume() returns an error code, a pairing
runtime PM usage counter decrement is needed to keep the
counter balanced.
Signed-off-by: Dinghao Liu
---
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
I hope you are doing great?
This is Felix from Toronto-Canada. I have a lucrative business
offer that will benefit us both immensely within a very short
period of time. However, I need your initial approval of interest
prior to further and complete details regarding the deal.
Thanks,
On Tue, May 19, 2020 at 05:34:13PM -0500, Alex Elder wrote:
> On 5/15/20 4:28 PM, Luis Chamberlain wrote:
> > This makes use of the new module_firmware_crashed() to help
> > annotate when firmware for device drivers crash. When firmware
> > crashes devices can sometimes become unresponsive, and
From: Qiushi Wu
In function mlx4_opreq_action(), pointer "mailbox" is not released,
when mlx4_cmd_box() return and error, causing a memory leak bug.
Fix this issue by going to "out" label, mlx4_free_cmd_mailbox() can
free this pointer.
Fixes: fe6f700d6cbb7 ("Respond to operation request by
On Fri, May 22, 2020 at 08:12:59AM +0300, Emmanuel Grumbach wrote:
> >
> > On Tue, May 19, 2020 at 10:37 PM Emmanuel Grumbach
> > wrote:
> > > So I believe we already have this uevent, it is the devcoredump. All
> > > we need is to add the unique id.
> >
> > I think there are a few reasons that
Hello,
On Thu, May 21, 2020 at 6:04 PM Maciej W. Rozycki wrote:
> Paul may or may not be reachable anymore, so I'll step in.
I'm reachable but lacking free time & with no access to Malta hardware
I can't claim to be too useful here, so thanks for responding :)
Before being moved to a driver
Sorry, it's my carelessness. In v1 I added pm_runtime_put_autosuspend()
after copy_from_user() to fix this problem. Since copy_from_user() is
moved to the beginning now, we need not to add PM decrement.
Regards,
Dinghao
> On Fri, May 22, 2020 at 10:59:02AM +0800, Dinghao Liu wrote:
> > When
On Thu, May 21, 2020 at 10:14 PM Tibor Billes wrote:
>
> Hi,
>
> On Mon, 18 May 2020, Ian Rogers wrote:
>
> > On Sat, May 16, 2020 at 6:36 AM Billes Tibor wrote:
> > >
> > > Hi,
> > >
> > > I've been hitting a freeze on my laptop since 5.3, but haven't got the
> > > time to finish bisecting it.
On Tue, May 19, 2020 at 02:15:30PM -0700, Jakub Kicinski wrote:
> Add infra for creating devlink instances for a device to report
Thanks for doing this series as a PoC, counter to the module_firmware_crash()
which I proposed to taint the kernel with a firmware crash flag to the kernel
and module.
The purpose of posting this series is to launch a test in the
intel-gfx-ci tree. (The patches have already been merged into Andrew's
linux-mm tree.)
This applies to today's linux.git (note the base-commit tag at the
bottom).
Changes since V1:
* Fixed a bug in the refactoring patch: added
This is in order to avoid a forward declaration of
internal_get_user_pages_fast(), in the next patch.
This is code movement only--all generated code should
be identical.
Signed-off-by: John Hubbard
---
mm/gup.c | 112 +++
1 file changed, 56
There were two nearly identical sets of code for gup_fast()
style of walking the page tables with interrupts disabled.
This has lead to the usual maintenance problems that arise from
having duplicated code.
There is already a core internal routine in gup.c for gup_fast(),
so just enhance it very
This code was using get_user_pages*(), in a "Case 2" scenario
(DMA/RDMA), using the categorization from [1]. That means that it's
time to convert the get_user_pages*() + put_page() calls to
pin_user_pages*() + unpin_user_pages() calls.
There is some helpful background in [2]: basically, this is a
Hi Rafael,
On 21.05.2020 19:08, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> clk_pm_runtime_get() assumes that the PM-runtime usage counter will
> be dropped by pm_runtime_get_sync() on errors, which is not the case,
> so PM-runtime references to devices acquired by the former are
This is the FOLL_PIN equivalent of __get_user_pages_fast(),
except with a more descriptive name, and gup_flags instead of
a boolean "write" in the argument list.
Signed-off-by: John Hubbard
---
include/linux/mm.h | 2 ++
mm/gup.c | 36
2 files
Hi all,
Today's linux-next merge of the device-mapper tree got a conflict in:
drivers/md/dm-zoned-metadata.c
between commit:
c64644ce363b ("block: remove the error_sector argument to blkdev_issue_flush")
from the block tree and commit:
bf28a3ba0986 ("dm zoned: store device in struct
On Tue, May 19, 2020 at 06:42:31PM +0200, Jessica Yu wrote:
> +++ Luis Chamberlain [15/05/20 21:28 +]:
> > Device driver firmware can crash, and sometimes, this can leave your
> > system in a state which makes the device or subsystem completely
> > useless. Detecting this by inspecting
Hi,
On Mon, 18 May 2020, Ian Rogers wrote:
> On Sat, May 16, 2020 at 6:36 AM Billes Tibor wrote:
> >
> > Hi,
> >
> > I've been hitting a freeze on my laptop since 5.3, but haven't got the
> > time to finish bisecting it. Now
> > I had, and here is what I found:
> >
> > - 5.2 series works
>
> On Tue, May 19, 2020 at 10:37 PM Emmanuel Grumbach
> wrote:
> > So I believe we already have this uevent, it is the devcoredump. All
> > we need is to add the unique id.
>
> I think there are a few reasons that devcoredump doesn't satisfy what
> either Luis or I want.
>
> 1) it can be
On Fri, May 22, 2020 at 10:59:02AM +0800, Dinghao Liu wrote:
> When copy_from_user() returns an error code, there
> is a runtime PM usage counter imbalance.
>
> Fix this by moving copy_from_user() to the beginning
> of this function.
>
> Signed-off-by: Dinghao Liu
> ---
>
From: Qiushi Wu
In function rxkad_verify_response(), pointer "ticket" is not released,
when function rxkad_decrypt_ticket() returns an error, causing a
memory leak bug.
Fixes: 8c2f826dc3631 ("rxrpc: Don't put crypto buffers on the stack")
Signed-off-by: Qiushi Wu
---
net/rxrpc/rxkad.c | 3 +--
When ufs_bsg_alloc_desc_buffer() returns an error code,
a pairing runtime PM usage counter decrement is needed
to keep the counter balanced.
Signed-off-by: Dinghao Liu
---
drivers/scsi/ufs/ufs_bsg.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
Hi all,
Today's linux-next merge of the block tree got a conflict in:
drivers/block/loop.c
between commit:
efbe3c2493d2 ("fs: Remove unneeded IS_DAX() check in io_is_direct()")
from the djw-vfs tree and commit:
3448914e8cc5 ("loop: Add LOOP_CONFIGURE ioctl")
from the block tree.
I
When devm_clk_get() returns an error code, a pairing
runtime PM usage counter decrement is needed to keep
the counter balanced.
Signed-off-by: Dinghao Liu
---
drivers/scsi/ufs/ti-j721e-ufs.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/scsi/ufs/ti-j721e-ufs.c
On 5/21/20 10:28 PM, Eric W. Biederman wrote:
>
> Rob Landley writes:
>
>> On 5/20/20 11:05 AM, Eric W. Biederman wrote:
>
>> Toybox would _like_ proc mounted, but can't assume it. I'm writing a new
>> bash-compatible shell with nommu support, which means in order to do subshell
>> and
When wlcore_fw_status() returns an error code, a pairing
runtime PM usage counter decrement is needed to keep the
counter balanced. It's the same for all error paths after
wlcore_fw_status().
Signed-off-by: Dinghao Liu
---
drivers/net/wireless/ti/wlcore/main.c | 17 +
1 file
Em Fri, 15 May 2020 12:06:07 -0600
Jonathan Corbet escreveu:
> On Fri, 1 May 2020 17:37:54 +0200
> Mauro Carvalho Chehab wrote:
>
> > Several files under Documentation/*.txt describe some type of
> > locking API. Move them to locking/ subdir and add to the
> > locking/index.rst index file.
>
Hi Bjorn,
In fact, most usage of pm_runtime_get_sync() is correct. I made
a static analysis tool to check this imbalance in kernel and
found about 80 bugs in dirvers. Some of my patches have been
accepted and I'm trying to patch the rest as soon as possible.
Regards,
Dinghao
> [+cc Rafael,
Em Fri, 15 May 2020 12:00:16 -0600
Jonathan Corbet escreveu:
> On Fri, 1 May 2020 17:37:50 +0200
> Mauro Carvalho Chehab wrote:
>
> > There is an special chapter inside the core-api book about
> > some debug infrastructure like tracepoints and debug objects.
> >
> > It sounded to me that
Em Fri, 15 May 2020 11:53:21 -0600
Jonathan Corbet escreveu:
> On Fri, 1 May 2020 17:37:46 +0200
> Mauro Carvalho Chehab wrote:
>
> > This describes an old interface used prior the new DMA-API
> > interfaces. Add it to the core-api guide, just after the
> > DMA stuff.
> >
> > Signed-off-by:
ory_lock);
>
> This lock here will trigger,
>
> [17368.321363][T3614103]
> ==
> [17368.321375][T3614103] WARNING: possible circular locking dependency
> detected
> [17368.321399][T3614103] 5.7.0-rc6-next-20200521+ #116 Tainted: GW
>
> [17368.321410
Dealing with the return value of get_user_pages*() variants has a few
classic pitfalls, and this driver found one of them: the return value
might be zero, positive, or -errno. And if positive, it might be fewer
pages than were requested. And if fewer pages than requested, then
the caller should
Hi,
Note that I have only compile-tested this series, although that does
also include cross-compiling for a few other arches. I'm hoping that
this posting will lead to some run-time testing.
Also: the proposed fix does not have a "Fixes:" tag, nor does it
Cc stable. That's because the issue has
This code was using get_user_pages*(), in a "Case 2" scenario
(DMA/RDMA), using the categorization from [1]. That means that it's
time to convert the get_user_pages*() + put_page() calls to
pin_user_pages*() + unpin_user_pages() calls.
There is some helpful background in [2]: basically, this is a
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.
Fixes: 542c25b7a209 ("drivers: gpio: pxa: use devm_platform_ioremap_resource()")
Signed-off-by: Tiezhu Yang
---
drivers/gpio/gpio-pxa.c | 4 ++--
1 file changed,
Add COMPILE_TEST support to the PXA GPIO driver for better compile
testing coverage.
Signed-off-by: Tiezhu Yang
---
drivers/gpio/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 03c01f4..5e90aad 100644
---
When call function devm_platform_ioremap_resource(), we should use IS_ERR()
to check the return value and return PTR_ERR() if failed.
Fixes: 72d8cb715477 ("drivers: gpio: bcm-kona: use
devm_platform_ioremap_resource()")
Signed-off-by: Tiezhu Yang
---
drivers/gpio/gpio-bcm-kona.c | 2 +-
1 file
On Thu, 2020-05-21 at 14:51 +0200, Matthias Brugger wrote:
> Hi Michael,
>
> On 23/03/2020 13:15, Michael Kao wrote:
> > This patchset supports for MT8183 chip to mtk_thermal.c.
> > Add thermal zone of all the thermal sensor in SoC for
> > another get temperatrue. They don't need to thermal
On Thu, 2020-05-21 at 14:51 +0200, Matthias Brugger wrote:
> Hi Michael,
>
> On 23/03/2020 13:15, Michael Kao wrote:
> > This patchset supports for MT8183 chip to mtk_thermal.c.
> > Add thermal zone of all the thermal sensor in SoC for
> > another get temperatrue. They don't need to thermal
Hi
On 2020/3/31 13:09, Anshuman Khandual wrote:
This series enables vmemmap backing memory allocation from device memory
ranges on arm64. But before that, it enables vmemmap_populate_basepages()
and vmemmap_alloc_block_buf() to accommodate struct vmem_altmap based
alocation requests.
I
On Thu, 21 May 2020, Julien Grall wrote:
> Hi,
>
> On 21/05/2020 00:45, Stefano Stabellini wrote:
> > From: Boris Ostrovsky
> >
> > Don't just assume that virt_to_page works on all virtual addresses.
> > Instead add a is_vmalloc_addr check and use vmalloc_to_page on vmalloc
> > virt addresses.
On Thu, 21 May 2020, Julien Grall wrote:
> Hi,
>
> On 21/05/2020 00:45, Stefano Stabellini wrote:
> > From: Stefano Stabellini
> >
> > It is not strictly needed. Call virt_to_phys on xen_io_tlb_start
> > instead. It will be useful not to have a start_dma_addr around with the
> > next patches.
>
On 22-05-20, 11:34, Xiongfeng Wang wrote:
> ACPI spec 6.2 section 8.4.7.1 provide the following two CPC registers.
>
> "Highest performance is the absolute maximum performance an individual
> processor may reach, assuming ideal conditions. This performance level
> may not be sustainable for long
On Thu, May 21, 2020 at 7:24 AM Baolin Wang wrote:
>
> Hi Jassi,
>
> On Wed, May 13, 2020 at 2:32 PM Baolin Wang wrote:
> >
> > On Wed, May 13, 2020 at 2:05 PM Jassi Brar wrote:
> > >
> > > On Tue, May 12, 2020 at 11:14 PM Baolin Wang
> > > wrote:
> > > >
> > > > Hi Jassi,
> > > >
> > > > On
In file included from ./include/linux/firmware.h:6:0,
from drivers/net/wireless/mediatek/mt76/mt7915/mcu.c:4:
In function ‘__mt7915_mcu_msg_send’,
inlined from ‘mt7915_mcu_send_message’ at
drivers/net/wireless/mediatek/mt76/mt7915/mcu.c:370:6:
The mm-of-the-moment snapshot 2020-05-21-20-42 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You
On Thu, May 21, 2020 at 10:35:56PM -0400, Joel Fernandes wrote:
> Discussed a lot with Vineeth. Below is an improved version of the pick_task()
> similification.
>
> It also handles the following "bug" in the existing code as well that Vineeth
> brought up in OSPM: Suppose 2 siblings of a core:
ACPI spec 6.2 section 8.4.7.1 provide the following two CPC registers.
"Highest performance is the absolute maximum performance an individual
processor may reach, assuming ideal conditions. This performance level
may not be sustainable for long durations, and may only be achievable if
other
To add SW BOOST support for CPPC, we need to get the max frequency of
boost mode and non-boost mode. ACPI spec 6.2 section 8.4.7.1 describe
the following two CPC registers.
"Highest performance is the absolute maximum performance an individual
processor may reach, assuming ideal conditions. This
Macro 'for_each_active_policy()' is defined internally. To avoid some
cpufreq driver needing this macro to iterate over all the policies in
'.set_boost' callback, we redefine '.set_boost' to act on only one
policy and pass the policy as an argument.
'cpufreq_boost_trigger_state()' iterate over all
Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe
controller") in order to update Vendor ID, directly wrote to
PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration
space is read-only register and writing to it will have no effect.
Use local management
Add Kishon Vijay Abraham I as MAINTAINER for TI J721E SoC PCIe.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
MAINTAINERS | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2926327e4976..9d40e1318f7c 100644
--- a/MAINTAINERS
Add support for PCIe controller in J721E SoC. The controller uses the
Cadence PCIe core programmed by pcie-cadence*.c. The PCIe controller
will work in both host mode and device mode.
Some of the features of the controller are:
*) Supports both RC mode and EP mode
*) Supports MSI and MSI-X
From: Alan Douglas
Implement ->set_msix() and ->get_msix() callback functions in order
to configure MSIX capability in the PCIe endpoint controller.
Add cdns_pcie_ep_send_msix_irq() to send MSIX interrupts to Host.
cdns_pcie_ep_send_msix_irq() gets the MSIX table address (virtual
address) from
From: Zhang Qiang
Use task_pid_nr(t) function instead of t->pid when printing
task pid
Signed-off-by: Zhang Qiang
---
kernel/hung_task.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/hung_task.c b/kernel/hung_task.c
index 14a625c16cb3..f397beb8c9e1 100644
---
Add J721E in pci_device_id table so that pci-epf-test can be used
for testing PCIe EP in J721E.
Reviewed-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
drivers/misc/pci_endpoint_test.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/misc/pci_endpoint_test.c
Add host mode dt-bindings for TI's J721E SoC.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Rob Herring
---
.../bindings/pci/ti,j721e-pci-host.yaml | 113 ++
1 file changed, 113 insertions(+)
create mode 100644
Add PCIe EP mode dt-bindings for TI's J721E SoC.
Signed-off-by: Kishon Vijay Abraham I
Reviewed-by: Rob Herring
---
.../bindings/pci/ti,j721e-pci-ep.yaml | 89 +++
1 file changed, 89 insertions(+)
create mode 100644
TI's J721E SoC uses Cadence PCIe core to implement both RC mode
and EP mode.
The high level features are:
*) Supports Legacy, MSI and MSI-X interrupt
*) Supports upto GEN4 speed mode
*) Supports SR-IOV
*) Supports multiple physical function
*) Ability to route all transactions via SMMU
Add a macro for aligning down a pointer. This is useful to get an
aligned register address when a device allows only word access and
doesn't allow half word or byte access.
Acked-by: Rob Herring
Signed-off-by: Kishon Vijay Abraham I
---
include/linux/kernel.h | 1 +
1 file changed, 1
Cadence driver uses "mem" memory resource to obtain the offset of
configuration space address region, memory space address region and
message space address region. The obtained offset is used to program
the Address Translation Unit (ATU). However certain platforms like TI's
J721E SoC require the
commit bd22885aa188 ("PCI: cadence: Refactor driver to use as a core
library") while refactoring the Cadence PCIe driver to be used as
library, removed pm_runtime_get_sync() from cdns_pcie_ep_setup()
and cdns_pcie_host_setup() but missed to remove the corresponding
pm_runtime_put_sync() in the
Certain platforms like TI's J721E using Cadence PCIe IP can perform only
32-bit accesses for reading or writing to Cadence registers. Convert all
read and write accesses to 32-bit in Cadence PCIe driver in preparation
for adding PCIe support in TI's J721E SoC.
Signed-off-by: Kishon Vijay Abraham
Certain platforms like TI's J721E allows only 32-bit configuration
space access. In such cases pci_generic_config_read and
pci_generic_config_write cannot be used. Add support in Cadence core
to let pci_host_bridge have custom pci_ops.
Signed-off-by: Kishon Vijay Abraham I
---
Add cdns_pcie_ops to start link and verify link status. The registers
to start link and to check link status is in Platform specific PCIe
wrapper. Add support for platform specific drivers to add callback
functions for the PCIe Cadence core to start link and verify link status.
Signed-off-by:
"mem" is not a memory resource and it overlaps with PCIe config space
and memory region. Removve "mem" from reg binding.
Signed-off-by: Kishon Vijay Abraham I
---
.../devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git
Hi Rob,
On 5/22/2020 3:47 AM, Rob Herring wrote:
> On Thu, May 21, 2020 at 7:33 AM Kishon Vijay Abraham I wrote:
>>
>> Hi Rob,
>>
>> On 5/21/2020 3:37 AM, Rob Herring wrote:
>>> On Wed, May 06, 2020 at 08:44:18PM +0530, Kishon Vijay Abraham I wrote:
Add support to use custom read and write
This adds the following two new VM events which will help in validating PMD
based THP migration without split. Statistics reported through these events
will help in performance debugging.
1. THP_PMD_MIGRATION_SUCCESS
2. THP_PMD_MIGRATION_FAILURE
Cc: Naoya Horiguchi
Cc: Zi Yan
Cc: John Hubbard
On Fri, May 15, 2020 at 03:44:00AM +0300, Jarkko Sakkinen wrote:
> +static int sgx_open(struct inode *inode, struct file *file)
> +{
> + struct sgx_encl *encl;
> + int ret;
> +
> + encl = kzalloc(sizeof(*encl), GFP_KERNEL);
> + if (!encl)
> + return -ENOMEM;
> +
> +
Rob Landley writes:
> On 5/20/20 11:05 AM, Eric W. Biederman wrote:
> Toybox would _like_ proc mounted, but can't assume it. I'm writing a new
> bash-compatible shell with nommu support, which means in order to do subshell
> and background tasks if (!CONFIG_FORK) I need to create a pipe pair,
On 2020/5/22 5:14, John Fastabend wrote:
> Jakub Kicinski wrote:
>> On Fri, 8 May 2020 22:58:29 -0700 Jakub Kicinski wrote:
>>> On Sat, 9 May 2020 11:32:10 +0800 Zefan Li wrote:
If systemd is configured to use hybrid mode which enables the use of
both cgroup v1 and v2, systemd will
Hi Rob,
On 2020/5/21 21:29, Rob Herring wrote:
> On Thu, May 21, 2020 at 3:35 AM Chen Zhou wrote:
>> Add documentation for DT property used by arm64 kdump:
>> linux,low-memory-range.
>> "linux,low-memory-range" is an another memory region used for crash
>> dump kernel devices.
>>
>>
Hi Aaron,
"Brown, Aaron F" writes:
>> From: netdev-ow...@vger.kernel.org On
>> Behalf Of Punit Agrawal
>> Sent: Thursday, May 14, 2020 9:31 PM
>> To: Kirsher, Jeffrey T
>> Cc: daniel.sangor...@toshiba.co.jp; Punit Agrawal
>> ; Alexander Duyck
>> ; David S. Miller ;
>>
This commit introduces support for the pin controller on A100.
Signed-off-by: Frank Lee
---
drivers/pinctrl/sunxi/Kconfig | 10 +
drivers/pinctrl/sunxi/Makefile| 2 +
drivers/pinctrl/sunxi/pinctrl-sun50i-a100-r.c | 105 +++
Hi,
On Mon, May 04, 2020 at 07:56:22PM +0800, Leo Yan wrote:
> This patch set is to support synthetic events with enabling Arm SPE
> decoder. Since before Xiaojun Tan (Hisilicon) and James Clark (Arm)
> have contributed much for this task, so this patch set is based on their
> privous work and
Add support for a100 in the sunxi-ng CCU framework.
Signed-off-by: Frank Lee
---
drivers/clk/sunxi-ng/Kconfig | 10 +
drivers/clk/sunxi-ng/Makefile |2 +
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.c | 206 +++
drivers/clk/sunxi-ng/ccu-sun50i-a100-r.h
Allwinner A100 is a new SoC with Cortex-A53 cores, this commit adds
the basical DTSI file of it, including the clock, pins and UART support.
Signed-off-by: Frank Lee
---
.../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 173 ++
1 file changed, 173 insertions(+)
create mode 100644
A100 perf1 is an Allwinner A100-based SBC, with the following features:
- 1GiB DDR3 DRAM
- AXP803 PMIC
- 2 USB 2.0 ports
- MicroSD slot and on-board eMMC module
- on-board Nand flash
- ···
Adds initial support for it, including the UART.
Signed-off-by: Frank Lee
---
This patch set adds initial support for allwinner a100 soc,
which is a 64-bit tablet chip.
Frank Lee (4):
clk: sunxi-ng: add support for the Allwinner A100 CCU
pinctrl: sunxi: add support for the Allwinner A100 pin controller
arm64: allwinner: A100: add the basical Allwinner A100 DTSI file
Hi all,
Today's linux-next merge of the jc_docs tree got a conflict in:
Documentation/filesystems/fiemap.rst
between commit:
469581d9e5c9 ("fs: move fiemap range validation into the file systems
instances")
from the ext4 tree and commit:
e6f7df74ec1a ("docs: filesystems: convert
On Fri, May 22, 2020 at 12:57:51PM +1000, Dave Chinner wrote:
> On Thu, May 21, 2020 at 05:04:11PM -0700, Matthew Wilcox wrote:
> > On Fri, May 22, 2020 at 08:49:06AM +1000, Dave Chinner wrote:
> > > Ok, so the main issue I have with the filesystem/iomap side of
> > > things is that it appears to
How are you and your family? my name is Prashant Wong Lin,
i am a native of Hong Kong but resides and a citizen of United Kingdom.
I work with an Oil and Gas Company here in London, tell me about you? Your work
etc
--
This email has been checked for viruses by Avast antivirus software.
On Thu, May 21, 2020 at 02:06:17PM -0700, Dan Williams wrote:
> The typical usage of unmap_mapping_range() is part of
> truncate_pagecache() to punch a hole in a file, but in this case the
> implementation is only doing the "first half" of a hole punch. Namely it
> is just evacuating current
When copy_from_user() returns an error code, there
is a runtime PM usage counter imbalance.
Fix this by moving copy_from_user() to the beginning
of this function.
Signed-off-by: Dinghao Liu
---
drivers/usb/musb/musb_debugfs.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
On Thu, May 21, 2020 at 05:04:11PM -0700, Matthew Wilcox wrote:
> On Fri, May 22, 2020 at 08:49:06AM +1000, Dave Chinner wrote:
> > Ok, so the main issue I have with the filesystem/iomap side of
> > things is that it appears to be adding "transparent huge page"
> > awareness to the filesysetm
tthew Auld
Cc: Matthew Wilcox
Cc: Rodrigo Vivi
Cc: Souptick Joarder
Cc: Tvrtko Ursulin
Signed-off-by: John Hubbard
---
Hi Andrew, Chris,
Andrew: This is a fixup that applies to today's (20200521) linux-next.
In that tree, this fixes up:
commit dfb8dfe80808 ("mm/gup: refactor and de-dup
On 2020/5/22 3:31, Kuppuswamy, Sathyanarayanan wrote:
>
>
> On 5/21/20 3:58 AM, Yicong Yang wrote:
>> On 2020/5/21 1:04, Kuppuswamy, Sathyanarayanan wrote:
>>>
>>>
>>> On 5/20/20 1:28 AM, Yicong Yang wrote:
On 2020/5/7 11:32, sathyanarayanan.kuppusw...@linux.intel.com wrote:
> From:
When initializing CMDQ fails because of reset pending,
there is no hint for debugging, so adds a log for it.
Signed-off-by: Huazhong Tan
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
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