Re: [PATCH v3 1/2] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller

2019-09-05 Thread Chuan Hua, Lei
On 9/6/2019 4:31 AM, Martin Blumenstingl wrote: Hi Dilip, On Wed, Sep 4, 2019 at 12:11 PM Dilip Kota wrote: [...] +properties: + compatible: +const: intel,lgm-pcie should we add the "snps,dw-pcie" here (and in the example below) as well? (this is what for example

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-09-04 Thread Chuan Hua, Lei
Hi Martin, On 9/3/2019 6:04 AM, Martin Blumenstingl wrote: Hi, On Mon, Sep 2, 2019 at 11:45 AM Chuan Hua, Lei wrote: Hi Martin, On 9/2/2019 5:38 AM, Martin Blumenstingl wrote: Hi, On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei wrote: Hi Martin, On 8/30/2019 5:40 AM, Martin

Re: [PATCH v3 2/2] dwc: PCI: intel: Intel PCIe RC controller driver

2019-09-04 Thread Chuan Hua, Lei
Hi Dilip, On 9/4/2019 6:10 PM, Dilip Kota wrote: Add support to PCIe RC controller on Intel Universal Gateway SoC. PCIe controller is based of Synopsys Designware pci core. Signed-off-by: Dilip Kota --- changes on v3: Rename PCIe app logic registers with PCIE_APP prefix.

Re: [PATCH v3 1/2] dt-bindings: PCI: intel: Add YAML schemas for the PCIe RC controller

2019-09-04 Thread Chuan Hua, Lei
Hi Dilip, On 9/4/2019 6:10 PM, Dilip Kota wrote: The Intel PCIe RC controller is Synopsys Designware based PCIe core. Add YAML schemas for PCIe in RC mode present in Intel Universal Gateway soc. Signed-off-by: Dilip Kota --- changes on v3: Add the appropriate License-Identifier

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-09-02 Thread Chuan Hua, Lei
Hi Martin, On 9/2/2019 5:38 AM, Martin Blumenstingl wrote: Hi, On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei wrote: Hi Martin, On 8/30/2019 5:40 AM, Martin Blumenstingl wrote: Hi, On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei wrote: I'm not surprised that we got some of the IP block

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-08-29 Thread Chuan Hua, Lei
Hi Martin, On 8/30/2019 5:40 AM, Martin Blumenstingl wrote: Hi, On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei wrote: I'm not surprised that we got some of the IP block layout for the VRX200 RCU "wrong" - all "documentation" we have is the old Lantiq UGW (BSP). with

Re: [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver

2019-08-28 Thread Chuan Hua, Lei
On 8/29/2019 3:36 AM, Martin Blumenstingl wrote: On Wed, Aug 28, 2019 at 5:35 AM Chuan Hua, Lei wrote: [...] +static int intel_pcie_ep_rst_init(struct intel_pcie_port *lpp) +{ +struct device *dev = lpp->pci->dev; +int ret = 0; + +lpp->reset_gpio = devm_gpiod_get(de

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-08-28 Thread Chuan Hua, Lei
On 8/29/2019 4:01 AM, Martin Blumenstingl wrote: Hi, On Wed, Aug 28, 2019 at 3:53 AM Chuan Hua, Lei wrote: [...] 1. reset-lantiq.c use index instead of register offset + bit position. index reset is good for a small system (< 64). However, it will become very difficult to use if you h

Re: [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver

2019-08-27 Thread Chuan Hua, Lei
Hi Martin, Thanks for your comment. On 8/28/2019 4:38 AM, Martin Blumenstingl wrote: Hello, On Tue, Aug 27, 2019 at 5:09 AM Chuan Hua, Lei wrote: Hi Martin, Thanks for your feedback. Please check the comments below. On 8/27/2019 5:15 AM, Martin Blumenstingl wrote: Hello, On Mon, Aug 26

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-08-27 Thread Chuan Hua, Lei
Hi Martin, On 8/28/2019 5:15 AM, Martin Blumenstingl wrote: Hi, On Tue, Aug 27, 2019 at 4:23 AM Chuan Hua, Lei wrote: [...] 1. reset-lantiq.c use index instead of register offset + bit position. index reset is good for a small system (< 64). However, it will become very difficult to

Re: [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver

2019-08-26 Thread Chuan Hua, Lei
Hi Martin, Thanks for your feedback. Please check the comments below. On 8/27/2019 5:15 AM, Martin Blumenstingl wrote: Hello, On Mon, Aug 26, 2019 at 5:31 AM Chuan Hua, Lei wrote: Hi Martin, Thanks for your valuable comments. I reply some of them as below. you're welcome [...] +config

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-08-26 Thread Chuan Hua, Lei
Hi Martin, Please check the reply below. On 8/27/2019 5:49 AM, Martin Blumenstingl wrote: Hi, On Mon, Aug 26, 2019 at 6:01 AM Chuan Hua, Lei wrote: Hi Martin, Thanks for your comment. thank you for the quick reply On 8/25/2019 5:11 AM, Martin Blumenstingl wrote: Hi Dilip, Add driver

Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM SoC

2019-08-25 Thread Chuan Hua, Lei
Hi Martin, Thanks for your comment. On 8/25/2019 5:11 AM, Martin Blumenstingl wrote: Hi Dilip, Add driver for the reset controller present on Intel Lightening Mountain (LGM) SoC for performing reset management of the devices present on the SoC. Driver also registers a reset handler to peform

Re: [PATCH v2 3/3] dwc: PCI: intel: Intel PCIe RC controller driver

2019-08-25 Thread Chuan Hua, Lei
Hi Martin, Thanks for your valuable comments. I reply some of them as below. Regards, Chuanhua On 8/25/2019 5:03 AM, Martin Blumenstingl wrote: Hi Dilip, first of all: thank you for submitting this upstream! I hope that we can use this driver to replace the out-of-tree PCIe driver that's

Re: [PATCH v15 19/26] x86/tsc: calibrate tsc only once

2018-09-05 Thread Chuan Hua, Lei
static unsigned long __init get_loops_per_jiffy(void) { unsigned long lpj = tsc_khz * KHZ; do_div(lpj, HZ); return lpj; } Just tried this with 4.19-rc2 on x86(32bit). lpj return as zero which is not expected After disassembling the code, 0xc1239a9e <+199>:

Re: [PATCH v15 19/26] x86/tsc: calibrate tsc only once

2018-09-05 Thread Chuan Hua, Lei
static unsigned long __init get_loops_per_jiffy(void) { unsigned long lpj = tsc_khz * KHZ; do_div(lpj, HZ); return lpj; } Just tried this with 4.19-rc2 on x86(32bit). lpj return as zero which is not expected After disassembling the code, 0xc1239a9e <+199>: