Re: [RFC] ITS fails to allocate on rk3568/rk3566

Hi Marc, On 2021/4/15 下午4:11, Marc Zyngier wrote: Hi Kever, On Thu, 15 Apr 2021 08:24:33 +0100, Kever Yang wrote: Hi Marc, Peter,     RK356x GIC has two issues: 1. GIC only support 32bit address while rk356x supports 8GB DDR SDRAM, so we use ZONE_DMA32 to fix this issue; What

Re: [RFC] ITS fails to allocate on rk3568/rk3566

Hi Marc, Peter,     RK356x GIC has two issues: 1. GIC only support 32bit address while rk356x supports 8GB DDR SDRAM, so we use ZONE_DMA32 to fix this issue; 2. GIC version is r1p6-00rel0, RK356x interconnect does not support GIC and CPU snoop to each other, hence the GIC does not support

Re: [PATCH v3 4/4] clk: rockchip: add clock controller for rk3568

On 2021/3/1 下午2:47, Elaine Zhang wrote: Add the clock tree definition for the new rk3568 SoC. Signed-off-by: Elaine Zhang Patch looks good to me. Reviewed-by: Kever Yang Thanks, - Kever --- drivers/clk/rockchip/Kconfig |7 + drivers/clk/rockchip/Makefile |1

Re: [PATCH v3 2/4] clk: rockchip: add dt-binding header for rk3568

On 2021/3/1 下午2:47, Elaine Zhang wrote: Add the dt-bindings header for the rk3568, that gets shared between the clock controller and the clock references in the dts. Add softreset ID for rk3568. Signed-off-by: Elaine Zhang Patch looks good to me. Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v3 3/4] clk: rockchip: support more core div setting

On 2021/3/1 下午2:47, Elaine Zhang wrote: Use arrays to support more core independent div settings. A55 supports each core to work at different frequencies, and each core has an independent divider control. Signed-off-by: Elaine Zhang Patch looks good to me. Reviewed-by: Kever Yang Thanks

Re: [PATCH v3 1/4] dt-binding: clock: Document rockchip,rk3568-cru bindings

On 2021/3/1 下午2:47, Elaine Zhang wrote: Document the device tree bindings of the rockchip Rk3568 SoC clock driver in Documentation/devicetree/bindings/clock/rockchip,rk3568-cru.yaml. Signed-off-by: Elaine Zhang Patch looks good to me. Reviewed-by: Kever Yang <mailto:kever.y...@r

Re: [PATCH v2] drm/of: Consider the state in which the ep is disabled

Hi Daniel, On 2020/10/15 下午11:23, Daniel Vetter wrote: On Wed, Oct 14, 2020 at 09:48:43AM +0800, Kever Yang wrote: Hi Maintainers,     Does this patch ready to merge? Would maybe be good to get some acks from other drivers using this, then Sandy can push to drm-misc-next. Thanks for your

Re: [PATCH v2] drm/of: Consider the state in which the ep is disabled

) { + if (!of_device_is_available(ep)) + continue; + remote_port = of_graph_get_remote_port(ep); if (!remote_port) { of_node_put(ep); Looks good to me. Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v10 0/8] Add Rockchip NFC drivers for RK3308 and others

Hi Miquel and maintainers,     This patch set seems ready for upstream, could you pick and merge to linux-mtd? Thanks, - Kever On 2020/9/30 上午10:07, Yifeng Zhao wrote: Rockchp's NFC(Nand Flash Controller) has four versions: V600, V622, V800 and V900.This series patch can support all four

Re: [PATCH v10 8/8] arm: dts: rockchip: Add NFC node for RK3036 SoC

Changes in v2: None arch/arm/boot/dts/rk3036.dtsi | 52 +++ 1 file changed, 52 insertions(+) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 093567022386..dda5a1f79aca

Re: [PATCH v3 3/3] pinctrl: rockchip: create irq mapping in gpio_to_irq【请注意，邮件由linux-rockchip-bounces+kever.yang=rock-chips....@lists.infradead.org代发】

/* map the gpio irqs here, when the clock is still running */ - for (j = 0 ; j < 32 ; j++) - irq_create_mapping(bank->domain, j); - clk_disable(bank->clk); } Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v3 1/3] pinctrl: rockchip: make driver be tristate module【请注意，邮件由linux-rockchip-bounces+kever.yang=rock-chips....@lists.infradead.org代发】

ESCRIPTION("ROCKCHIP Pin Controller Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:pinctrl-rockchip"); +MODULE_DEVICE_TABLE(of, rockchip_pinctrl_dt_match); Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v10 6/8] arm: dts: rockchip: Add NFC node for RV1108 SoC

Changes in v2: None arch/arm/boot/dts/rv1108.dtsi | 11 +++ 1 file changed, 11 insertions(+) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index a1a08cb9364e..1696ea19488b 100644 --- a/arch/arm/boot

Re: [PATCH v10 7/8] arm: dts: rockchip: Add NFC node for RK2928 and other SoCs

: None Changes in v3: None Changes in v2: None arch/arm/boot/dts/rk3xxx.dtsi | 9 + 1 file changed, 9 insertions(+) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 859a7477909f..97415180d5bb

Re: [PATCH v10 2/8] mtd: rawnand: rockchip: NFC drivers for RK3308, RK2928 and others

for subpages. - No support for the builtin randomizer. - The original bad block mask is not supported. It is recommended to use the BBT(bad block table). Signed-off-by: Yifeng Zhao Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v10: - Fix compile error on master v5.9

Re: [PATCH v10 1/8] dt-bindings: mtd: Describe Rockchip RK3xxx NAND flash controller

the title for the dt-bindings. Changes in v2: None .../mtd/rockchip,nand-controller.yaml | 162 ++ 1 file changed, 162 insertions(+) create mode 100644 Documentation/devicetree/bindings/mtd/rockchip,nand-controller.yaml Looks good to me, Reviewed-by: Kever Yang Thanks

Re: [PATCH v10 4/8] arm64: dts: rockchip: Add NFC node for RK3308 SoC

: None Changes in v4: None Changes in v3: None Changes in v2: None arch/arm64/boot/dts/rockchip/rk3308.dtsi | 15 +++ 1 file changed, 15 insertions(+) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot

Re: [PATCH v10 5/8] arm64: dts: rockchip: Add NFC node for PX30 SoC

in v2: None arch/arm64/boot/dts/rockchip/px30.dtsi | 15 +++ 1 file changed, 15 insertions(+) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 2695ea8cda14

Re: [PATCH v3 2/3] pinctrl: rockchip: enable gpio pclk for rockchip_gpio_to_irq【请注意，邮件由linux-rockchip-bounces+kever.yang=rock-chips....@lists.infradead.org代发】

) if (!bank->domain) return -ENXIO; + clk_enable(bank->clk); virq = irq_create_mapping(bank->domain, offset); + clk_disable(bank->clk); return (virq) ? : -ENXIO; } Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v10 3/8] MAINTAINERS: add maintainers to ROCKCHIP NFC

MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) Looks good to me, Reviewed-by: Kever Yang Thanks, - Kever diff --git a/MAINTAINERS b/MAINTAINERS index 190c7fa2ea01..5500df349836 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2382,12 +2382,12 @@ L: linux-arm-ker

Re: [PATCH v2 3/6] clk: rockchip: Export rockchip_register_softrst()

(rockchip_register_softrst); This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v2 2/6] clk: rockchip: Export rockchip_clk_register_ddrclk()

(rockchip_clk_register_ddrclk); This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v2 6/6] clk: rockchip: rk3399: Support module build

TION("Rockchip RK3399 Clock Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:clk-rk3399"); This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v2 5/6] clk: rockchip: fix the clk config to support module build

+= clk-rk3036.o +obj-$(CONFIG_CLK_RK312X)+= clk-rk3128.o +obj-$(CONFIG_CLK_RK3188)+= clk-rk3188.o +obj-$(CONFIG_CLK_RK322X)+= clk-rk3228.o +obj-$(CONFIG_CLK_RK3288)+= clk-rk3288.o +obj-$(CONFIG_CLK_RK3308) += clk-rk3308.o +obj-$(CONFIG_CLK_RK3328)+= clk-rk3328.o +obj-$(CONFIG_CLK_RK3368)+= clk-rk3368.o +obj-$(CONFIG_CLK_RK3399)+= clk-rk3399.o This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v2 1/6] clk: rockchip: Use clk_hw_register_composite instead of clk_register_composite calls

fix); kfree(gate); + return ERR_CAST(hw); } - return clk; + return hw->clk; } struct rockchip_clk_provider * __init rockchip_clk_init(struct device_node *np, This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

Re: [PATCH v2 4/6] clk: rockchip: Export some clock common APIs for module drivers

chip_register_restart_notifier); This looks good to me, so Reviewed-by: Kever Yang Thanks, - Kever

[PATCH v2 2/2] dt-bindings: arm: rockchip: remove reference to fennec board

The rk3288 fennec board has been removed, remove the binding document at the same time. Signed-off-by: Kever Yang --- Changes in v2: None Documentation/devicetree/bindings/arm/rockchip.yaml | 5 - 1 file changed, 5 deletions(-) diff --git a/Documentation/devicetree/bindings/arm

[PATCH v2 1/2] ARM: dts: rockchip: remove rk3288 fennec board support

Since there is no one using this board, remove it. Signed-off-by: Kever Yang --- Changes in v2: - update document at the same time arch/arm/boot/dts/Makefile | 1 - arch/arm/boot/dts/rk3288-fennec.dts | 347 2 files changed, 348 deletions(-) delete

Re: [PATCH] ARM: dts: rockchip: remove rk3288 fennec board support

On 2019/8/20 下午9:56, Heiko Stuebner wrote: Hi Kever, Am Dienstag, 20. August 2019, 12:03:52 CEST schrieb Kever Yang: Since there is no one using this board, remove it. so just to elaborate a bit, I guess this board was internal to Rockchip, never went to the market and therefore is obsolete

[PATCH] ARM: dts: rockchip: remove rk3288 fennec board support

Since there is no one using this board, remove it. Signed-off-by: Kever Yang --- arch/arm/boot/dts/rk3288-fennec.dts | 347 1 file changed, 347 deletions(-) delete mode 100644 arch/arm/boot/dts/rk3288-fennec.dts diff --git a/arch/arm/boot/dts/rk3288-fennec.dts b

Re: [PATCH v2] arm: dts: rockchip: fix vcc_host_5v regulator for usb3 host

Hi Heiko, On 2019/8/16 下午8:24, Heiko Stuebner wrote: Hi Kever, TL, [added TL Lim for clarification] Am Donnerstag, 15. August 2019, 10:12:52 CEST schrieb Kever Yang: According to rock64 schemetic V2 and V3, the VCC_HOST_5V output is controlled by USB_20_HOST_DRV, which is the same

[PATCH v2] arm: dts: rockchip: fix vcc_host_5v regulator for usb3 host

According to rock64 schemetic V2 and V3, the VCC_HOST_5V output is controlled by USB_20_HOST_DRV, which is the same as VCC_HOST1_5V. Signed-off-by: Kever Yang --- Changes in v2: - remove enable-active-high property arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 11 ++- 1 file

[PATCH] arm: dts: rockchip: fix vcc_host_5v regulator for usb3 host

According to rock64 schemetic V2 and V3, the VCC_HOST_5V output is controlled by USB_20_HOST_DRV, which is the same as VCC_HOST1_5V. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3328-rock64.dts | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/arch

[PATCH] arm64: dts: rk3399: init vop clock rates

We need to init vop aclk and hclk incase the U-Boot does not do the initialize. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm6

[PATCH] arm64: dts: rk3399: init vop clock rates

We need to init vop aclk and hclk incase the U-Boot does not do the initialize. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi

Re: [PATCH] RM: dts: rockchip: rk322x: add spi node and spi pinctrl

Hi Huibing, Does this patch suppose to be V3? and there is a typo in subject. Thanks, - Kever On 08/07/2017 09:45 AM, Huibin Hong wrote: Add spi node and spi pinctrl for rk322x Signed-off-by: Huibin Hong --- arch/arm/boot/dts/rk322x.dtsi | 50

Re: [PATCH] RM: dts: rockchip: rk322x: add spi node and spi pinctrl

Hi Huibing, Does this patch suppose to be V3? and there is a typo in subject. Thanks, - Kever On 08/07/2017 09:45 AM, Huibin Hong wrote: Add spi node and spi pinctrl for rk322x Signed-off-by: Huibin Hong --- arch/arm/boot/dts/rk322x.dtsi | 50

Re: [PATCH 2/3] arm: dts: rk322x: correct uart2 pinctrl and add another sets

Hi Frank, On 05/17/2017 11:40 AM, Frank Wang wrote: Correct UART2 PINCTRL flag and add another PINCTRL sets for UART2 in case of confict with SDMMC. Signed-off-by: Frank Wang --- arch/arm/boot/dts/rk322x.dtsi | 11 +-- 1 file changed, 9 insertions(+), 2

Re: [PATCH 2/3] arm: dts: rk322x: correct uart2 pinctrl and add another sets

Hi Frank, On 05/17/2017 11:40 AM, Frank Wang wrote: Correct UART2 PINCTRL flag and add another PINCTRL sets for UART2 in case of confict with SDMMC. Signed-off-by: Frank Wang --- arch/arm/boot/dts/rk322x.dtsi | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git

Re: [PATCH 3/4] ARM: dts: rockchip: use pin constants to describe IO in pinctrl

Heiko, On 05/10/2017 05:43 AM, Heiko Stuebner wrote: Am Mittwoch, 12. April 2017, 15:10:43 CEST schrieb Kever Yang: Use command below to replace the IO naming in pinctrl: sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk* sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/' arch/arm64

Re: [PATCH 3/4] ARM: dts: rockchip: use pin constants to describe IO in pinctrl

Heiko, On 05/10/2017 05:43 AM, Heiko Stuebner wrote: Am Mittwoch, 12. April 2017, 15:10:43 CEST schrieb Kever Yang: Use command below to replace the IO naming in pinctrl: sed -i -e 's/ 31 RK_FUNC_/ RK_PD7 RK_FUNC_/' arch/arm/boot/dts/rk* sed -i -e 's/ 0 RK_FUNC_/ RK_PA0 RK_FUNC_/' arch/arm64

Re: [PATCH v3] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, On 04/12/2017 09:29 PM, Heiko Stuebner wrote: Hi Kever, Am Montag, 10. April 2017, 11:50:13 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T-Firefly, you can find detail about it here: http://en.t-firefly.com/en/firenow/Firefly_RK3399/ This patch add basic node

Re: [PATCH v3] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, On 04/12/2017 09:29 PM, Heiko Stuebner wrote: Hi Kever, Am Montag, 10. April 2017, 11:50:13 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T-Firefly, you can find detail about it here: http://en.t-firefly.com/en/firenow/Firefly_RK3399/ This patch add basic node

[PATCH 4/4] arm64: dts: rk3399: add pinctrl for some peripheral

Add pinctrl for sdio, sdmmc, pcie, spdif, hdmi. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 113 +++ 1 file changed, 113 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm6

[PATCH 4/4] arm64: dts: rk3399: add pinctrl for some peripheral

Add pinctrl for sdio, sdmmc, pcie, spdif, hdmi. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 113 +++ 1 file changed, 113 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi

[PATCH 2/4] arm64: dts: rk3399: add power domain for some peripheral

Add power domain for sd, usb, edp. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 36 +++- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm6

[PATCH 2/4] arm64: dts: rk3399: add power domain for some peripheral

Add power domain for sd, usb, edp. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 36 +++- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi

[PATCH 1/4] arm64: dts: rk3399: add missing qos node

Add qos setting reg for some peripheral like sd, usb, pcie. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 1 file changed, 40 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/ro

[PATCH 1/4] arm64: dts: rk3399: add missing qos node

Add qos setting reg for some peripheral like sd, usb, pcie. Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 45 1 file changed, 40 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot

[PATCH v3] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v3: - remove not upstream defined properties; - remove fusb302 and gsl367

[PATCH v3] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang --- Changes in v3: - remove not upstream defined properties; - remove fusb302 and gsl3673 node Changes in v2: - rebase

Re: [PATCH v2 1/2] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, On 04/08/2017 07:01 AM, Heiko Stuebner wrote: Hi Kever, Am Mittwoch, 5. April 2017, 17:33:19 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T-Firefly, you can find detail about it here: http://en.t-firefly.com/en/firenow/Firefly_RK3399/ This patch add basic node

Re: [PATCH v2 1/2] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, On 04/08/2017 07:01 AM, Heiko Stuebner wrote: Hi Kever, Am Mittwoch, 5. April 2017, 17:33:19 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T-Firefly, you can find detail about it here: http://en.t-firefly.com/en/firenow/Firefly_RK3399/ This patch add basic node

[PATCH v2 2/2] dt-bindings: document: add firefly-rk3399 board support

Use "firefly,firefly-rk3399" compatible string for firefly-rk3399 board. Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: None Documentation/devicetree/bindings/arm/rockchip.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/dev

[PATCH v2 2/2] dt-bindings: document: add firefly-rk3399 board support

Use "firefly,firefly-rk3399" compatible string for firefly-rk3399 board. Signed-off-by: Kever Yang --- Changes in v2: None Documentation/devicetree/bindings/arm/rockchip.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockc

[PATCH v2 1/2] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - rebase on Heiko's for-next - using pinctrl binding header definition i

[PATCH v2 1/2] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang --- Changes in v2: - rebase on Heiko's for-next - using pinctrl binding header definition instead of a number - other fix

Re: [PATCH] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, Andreas, On 04/01/2017 03:41 AM, Heiko Stuebner wrote: Hi, Am Freitag, 31. März 2017, 18:59:49 CEST schrieb Andreas Färber: Am 31.03.2017 um 14:56 schrieb Heiko Stuebner: Hi Kever, Am Freitag, 31. März 2017, 17:59:07 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T

Re: [PATCH] arm64: dts: rk3399: add support for firefly-rk3399 board

Hi Heiko, Andreas, On 04/01/2017 03:41 AM, Heiko Stuebner wrote: Hi, Am Freitag, 31. März 2017, 18:59:49 CEST schrieb Andreas Färber: Am 31.03.2017 um 14:56 schrieb Heiko Stuebner: Hi Kever, Am Freitag, 31. März 2017, 17:59:07 CEST schrieb Kever Yang: Firefly-rk3399 is a bord from T

[PATCH] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/

[PATCH] arm64: dts: rk3399: add support for firefly-rk3399 board

: - USB 3.0 HOST, type-C port - sdio, sd-card Not test for other peripheral: - HDMI - Ethernet - OPTICAL - WiFi/BT - MIPI CSI/DSI - IR - EDP/DP Signed-off-by: Kever Yang --- arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-firefly.dts | 772

Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support

Hi David, On 03/02/2017 03:11 PM, David Wu wrote: From: "david.wu" You do not need to add this when you send mail for yourself, it's need when you send mail for others. To prevent external signal crosstalk, some pins need to enable input schmitt, like i2c pins,

Re: [PATCH v2 1/2] pinctrl: rockchip：Add input schmitt support

Hi David, On 03/02/2017 03:11 PM, David Wu wrote: From: "david.wu" You do not need to add this when you send mail for yourself, it's need when you send mail for others. To prevent external signal crosstalk, some pins need to enable input schmitt, like i2c pins, 32k-input pin and so on.

Re: [v2 PATCH 2/4] phy: Add USB Type-C PHY driver for rk3399

operate at RBR, HBR and HBR2 data rates. Signed-off-by: Chris Zhong <z...@rock-chips.com> Signed-off-by: Kever Yang <kever.y...@rock-chips.com> --- Changes in v2: - select RESET_CONTROLLER - alphabetic order - modify some spelling mistakes - make mode cleaner - use bool for enable/dis

Re: [v2 PATCH 2/4] phy: Add USB Type-C PHY driver for rk3399

operate at RBR, HBR and HBR2 data rates. Signed-off-by: Chris Zhong Signed-off-by: Kever Yang --- Changes in v2: - select RESET_CONTROLLER - alphabetic order - modify some spelling mistakes - make mode cleaner - use bool for enable/disable - check all of the return value - return a better err

Re: [PATCH 1/6] phy: Add USB Type-C PHY driver for rk3399

@@ -0,0 +1,823 @@ +/* + * Rockchip usb3 PHY driver + * + * Copyright (C) 2016 Kever Yang <kever.y...@rock-chips.com> + *Chris Zhong <z...@rock-chips.com> + * Copyright (C) 2016 ROCKCHIP, Inc. + * + * This program is free software; you can redistribute it and/or mo

Re: [PATCH 1/6] phy: Add USB Type-C PHY driver for rk3399

+ * Rockchip usb3 PHY driver + * + * Copyright (C) 2016 Kever Yang + *Chris Zhong + * Copyright (C) 2016 ROCKCHIP, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free

Re: [PATCH 0/6] Rockchip Type-C and DispplayPort driver

Hi Chris, On 05/27/2016 02:02 PM, Chris Zhong wrote: Hi all This series patch is for rockchip Type-C phy and DisplayPort controller driver. The USB Type-C PHY is designed to support the USB3 and DP applications. The PHY basically has two main components: USB3 and DisplyPort. USB3 operates in

Re: [PATCH 0/6] Rockchip Type-C and DispplayPort driver

Hi Chris, On 05/27/2016 02:02 PM, Chris Zhong wrote: Hi all This series patch is for rockchip Type-C phy and DisplayPort controller driver. The USB Type-C PHY is designed to support the USB3 and DP applications. The PHY basically has two main components: USB3 and DisplyPort. USB3 operates in

Re: [PATCH v6 20/22] usb: dwc2: host: Properly set even/odd frame

Doug, Thanks for your detail debug information, pls add my Reviewed-by for this patch. Thanks, - Kever On 02/03/2016 06:47 AM, Doug Anderson wrote: Kever, On Mon, Feb 1, 2016 at 11:46 PM, Kever Yang wrote: Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: When setting up ISO

Re: [PATCH v6 20/22] usb: dwc2: host: Properly set even/odd frame

Doug, Thanks for your detail debug information, pls add my Reviewed-by for this patch. Thanks, - Kever On 02/03/2016 06:47 AM, Doug Anderson wrote: Kever, On Mon, Feb 1, 2016 at 11:46 PM, Kever Yang <kever.y...@rock-chips.com> wrote: Doug, On 01/29/2016 10:20 AM, Douglas Anderson

Re: [PATCH v6 20/22] usb: dwc2: host: Properly set even/odd frame

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: When setting up ISO and INT transfers dwc2 needs to specify whether the transfer is for an even or an odd frame (or microframe if the controller is running in high speed mode). The controller appears to use this as a simple way to figure

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 02/02/2016 08:36 AM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 8:36 PM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 7:32 PM, Kever Yang wrote: Doug, On 02/01/2016 06:09 AM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 1:36 AM, Kever Yang wrote: Doug

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 02/02/2016 08:36 AM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 8:36 PM, Doug Anderson <diand...@chromium.org> wrote: Kever, On Sun, Jan 31, 2016 at 7:32 PM, Kever Yang <kever.y...@rock-chips.com> wrote: Doug, On 02/01/2016 06:09 AM, Doug Anderson wrote: Ke

Re: [PATCH v6 20/22] usb: dwc2: host: Properly set even/odd frame

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: When setting up ISO and INT transfers dwc2 needs to specify whether the transfer is for an even or an odd frame (or microframe if the controller is running in high speed mode). The controller appears to use this as a simple way to figure

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 02/01/2016 06:09 AM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 1:36 AM, Kever Yang wrote: Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: In dwc2_hcd_qh_deactivate() we will put some things on the periodic_sched_ready list. These things won't be taken off

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: In dwc2_hcd_qh_deactivate() we will put some things on the periodic_sched_ready list. These things won't be taken off the ready list until the next SOF, which might be a little late. Let's put them on right away. Signed-off-by: Douglas

Re: [PATCH v6 10/22] usb: dwc2: host: Properly set the HFIR

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: According to the most up to date version of the dwc2 databook, the FRINT field of the HFIR register should be programmed to: * 125 us * (PHY clock freq for HS) - 1 * 1000 us * (PHY clock freq for FS/LS) - 1 I got 3 version of dwc_otg

Re: [PATCH v6 11/22] usb: dwc2: host: There's not really a TT for the root hub

Doug, Reviewed-by: Kever Yang Thanks, - Kever On 01/29/2016 10:20 AM, Douglas Anderson wrote: I find that when I plug a full speed (NOT high speed) hub into a dwc2 port and then I plug a bunch of devices into that full speed hub that dwc2 goes bat guano crazy. Specifically, it just spews

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 02/01/2016 06:09 AM, Doug Anderson wrote: Kever, On Sun, Jan 31, 2016 at 1:36 AM, Kever Yang <kever.y...@rock-chips.com> wrote: Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: In dwc2_hcd_qh_deactivate() we will put some things on the periodic_sched_ready list. These

Re: [PATCH v6 10/22] usb: dwc2: host: Properly set the HFIR

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: According to the most up to date version of the dwc2 databook, the FRINT field of the HFIR register should be programmed to: * 125 us * (PHY clock freq for HS) - 1 * 1000 us * (PHY clock freq for FS/LS) - 1 I got 3 version of dwc_otg

Re: [PATCH v6 11/22] usb: dwc2: host: There's not really a TT for the root hub

Doug, Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever On 01/29/2016 10:20 AM, Douglas Anderson wrote: I find that when I plug a full speed (NOT high speed) hub into a dwc2 port and then I plug a bunch of devices into that full speed hub that dwc2 goes bat guano

Re: [PATCH v6 18/22] usb: dwc2: host: Schedule periodic right away if it's time

Doug, On 01/29/2016 10:20 AM, Douglas Anderson wrote: In dwc2_hcd_qh_deactivate() we will put some things on the periodic_sched_ready list. These things won't be taken off the ready list until the next SOF, which might be a little late. Let's put them on right away. Signed-off-by: Douglas

Re: [PATCH v5 03/21] usb: dwc2: host: Set host_rx_fifo_size to 528 for rk3066

Hi Doug, On 01/28/2016 03:44 AM, Doug Anderson wrote: If it's all the same to you, I'll probably change it back to 525 and then increase the periodic FIFO size by 3 DWORDS in the next patch. 12 bytes may not be much, but might as well make use of them to improve performance / compatibility?

Re: [PATCH v5 03/21] usb: dwc2: host: Set host_rx_fifo_size to 528 for rk3066

Hi Doug, On 01/28/2016 03:44 AM, Doug Anderson wrote: If it's all the same to you, I'll probably change it back to 525 and then increase the periodic FIFO size by 3 DWORDS in the next patch. 12 bytes may not be much, but might as well make use of them to improve performance / compatibility?

Re: [PATCH v5 04/21] usb: dwc2: host: Set host_perio_tx_fifo_size to 304 for rk3066

, - Kever On 01/28/2016 11:28 AM, Doug Anderson wrote: Kever, On Wed, Jan 27, 2016 at 7:10 PM, Kever Yang wrote: Hi Doug, We are using the minimum FIFO size mode for TX now, which only equal to one max packet size. The addition FIFO size may help shorten the inter-packet data prepare latency when

Re: [PATCH v5 08/21] usb: dwc2: host: Add scheduler tracing

driver. For this patch: Reviewed-by: Kever Yang Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: In preparation for future changes to the scheduler let's add some tracing that makes it easy for us to see what's happening. By default this tracing will be off. By changing

Re: [PATCH v5 05/21] usb: dwc2: host: Avoid use of chan->qh after qh freed

Hi Doug, The NULL pointer bug is one of the most frequent issue we met during hot plug stress test, thanks for this bug fix. Reviewed-by: Kever Yang Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: When poking around with USB devices with slub_debug enabled, I found another

Re: [PATCH v5 04/21] usb: dwc2: host: Set host_perio_tx_fifo_size to 304 for rk3066

Hi Doug, We are using the minimum FIFO size mode for TX now, which only equal to one max packet size. The addition FIFO size may help shorten the inter-packet data prepare latency when the bus/DRAM is busy. For the actual usage in TX, we have very little change to use the period TX FIFO with

Re: [PATCH v5 07/21] usb: dwc2: hcd: fix split transfer schedule sequence

Hi Doug, I test this patch with USB 2.0 analyzer, and it make the CSPLIT in the same order with the SSPLIT, so Reviewed-by: Kever Yang Tested-by: Kever Yang Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: We're supposed to keep outstanding splits in order. Keep track

Re: [PATCH v5 06/21] usb: dwc2: host: Always add to the tail of queues

Hi Doug, This is obviously a bug in dwc2 driver which not meet the usb 2.0 spec, and this patch can fix it. Reviewed-by: Kever Yang Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: The queues the the dwc2 host controller used are truly queues. That means FIFO or first

Re: [PATCH v5 03/21] usb: dwc2: host: Set host_rx_fifo_size to 528 for rk3066

We've got 960 / 972 total_fifo_size on rk3288 (and presumably on rk3066) and 525 + 128 + 256 = 909 so we're still under on both ports even when we increment by 5. Since we have space, Kever Yang suggests bumping by 8. He says this will meet INCR16 access and next fifo type can start with a aligned

Re: [PATCH v5 07/21] usb: dwc2: hcd: fix split transfer schedule sequence

Hi Doug, I test this patch with USB 2.0 analyzer, and it make the CSPLIT in the same order with the SSPLIT, so Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Tested-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: We

Re: [PATCH v5 08/21] usb: dwc2: host: Add scheduler tracing

driver. For this patch: Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: In preparation for future changes to the scheduler let's add some tracing that makes it easy for us to see what's happening. By default this t

Re: [PATCH v5 04/21] usb: dwc2: host: Set host_perio_tx_fifo_size to 304 for rk3066

, - Kever On 01/28/2016 11:28 AM, Doug Anderson wrote: Kever, On Wed, Jan 27, 2016 at 7:10 PM, Kever Yang <kever.y...@rock-chips.com> wrote: Hi Doug, We are using the minimum FIFO size mode for TX now, which only equal to one max packet size. The addition FIFO size may help shorten the inter-

Re: [PATCH v5 04/21] usb: dwc2: host: Set host_perio_tx_fifo_size to 304 for rk3066

Hi Doug, We are using the minimum FIFO size mode for TX now, which only equal to one max packet size. The addition FIFO size may help shorten the inter-packet data prepare latency when the bus/DRAM is busy. For the actual usage in TX, we have very little change to use the period TX FIFO with

Re: [PATCH v5 05/21] usb: dwc2: host: Avoid use of chan->qh after qh freed

Hi Doug, The NULL pointer bug is one of the most frequent issue we met during hot plug stress test, thanks for this bug fix. Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: When poking around with USB devices with slub

Re: [PATCH v5 03/21] usb: dwc2: host: Set host_rx_fifo_size to 528 for rk3066

We've got 960 / 972 total_fifo_size on rk3288 (and presumably on rk3066) and 525 + 128 + 256 = 909 so we're still under on both ports even when we increment by 5. Since we have space, Kever Yang suggests bumping by 8. He says this will meet INCR16 access and next fifo type can start with a aligned

Re: [PATCH v5 06/21] usb: dwc2: host: Always add to the tail of queues

Hi Doug, This is obviously a bug in dwc2 driver which not meet the usb 2.0 spec, and this patch can fix it. Reviewed-by: Kever Yang <kever.y...@rock-chips.com> Thanks, - Kever On 01/23/2016 02:18 AM, Douglas Anderson wrote: The queues the the dwc2 host controller used are truly

Re: [RESEND PATCH] rtc: rk808: rename rtc-rk808.c to rtc-rk8xx.c

Hi Zhang Qing, On 12/31/2015 10:14 PM, zhangqing wrote: make rtc-rk8xx.c compatible for all pmic chips. for pmic chips(rk808\rk807\rk816\rk818) in the future. The commit message will be better like this: Rename the file to rtc-rk8xx.c to compatible other Rockchip PMIC chips like

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