Hi Liu Ying,
One comment below.
On Tue, Mar 02, 2021 at 02:33:15PM +0800, Liu Ying wrote:
> This patch introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support.
>
> DPU is comprised of two main components that include a blit engine for
> 2D graphics accelerations(with composition
Hi Liu Ying,
Just some minor comments below.
On Thu, Jan 21, 2021 at 03:14:22PM +0800, Liu Ying wrote:
> This patch introduces i.MX8qm/qxp Display Processing Unit(DPU) DRM support.
>
> DPU is comprised of two main components that include a blit engine for
> 2D graphics accelerations(with
Hi Liu Ying,
On Wed, Jan 20, 2021 at 04:42:50PM +0800, Liu Ying wrote:
> Hi Laurentiu,
>
> On Fri, 2021-01-15 at 19:27 +0200, Laurentiu Palcu wrote:
> > Hi Liu Ying,
> >
> > I promised I would have a second, more in-depth, look at this and I finally
> > managed
Hi Liu Ying,
I promised I would have a second, more in-depth, look at this and I finally
managed to do it.
I have to admit it was a challenge. Partially because I'm not very familiar
with DPU but mostly because of the abundance of macros used. It's true, macros
make the code more compact.
This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
Hi,
This is, actually, a resend of the patch because we decided to drop it
from the main DCSS patchset until the driver gets merged.
Now that the driver is in mainline, we can finally add DCSS
Hi Lukas,
On Tue, Nov 24, 2020 at 06:19:57PM +0100, Lukas F. Hartmann wrote:
> The sn56dsi86 DSI to eDP bridge driver does not support attaching
> without a drm connector.
I think the SN65DSI86 driver is exactly what you should focus on, so
that it works when connector is optional. The
Hi Liu Ying,
On Mon, Nov 23, 2020 at 10:45:38AM +0800, Liu Ying wrote:
> Hi Laurentiu,
>
> On Fri, 2020-11-20 at 16:38 +0200, Laurentiu Palcu wrote:
> > Hi Liu Ying,
> >
> > I gave this a first look but, since this is a huge piece of code and I'm not
> > very
Hi Liu Ying,
I gave this a first look but, since this is a huge piece of code and I'm not
very familiar with DPU, I'll probably give it another pass next week.
Anyway, some comments/questions inline.
On Thu, Nov 19, 2020 at 11:22:22AM +0200, Liu Ying wrote:
> This patch introduces i.MX8qxp
Hi Liu Ying,
On Thu, Nov 19, 2020 at 05:22:17PM +0800, Liu Ying wrote:
> Hi,
>
>
> This patch set introduces i.MX8qxp Display Processing Unit(DPU) DRM support.
Glad to see this series out. However, something went wrong with it as
patch 5/8 didn't make it to dri-devel mailing list... :/
This patch adds support for using NN interpolation scaling by setting the
SCALING_FILTER plane property to 1. Otherwise, the default method is used.
Signed-off-by: Laurentiu Palcu
---
I had no retro pixel art games to test this with, so I used modetest to see the
results:
To test, I used
X8MQ")
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/dcss/dcss-plane.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss-plane.c
b/drivers/gpu/drm/imx/dcss/dcss-plane.c
index 46a188dd02ad..5db093aada2f 100644
--- a/drivers/gpu/drm/imx
Hi,
This patchset fixes 90/270 rotations for Vivante tiled and super-tiled
formats and a Coccinelle warning.
Thanks,
laurentiu
Laurentiu Palcu (2):
drm/imx/dcss: fix rotations for Vivante tiled formats
drm/imx/dcss: fix coccinelle warning
drivers/gpu/drm/imx/dcss/dcss-plane.c | 14
width and
height need to be swapped since DPR is sending the buffer to scaler already
rotated.
Also, make sure to allow full rotations for DRM_FORMAT_MOD_VIVANTE_SUPER_TILED.
Fixes: 9021c317b770 ("drm/imx: Add initial support for DCSS on iMX8MQ")
Signed-off-by: Laurentiu Palcu
---
d
Hi Mirela,
On Mon, Nov 02, 2020 at 05:08:16AM +0200, Mirela Rabulea (OSS) wrote:
> From: Mirela Rabulea
>
> Added as:
> FREESCALE IMX / MXC JPEG V4L2 DRIVER
>
> Signed-off-by: Mirela Rabulea
> ---
> MAINTAINERS | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/MAINTAINERS
Hi Mirela,
I wanted to give it a more in-depth look but I then saw that patch 11
deletes a lot of code from this file. So, the review on the deleted
parts would be pointless... :/
I suggest you squash 4 and 11 together.
However, there are a few comments below.
On Mon, Nov 02, 2020 at
Use div_s64() for the 64-bit divisions. This would allow the driver to compile
on 32-bit architectures, if needed.
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/dcss/dcss-scaler.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss
plit the patches.
But, I guess, we could remove it for now to make the bots happy.
Reviewed-by: Laurentiu Palcu
> ---
> drivers/gpu/drm/imx/dcss/dcss-plane.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/imx/dcss/dcss-plane.c
> b/drivers/gpu/dr
Hi Lucas,
On Thu, Sep 10, 2020 at 12:24:44PM +0200, Lucas Stach wrote:
> On Do, 2020-09-10 at 13:21 +0300, Laurentiu Palcu wrote:
> > On Thu, Sep 10, 2020 at 11:57:10AM +0200, Daniel Vetter wrote:
> > > On Thu, Sep 10, 2020 at 11:53 AM Laurentiu Palcu
> > > wr
On Thu, Sep 10, 2020 at 11:57:10AM +0200, Daniel Vetter wrote:
> On Thu, Sep 10, 2020 at 11:53 AM Laurentiu Palcu
> wrote:
> >
> > When compiling for 32bit platforms, the compilation fails with:
> >
> > ERROR: modpost: "__aeabi_ldivmod"
> > [d
e no 32bit SoCs have DCSS, so far.
Signed-off-by: Laurentiu Palcu
Reported-by: Daniel Vetter
---
drivers/gpu/drm/imx/dcss/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/dcss/Kconfig b/drivers/gpu/drm/imx/dcss/Kconfig
index 69860de8861f.
Hi Daniel,
On Thu, Sep 10, 2020 at 08:47:34AM +0200, Daniel Vetter wrote:
> On Wed, Sep 9, 2020 at 5:03 PM Lucas Stach wrote:
> >
> > Hi Laurentiu,
> >
> > On Mo, 2020-08-31 at 14:24 +0300, Laurentiu Palcu wrote:
> > > Hi Lucas, Sam,
> > >
> >
Hi Lucas, Sam,
On Mon, Aug 31, 2020 at 12:37:23PM +0200, Lucas Stach wrote:
> Hi Laurentiu,
>
> On Fr, 2020-08-28 at 11:36 +0300, Laurentiu Palcu wrote:
> > Hi Lucas,
> >
> > I was wondering about the plans to merge this series. Since not many
> > people can tes
haven't been very active in this area... :/
On that note, I will probably need help with the merging, provided it's
still happenning. Will you be able to help me out with this?
Thanks,
laurentiu
On Fri, Jul 31, 2020 at 11:18:28AM +0300, Laurentiu Palcu wrote:
> From: Laurentiu Palcu
>
From: Laurentiu Palcu
Make use of drm_bridge_connector API to have the connector initialized by the
display controller.
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/dcss/dcss-dev.c | 17 +---
drivers/gpu/drm/imx/dcss/dcss-kms.c | 31 -
drivers
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
Changes in v9:
* Include imx8mq-clock.h in the example so we can use clock names
instead of their values;
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 108
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
From: Laurentiu Palcu
The driver is part of DRM subsystem and is located in drivers/gpu/drm/imx/dcss.
Signed-off-by: Laurentiu Palcu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2c669c07fa35..1a22038f2869 100644
--- a/MAINTAINERS
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
Hi Guido,
On Wed, Jul 29, 2020 at 05:09:52PM +0200, Guido Günther wrote:
> Hi,
> On Wed, Jul 29, 2020 at 05:16:47PM +0300, Laurentiu Palcu wrote:
> > Hi Guido,
> >
> > On Wed, Jul 29, 2020 at 03:59:48PM +0200, Guido Günther wrote:
> > > Hi,
> > >
On Wed, Jul 29, 2020 at 03:27:30PM +0200, Guido Günther wrote:
> Hi,
> On Fri, Jul 24, 2020 at 12:07:34PM +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > Add bindings for iMX8MQ Display Controller Subsystem.
> >
> > Signed-off-by: Laurentiu
Hi Guido,
On Wed, Jul 29, 2020 at 03:59:48PM +0200, Guido Günther wrote:
> Hi,
> On Fri, Jul 24, 2020 at 12:07:29PM +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > Hi,
> >
> > This patchset adds initial DCSS support for iMX8MQ chip. Initia
Hi Guido,
On Wed, Jul 29, 2020 at 03:11:21PM +0200, Guido Günther wrote:
> Hi Laurentiu,
> On Fri, Jul 24, 2020 at 12:07:31PM +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
>
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
Reviewed-by: Rob Herring
---
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 104 ++
1 file changed, 104 insertions(+)
create mode 100644
Documentation/devicetree
From: Laurentiu Palcu
The driver is part of DRM subsystem and is located in drivers/gpu/drm/imx/dcss.
Signed-off-by: Laurentiu Palcu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index dad5a62d21a7..200c5985b41f 100644
--- a/MAINTAINERS
From: Laurentiu Palcu
Make use of drm_bridge_connector API to have the connector initialized by the
display controller.
Signed-off-by: Laurentiu Palcu
CC: Sam Ravnborg
CC: Laurent Pinchart
---
drivers/gpu/drm/imx/dcss/dcss-dev.c | 17 +---
drivers/gpu/drm/imx/dcss/dcss-kms.c
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
Hi Philipp,
On Tue, Jul 21, 2020 at 02:43:28PM +0200, Philipp Zabel wrote:
> Hi Laurentiu,
>
> On Tue, 2020-07-21 at 13:20 +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
&
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here
From: Laurentiu Palcu
The driver is part of DRM subsystem and is located in drivers/gpu/drm/imx/dcss.
Signed-off-by: Laurentiu Palcu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index dad5a62d21a7..200c5985b41f 100644
--- a/MAINTAINERS
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
Reviewed-by: Rob Herring
---
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 104 ++
1 file changed, 104 insertions(+)
create mode 100644
Documentation/devicetree
From: Laurentiu Palcu
Make use of drm_bridge_connector API to have the connector initialized by the
display controller.
Signed-off-by: Laurentiu Palcu
CC: Sam Ravnborg
CC: Laurent Pinchart
---
drivers/gpu/drm/imx/dcss/dcss-dev.c | 17 +---
drivers/gpu/drm/imx/dcss/dcss-kms.c
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
Hi Rob,
On Mon, Jul 20, 2020 at 10:49:27AM -0600, Rob Herring wrote:
> On Fri, 17 Jul 2020 17:41:29 +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > Add bindings for iMX8MQ Display Controller Subsystem.
> >
> > Signed-off-by: Laurentiu Palcu
From: Laurentiu Palcu
After the drm_bridge_connector_init() helper function has been added, the ADV
driver has been changed accordingly. However, the 'type' field of the bridge
structure was left unset, which makes the helper function always return -EINVAL.
Signed-off-by: Laurentiu Palcu
Hi Sam,
On Fri, Jul 17, 2020 at 09:48:49PM +0200, Sam Ravnborg wrote:
> Hi Laurentiu.
>
> On Fri, Jul 17, 2020 at 05:41:27PM +0300, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
&
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 104 ++
1 file changed, 104 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/nxp
From: Laurentiu Palcu
The driver is part of DRM subsystem and is located in drivers/gpu/drm/imx/dcss.
Signed-off-by: Laurentiu Palcu
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index dad5a62d21a7..200c5985b41f 100644
--- a/MAINTAINERS
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
> > wrote:
> > > > Hi Laurentiu,
> > > >
> > > > Am Donnerstag, den 09.07.2020, 19:47 +0300 schrieb Laurentiu Palcu:
> > > > > From: Laurentiu Palcu
> > > > >
> > > > > Hi,
> > > > >
> > > &g
From: Laurentiu Palcu
This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
Some of its capabilities include:
* 4K@60fps;
* HDR10;
* one graphics and 2 video pipelines;
* on-the-fly decompression of compressed video and graphics;
The reference manual can be found here
From: Laurentiu Palcu
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
.../bindings/display/imx/nxp,imx8mq-dcss.yaml | 84 +++
1 file changed, 84 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/imx/nxp,imx8mq
From: Laurentiu Palcu
This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch
From: Laurentiu Palcu
Hi,
This patchset adds initial DCSS support for iMX8MQ chip. Initial support
includes only graphics plane support (no video planes), no HDR10 capabilities,
no graphics decompression (only linear, tiled and super-tiled buffers allowed).
Support for the rest of the features
From: Laurentiu Palcu
Component framework is needed by HDP driver.
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/dcss/dcss-drv.c | 89 ++---
drivers/gpu/drm/imx/dcss/dcss-kms.c | 14 -
drivers/gpu/drm/imx/dcss/dcss-kms.h | 4 +-
3 files changed, 80
From: Laurentiu Palcu
Currently the drm/imx/ directory is compiled only if DRM_IMX is set. Adding a
new IMX related IP in the same directory would need DRM_IMX to be set, which
would
bring in also IPUv3 core driver...
The current patch would allow adding new IPs in the imx/ directory without
Hi Guido,
On Fri, May 15, 2020 at 11:27:19AM +0200, Guido Günther wrote:
> Hi Laurentiu,
> On Fri, Mar 06, 2020 at 02:49:26PM +0200, Laurentiu Palcu wrote:
> > From: Laurentiu Palcu
> >
> > This adds initial support for iMX8MQ's Display Controller Subsystem (DCSS).
>
This clock is needed by DCSS when high resolutions are used.
Signed-off-by: Laurentiu Palcu
CC: Abel Vesa
---
drivers/clk/imx/clk-imx8mq.c | 4
include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk
This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts
Hi Fabio,
On Mon, Sep 23, 2019 at 01:12:42PM -0300, Fabio Estevam wrote:
> Hi Laurentiu,
>
> On Mon, Sep 23, 2019 at 11:14 AM Laurentiu Palcu
> wrote:
>
> > +
> > + dcss: dcss@0x32e0 {
>
> Node names should be generic, so:
>
>
On Mon, Sep 23, 2019 at 09:54:42AM -0700, Stephen Boyd wrote:
> Quoting Laurentiu Palcu (2019-09-23 07:13:19)
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 52aae34..d4aa778 100644
> > --- a/ar
This patch adds the node for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts
-plane de-gamma/CSC/gamma support is in.
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/Kconfig| 2 +
drivers/gpu/drm/imx/Makefile | 1 +
drivers/gpu/drm/imx/dcss/Kconfig | 7 +
drivers/gpu/drm/imx/dcss/Makefile | 6 +
drivers/gpu/drm/imx/dcss/dcss
This clock is needed by DCSS when high resolutions are used.
Signed-off-by: Laurentiu Palcu
CC: Abel Vesa
---
drivers/clk/imx/clk-imx8mq.c | 4
include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk
The BGRA appears twice in the ipu_plane_formats[] list. The
duplicate should be BGRX.
The original commit is:
commit 59d6b7189a96 ("drm/imx: ipuv3-plane: enable support for RGBX
and RGBA pixel formats")
Signed-off-by: Laurentiu Palcu <laurentiu.pa...@nxp.com>
The BGRA appears twice in the ipu_plane_formats[] list. The
duplicate should be BGRX.
The original commit is:
commit 59d6b7189a96 ("drm/imx: ipuv3-plane: enable support for RGBX
and RGBA pixel formats")
Signed-off-by: Laurentiu Palcu
---
drivers/gpu/drm/imx/ipuv3-p
ff-by: Crestez Dan Leonard <leonard.cres...@intel.com>
Signed-off-by: Laurentiu Palcu <laurentiu.pa...@intel.com>
> ---
> drivers/spi/spi-dln2.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/spi/spi-dln2.c b/drivers/spi/spi-dln2.c
> index 3b7d91
ff-by: Crestez Dan Leonard
Signed-off-by: Laurentiu Palcu
> ---
> drivers/spi/spi-dln2.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/spi/spi-dln2.c b/drivers/spi/spi-dln2.c
> index 3b7d91d..4e8a862 100644
> --- a/drivers/spi/spi-dln2.c
> +++ b
On Mon, Sep 14, 2015 at 04:26:08PM -0500, Andrew F. Davis wrote:
> Rename functions that are used by multiple devices. New devices
> have been added and the function names and driver name are no longer
> general enough for the functionality they provide.
>
> Signed-off-by: Andrew F. Davis
> ---
On Mon, Sep 14, 2015 at 04:26:08PM -0500, Andrew F. Davis wrote:
> Rename functions that are used by multiple devices. New devices
> have been added and the function names and driver name are no longer
> general enough for the functionality they provide.
>
> Signed-off-by: Andrew F. Davis
On Thu, Sep 10, 2015 at 08:49:26AM +0900, Krzysztof Kozlowski wrote:
> On 10.09.2015 02:31, Andreas Dannenberg wrote:
> > On Wed, Sep 09, 2015 at 01:17:11PM +0900, Krzysztof Kozlowski wrote:
> >> On 09.09.2015 11:26, Andreas Dannenberg wrote:
> >>> Krzysztof, good observation! In bq2425x_charger.c
On Thu, Sep 10, 2015 at 08:49:26AM +0900, Krzysztof Kozlowski wrote:
> On 10.09.2015 02:31, Andreas Dannenberg wrote:
> > On Wed, Sep 09, 2015 at 01:17:11PM +0900, Krzysztof Kozlowski wrote:
> >> On 09.09.2015 11:26, Andreas Dannenberg wrote:
> >>> Krzysztof, good observation! In bq2425x_charger.c
On Wed, Jun 24, 2015 at 10:30:58AM +0200, Pavel Machek wrote:
> On Wed 2015-06-24 10:32:54, Laurentiu Palcu wrote:
> > On Sat, May 02, 2015 at 04:59:34PM +0200, Pavel Machek wrote:
> > >
> > > Should this link
> > >
> > > > More detail
On Sat, May 02, 2015 at 04:59:34PM +0200, Pavel Machek wrote:
>
> Should this link
>
> > More details about the chip can be found here:
> > http://www.ti.com/product/bq25890
>
> > @@ -0,0 +1,998 @@
> > +/*
> > + * TI BQ25890 charger driver
> > + *
> > + * Copyright (C) 2015 Intel
On Sat, May 02, 2015 at 04:59:34PM +0200, Pavel Machek wrote:
Should this link
More details about the chip can be found here:
http://www.ti.com/product/bq25890
@@ -0,0 +1,998 @@
+/*
+ * TI BQ25890 charger driver
+ *
+ * Copyright (C) 2015 Intel Corporation
+ *
+ * This
On Wed, Jun 24, 2015 at 10:30:58AM +0200, Pavel Machek wrote:
On Wed 2015-06-24 10:32:54, Laurentiu Palcu wrote:
On Sat, May 02, 2015 at 04:59:34PM +0200, Pavel Machek wrote:
Should this link
More details about the chip can be found here:
http://www.ti.com/product/bq25890
Signed-off-by: Laurentiu Palcu
Reported-by: Dan Carpenter
---
drivers/power/bq25890_charger.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/power/bq25890_charger.c b/drivers/power/bq25890_charger.c
index c7b4903..16b7c7bc 100644
--- a/drivers/power/bq25890_charger.c
+
-by: Laurentiu Palcu laurentiu.pa...@intel.com
Reported-by: Dan Carpenter dan.carpen...@oracle.com
---
drivers/power/bq25890_charger.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/power/bq25890_charger.c b/drivers/power/bq25890_charger.c
index c7b4903..16b7c7bc 100644
More details about the chip can be found here:
http://www.ti.com/product/bq25890
Signed-off-by: Laurentiu Palcu
---
drivers/power/Kconfig | 7 +
drivers/power/Makefile | 1 +
drivers/power/bq25890_charger.c | 999
3 files changed
Signed-off-by: Laurentiu Palcu
---
.../devicetree/bindings/power/bq25890.txt | 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/bq25890.txt
diff --git a/Documentation/devicetree/bindings/power/bq25890.txt
b
ds support for BQ25890 USB charger chip. Information about
the chip can be found here:
http://www.ti.com/product/bq25890
Thanks,
laurentiu
Laurentiu Palcu (2):
Documentation: devicetree: Add TI BQ25890 bindings
power_supply: Add support for TI BQ25890 charger chip
.../devicetree/bindings/pow
Hi Krzysztof,
On Tue, May 19, 2015 at 05:40:25PM +0900, Krzysztof Kozlowski wrote:
> > +
> > +static int bq25890_chip_reset(struct bq25890_device *bq)
> > +{
> > + int ret;
> > +
> > + ret = bq25890_field_write(bq, F_REG_RST, 1);
> > + if (ret < 0)
> > + return
Hi Krzysztof,
On Tue, May 19, 2015 at 05:40:25PM +0900, Krzysztof Kozlowski wrote:
+
+static int bq25890_chip_reset(struct bq25890_device *bq)
+{
+ int ret;
+
+ ret = bq25890_field_write(bq, F_REG_RST, 1);
+ if (ret 0)
+ return ret;
+
+
More details about the chip can be found here:
http://www.ti.com/product/bq25890
Signed-off-by: Laurentiu Palcu laurentiu.pa...@intel.com
---
drivers/power/Kconfig | 7 +
drivers/power/Makefile | 1 +
drivers/power/bq25890_charger.c | 999
for BQ25890 USB charger chip. Information about
the chip can be found here:
http://www.ti.com/product/bq25890
Thanks,
laurentiu
Laurentiu Palcu (2):
Documentation: devicetree: Add TI BQ25890 bindings
power_supply: Add support for TI BQ25890 charger chip
.../devicetree/bindings/power/bq25890.txt
Signed-off-by: Laurentiu Palcu laurentiu.pa...@intel.com
---
.../devicetree/bindings/power/bq25890.txt | 46 ++
1 file changed, 46 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/bq25890.txt
diff --git a/Documentation/devicetree/bindings
Hi Krzysztof,
On Sat, May 16, 2015 at 08:53:42PM +0900, Krzysztof Kozlowski wrote:
> 2015-05-15 23:06 GMT+09:00 Laurentiu Palcu :
> > Signed-off-by: Laurentiu Palcu
> > ---
> > .../devicetree/bindings/power/bq25890.txt | 45
> > ++
> &g
Hi Krzysztof,
On Sat, May 16, 2015 at 08:53:42PM +0900, Krzysztof Kozlowski wrote:
2015-05-15 23:06 GMT+09:00 Laurentiu Palcu laurentiu.pa...@intel.com:
Signed-off-by: Laurentiu Palcu laurentiu.pa...@intel.com
---
.../devicetree/bindings/power/bq25890.txt | 45
Hi,
This series adds support for BQ25890 USB charger chip. Information about
the chip can be found here:
http://www.ti.com/product/bq25890
Thanks,
laurentiu
Laurentiu Palcu (2):
Documentation: devicetree: Add TI BQ25890 bindings
power_supply: Add support for TI BQ25890 charger chip
Signed-off-by: Laurentiu Palcu
---
.../devicetree/bindings/power/bq25890.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/bq25890.txt
diff --git a/Documentation/devicetree/bindings/power/bq25890.txt
b
More details about the chip can be found here:
http://www.ti.com/product/bq25890
Signed-off-by: Laurentiu Palcu
---
drivers/power/Kconfig | 7 +
drivers/power/Makefile | 1 +
drivers/power/bq25890_charger.c | 998
3 files changed
Signed-off-by: Laurentiu Palcu laurentiu.pa...@intel.com
---
.../devicetree/bindings/power/bq25890.txt | 45 ++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/bq25890.txt
diff --git a/Documentation/devicetree/bindings
More details about the chip can be found here:
http://www.ti.com/product/bq25890
Signed-off-by: Laurentiu Palcu laurentiu.pa...@intel.com
---
drivers/power/Kconfig | 7 +
drivers/power/Makefile | 1 +
drivers/power/bq25890_charger.c | 998
Hi,
This series adds support for BQ25890 USB charger chip. Information about
the chip can be found here:
http://www.ti.com/product/bq25890
Thanks,
laurentiu
Laurentiu Palcu (2):
Documentation: devicetree: Add TI BQ25890 bindings
power_supply: Add support for TI BQ25890 charger chip
Hi Anda,
On Wed, May 06, 2015 at 06:41:00PM +0300, Anda-Maria Nicolae wrote:
(...)
> >>Updates from v2 version:
> >>- removed unused masks and keep the used ones. I have tried to access mask
> >>field
> >>from struct regmap_field, but I have received the following compilation
> >>error:
>
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