On Mon, Sep 30, 2019 at 06:25:57PM +0200, Andrew Lunn wrote:
> On Mon, Sep 30, 2019 at 04:29:07PM +0200, Oleksij Rempel wrote:
> > On Mon, Sep 30, 2019 at 03:42:09PM +0200, Andrew Lunn wrote:
> > > On Mon, Sep 30, 2019 at 11:33:10AM +0200, Oleksij Rempel wrote:
> > &g
On Mon, Sep 30, 2019 at 03:42:09PM +0200, Andrew Lunn wrote:
> On Mon, Sep 30, 2019 at 11:33:10AM +0200, Oleksij Rempel wrote:
> > The driver was working with fixed phy without any noticeable issues. This
> > bug
> > was uncovered by introducing dsa ar9331-switch driver
On Mon, Sep 30, 2019 at 03:20:41PM +0200, Andrew Lunn wrote:
> On Mon, Sep 30, 2019 at 11:27:10AM +0200, Oleksij Rempel wrote:
> > Mostly this hardware can work with generic PHY driver, but this change
> > is needed to provided interrupt handling support.
> > Tested with dsa
It is two registers each of 4 byte.
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dts/qca/ar9331.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi
b/arch/mips/boot/dts/qca/ar9331.dtsi
index 63a9f33aa43e..5cfc9d347826 100644
The driver was working with fixed phy without any noticeable issues. This bug
was uncovered by introducing dsa ar9331-switch driver.
Signed-off-by: Oleksij Rempel
---
drivers/net/ethernet/atheros/ag71xx.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net
Mostly this hardware can work with generic PHY driver, but this change
is needed to provided interrupt handling support.
Tested with dsa ar9331-switch driver.
Signed-off-by: Oleksij Rempel
---
drivers/net/phy/at803x.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers
s one ...]
Here is the original pull request message for this patch series:
"The final patch is the collective effort of many entities (The j1939
authors: Oliver Hartkopp, Bastian Stender, Elenita Hinds, kbuild test
robot, Kurt Van Dijck, Maxime Jayat, Robin van der Gracht, Oleksij
Rempel, Marc K
On Fri, Sep 06, 2019 at 03:53:19PM +0800, Biwen Li wrote:
> From: Chuanhua Han
>
> Enable NXP i2c controller to boot with ACPI
>
> Signed-off-by: Meenakshi Aggarwal
> Signed-off-by: Udit Kumar
> Signed-off-by: Chuanhua Han
> Signed-off-by: Biwen Li
for i2c-imx.c:
.of_match_table = i2c_imx_dt_ids,
+ .acpi_match_table = ACPI_PTR(i2c_imx_acpi_ids),
},
.id_table = imx_i2c_devtype,
};
--
2.9.5
Kind regards,
Oleksij Rempel
--
Pengutronix e.K. | |
Industrial Linux Solutions
controller via MU (message unit) IPC
to get scu key's status.
Signed-off-by: Anson Huang
Reviewed-by: Oleksij Rempel
---
Changes since V2:
- use private platform data instead of global data;
- use "key" instead of "pwrkey";
- fix some data format.
---
dr
fix it, meanwhile it does NOT block this
driver,
I will add return value check in this driver.
It is great! Thank you!
Kind regards,
Oleksij Rempel
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutron
t;dev, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return -ENOMEM;
+
+ if (of_property_read_u32(np, "linux,keycode", >keycode) > +
pdata->keycode = KEY_POWER;
According binding documentation, linux,keycode is req
t normal key. If, for some reason, it will trigger world destruction, if it is
pressed too long... probably no body cares.
You can provide fsl,imx-sc-key as additional compatible. In case linux will need some
quirks, we still can fall back to more precise compatible "fsl,imx8qxp-sc-pwrk
c-rtc";
};
+ scu_pwrkey: scu-pwrkey {
+ compatible = "fsl,imx8qxp-sc-pwrkey",
"fsl,imx-sc-pwrkey";
+ linux,keycode = ;
+ };
+
watchdog {
compatible = "fsl,imx8qxp-sc-wdt", &qu
imx_sc_pwrkey_driver = {
+ .driver = {
+ .name = "imx-sc-pwrkey",
+ .of_match_table = imx_sc_pwrkey_ids,
+ },
+ .probe = imx_sc_pwrkey_probe,
+};
+module_platform_driver(imx_sc_pwrkey_driver);
+
+MODULE_AUTHOR("Anson Huang ");
+MODULE_DESCRIPTION(&
R().
What iMX/(other NXP?) SoCs are with ACPI support? Where I can get one? I would like to
know more about it.
Kind regards,
Oleksij Rempel
--
Pengutronix e.K. | |
Industrial Linux Solutions | http://www.pengutronix.de/ |
Am 18.08.19 um 10:44 schrieb Chuanhong Guo:
> On Sun, Aug 18, 2019 at 4:26 PM Chuanhong Guo wrote:
>>
>> Hi!
>>
>> On Sun, Aug 18, 2019 at 3:59 PM Oleksij Rempel
>> wrote:
>>>
>>> Am 18.08.19 um 09:19 schrieb Chuanhong Guo:
>>>&g
Am 18.08.19 um 09:19 schrieb Chuanhong Guo:
> Hi!
>
> On Sun, Aug 18, 2019 at 2:10 PM Oleksij Rempel wrote:
>>
>>>> We have at least 2 know registers:
>>>> SYSC_REG_CPLL_CLKCFG0 - it provides some information about boostrapped
>>>> refclock. PLL
Am 18.08.19 um 04:29 schrieb Chuanhong Guo:
> Hi!
>
> On Sun, Aug 18, 2019 at 2:06 AM Oleksij Rempel wrote:
>>>> SYSC_REG_CPLL_CLKCFG1 register is a clock gate controller. It is used to
>>>> enable or disable clocks.
>>>> Jist wild assumptio
Am 17.08.19 um 18:22 schrieb Chuanhong Guo:
> Hi!
>
> On Sat, Aug 17, 2019 at 11:40 PM Oleksij Rempel wrote:
>
>> In provided link [0] the ralink_clk_init function is reading
>> SYSC_REG_CPLL_CLKCFG0 R/W register.
>> This register is used to determine clock sour
Hi,
Am 17.08.19 um 16:42 schrieb Chuanhong Guo:
Hi!
On Tue, Aug 13, 2019 at 11:51 PM Rob Herring wrote:
[...]
+Example:
+ pll {
+ compatible = "mediatek,mt7621-pll";
You didn't answer Stephen's question on v1.
I thought he was asking why there's a syscon in compatible
Hi,
Am 17.08.19 um 16:42 schrieb Chuanhong Guo:
Hi!
On Tue, Aug 13, 2019 at 11:51 PM Rob Herring wrote:
[...]
+Example:
+ pll {
+ compatible = "mediatek,mt7621-pll";
You didn't answer Stephen's question on v1.
I thought he was asking why there's a syscon in compatible
On Fri, Aug 02, 2019 at 06:54:27AM +0300, Daniel Baluta wrote:
> One more thing. See below:
>
> On Wed, Jul 31, 2019 at 12:14 PM Richard Zhu wrote:
>
>
>
> > -/* Control Register */
> > -#define IMX_MU_xCR 0x24
> > /* General Purpose Interrupt Enable */
> > #define
] free_irq+0x38/0x98
> [2.108170] imx_mu_shutdown+0x90/0xb0
> [2.111921] mbox_free_channel.part.2+0x24/0xb8
> [2.116453] mbox_free_channel+0x18/0x28
>
> This bug is present from the beginning of times.
>
> Cc: Oleksij Rempel
> Fixes: 2bb7005696e2246 ("
+ .xTR[0] = 0x0,
> + .xTR[1] = 0x4,
> + .xTR[2] = 0x8,
> + .xTR[3] = 0xC,
I would prefer to init arrays this way:
.xTR[] = {0x0, 0x4, 0x8, 0xc},
For every thing else
Reviewed-by: Oleksij Rempel
> + .xRR[0] = 0x10,
> + .xRR[1] = 0x14,
> + .xRR[2]
On Fri, Jul 26, 2019 at 04:29:36PM +0800, Richard Zhu wrote:
> There is a version1.0 MU on i.MX7ULP platform.
> One new version ID register is added, and the offset is 0.
> TRn registers are defined at the offset 0x20 ~ 0x2C.
> RRn registers are defined at the offset 0x40 ~ 0x4C.
> SR/CR registers
On Tue, Jul 09, 2019 at 08:48:20AM +0300, Daniel Baluta wrote:
> Hi Oleksij,
>
> Any comments on this?
Looks good for me. All my suggestions was fixed.
Reviewed-by:
> On Thu, Jun 27, 2019 at 11:14 AM Daniel Baluta wrote:
> >
> > Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
> >
Hi Daniel,
please, see my review inline.
On Fri, Jun 14, 2019 at 04:16:49PM +0800, daniel.bal...@nxp.com wrote:
> From: Daniel Baluta
>
> Some of i.MX8 processors (e.g i.MX8QM, i.MX8QXP) contain
> the Tensilica HiFi4 DSP for advanced pre- and post-audio
> processing.
>
> The communication
On Tue, Jun 11, 2019 at 10:52:47AM +0300, Daniel Baluta wrote:
> Hi Oleksij,
>
> On Tue, Jun 11, 2019 at 8:56 AM Oleksij Rempel
> wrote:
> >
> > Hi Daniel,
> >
> > On Mon, Jun 10, 2019 at 10:16:09PM +0800, daniel.bal...@nxp.com wrote:
> > > From: Da
Hi Daniel,
On Mon, Jun 10, 2019 at 10:16:09PM +0800, daniel.bal...@nxp.com wrote:
> From: Daniel Baluta
>
> TX doorbell with ACK will allow us to push the doorbell ring button
> (trigger GIR) and also will allow us to handle the response from DSP.
>
> DSP firmware found on i.MX8 boards
Baluta
Please send bug fixes separately from RFC patches.
You can add my
Reviewed-by: Oleksij Rempel
> ---
> drivers/mailbox/imx-mailbox.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mailbox/imx-mailbox.c b/drivers/mailbox/imx-mailbox.
ngs was removed. Not every thing made sense
and most of it is SoC specific, so it is possible to detect it by
compatible.
- mac and mdio parts are merged in to one driver. It makes easier to
maintaine SoC specific quirks.
Oleksij Rempel (3):
dt-bindings: net: add qca,ar71xx.txt documentation
Add binding documentation for Atheros/QCA networking IP core used
in many routers.
Signed-off-by: Oleksij Rempel
---
.../devicetree/bindings/net/qca,ar71xx.txt| 45 +++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qca,ar71xx.txt
Add support for Atheros/QCA AR7XXX/AR9XXX/QCA95XX built-in ethernet mac support
Reviewed-by: Andrew Lunn
Signed-off-by: Oleksij Rempel
---
drivers/net/ethernet/atheros/Kconfig | 10 +-
drivers/net/ethernet/atheros/Makefile |1 +
drivers/net/ethernet/atheros/ag71xx.c | 1898
Add ethernet nodes supported by ag71xx driver.
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dts/qca/ar9331.dtsi | 26
arch/mips/boot/dts/qca/ar9331_dpt_module.dts | 8 ++
2 files changed, 34 insertions(+)
diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi
Add ethernet nodes supported by ag71xx driver.
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dts/qca/ar9331.dtsi | 26
arch/mips/boot/dts/qca/ar9331_dpt_module.dts | 8 ++
2 files changed, 34 insertions(+)
diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi
and mdio parts are merged in to one driver. It makes easier to
maintaine SoC specific quirks.
Oleksij Rempel (3):
dt-bindings: net: add qca,ar71xx.txt documentation
MIPS: ath79: ar9331: add Ethernet nodes
net: ethernet: add ag71xx driver
.../devicetree/bindings/net/qca,ar71xx.txt| 45
Add binding documentation for Atheros/QCA networking IP core used
in many routers.
Signed-off-by: Oleksij Rempel
---
.../devicetree/bindings/net/qca,ar71xx.txt| 45 +++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qca,ar71xx.txt
Add support for Atheros/QCA AR7XXX/AR9XXX/QCA95XX built-in ethernet mac support
Signed-off-by: Oleksij Rempel
---
drivers/net/ethernet/atheros/Kconfig | 10 +-
drivers/net/ethernet/atheros/Makefile |1 +
drivers/net/ethernet/atheros/ag71xx.c | 1882 +
3 files
fg2;
+ u32 ifctl;
+ u32 fifo5;
+
+ if (!phydev->link && update) {
+ ag71xx_hw_stop(ag);
+ netif_carrier_off(ag->ndev);
phylib will take care of the carrier for you.
done
Andrew
thx!
Kind regards,
Oleksij Rempel
--
Pengutr
Add binding documentation for Atheros/QCA networking IP core used
in many routers.
Signed-off-by: Oleksij Rempel
---
.../devicetree/bindings/net/qca,ar71xx.txt| 45 +++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/qca,ar71xx.txt
Add support for Atheros/QCA AR7XXX/AR9XXX/QCA95XX built-in ethernet mac support
Signed-off-by: Oleksij Rempel
---
drivers/net/ethernet/atheros/Kconfig | 11 +-
drivers/net/ethernet/atheros/Makefile |1 +
drivers/net/ethernet/atheros/ag71xx.c | 1911 +
3 files
Hi Andrew,
thank you for the review!
On Mon, Apr 22, 2019 at 03:25:33PM +0200, Andrew Lunn wrote:
> On Mon, Apr 22, 2019 at 08:40:46AM +0200, Oleksij Rempel wrote:
> > +static int ag71xx_msg_enable = -1;
> > +
> > +module_param_named(msg_enable, ag
Add ethernet nodes supported by ag71xx driver.
Signed-off-by: Oleksij Rempel
---
arch/mips/boot/dts/qca/ar9331.dtsi | 26
arch/mips/boot/dts/qca/ar9331_dpt_module.dts | 8 ++
2 files changed, 34 insertions(+)
diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi
and mdio parts are merged in to one driver. It makes easier to
maintaine SoC specific quirks.
Oleksij Rempel (3):
dt-bindings: net: add qca,ar71xx.txt documentation
MIPS: ath79: ar9331: add Ethernet nodes
net: ethernet: add ag71xx driver
.../devicetree/bindings/net/qca,ar71xx.txt|
CC: Daniel Drake
Am 02.05.19 um 07:58 schrieb Kamlesh Gurudasani:
> The driver for Alcor Micro AU6601 and AU6621 controllers uses a pointer to
> get from the private alcor_sdmmc_host structure to the generic mmc_host
> structure. However the latter is always immediately preceding the former in
>
On 28.01.19 09:23, Greg Kroah-Hartman wrote:
On Mon, Jan 28, 2019 at 09:05:30AM +0100, Oleksij Rempel wrote:
On 10.01.19 17:30, Greg Kroah-Hartman wrote:
On Thu, Jan 10, 2019 at 04:19:53PM +0100, Oleksij Rempel wrote:
My gut feel is that if somebody still cares deeply about serial line
On 10.01.19 17:30, Greg Kroah-Hartman wrote:
On Thu, Jan 10, 2019 at 04:19:53PM +0100, Oleksij Rempel wrote:
My gut feel is that if somebody still cares deeply about serial line
latency, they should look at trying to see if they can do some of the
work directly without the bounce
From: Felix Fietkau
Preparation for transitioning the legacy clock setup code over
to OF.
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 128 +-
include/dt-bindings/clock/ath79-clk.h | 3 +-
2 files changed, 68
From: Felix Fietkau
It can be autodetected for many SoCs using the strapping options.
If the clock is specified in DT, the autodetected value is ignored
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 84 -
1 file
From: Felix Fietkau
Use the same functions as the legacy code
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 39 ++-
1 file changed, 22 insertions(+), 17 deletions(-)
diff --git a/arch/mips/ath79/clock.c
This patches are take from OpenWRT, rebased and tested with kernel
v5.0-rt1 on DPTechnics DPT-Module (Atheros AR9331) by me.
Since one dt-bindings header is touched, I added DT maintainers to the
TO/CC.
Felix Fietkau (6):
MIPS: ath79: add helpers for setting clocks and expose the ref clock
From: Felix Fietkau
On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz
clock. If that feature is not used, it defaults to the main reference
clock, like on all other SoC.
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c
From: John Crispin
With the target now being fully OF based, we can drop the legacy IRQ code.
All IRQs are now handled via the new irqchip drivers.
Signed-off-by: John Crispin
---
arch/mips/ath79/Makefile | 2 +-
arch/mips/ath79/irq.c| 169
From: John Crispin
With the target now being fully OF based, we can drop the legacy mach
files. Boards can now boot fully of devicetree files.
Signed-off-by: John Crispin
---
arch/mips/Kconfig | 1 -
arch/mips/ath79/Kconfig| 73 ---
arch/mips/ath79/Makefile
From: Felix Fietkau
Preparation for reusing functions for DT
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 38 +-
1 file changed, 17 insertions(+), 21 deletions(-)
diff --git a/arch/mips/ath79/clock.c
From: John Crispin
With the target now being fully OF based, we can drop the legacy clock
registration code. All clocks are now probed via devicetree.
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 56
arch/mips/ath79/common.h | 3 ---
2
From: Felix Fietkau
Preparation for passing the mapped base via DT
Signed-off-by: Felix Fietkau
Signed-off-by: John Crispin
---
arch/mips/ath79/clock.c | 60 -
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/mips/ath79/clock.c
From: John Crispin
With the target now being fully OF based, we can drop the legacy pci
platform code. The only bits that we need to keep is the fixup code
which we move to its own code file.
Signed-off-by: John Crispin
---
arch/mips/ath79/Makefile| 1 -
arch/mips/ath79/pci.c |
From: John Crispin
With the target now being fully OF based, we can drop the legacy platform
device registration code. All devices and their drivers are now probed
via OF.
Signed-off-by: John Crispin
---
arch/mips/ath79/Makefile | 10 --
arch/mips/ath79/common.h | 2 -
On Thu, Jan 10, 2019 at 04:54:53AM -0800, Linus Torvalds wrote:
> On Thu, Jan 10, 2019 at 2:12 AM Oleksij Rempel
> wrote:
> >
> > sched_priority = 1 is enough to dramatically reduce latency
> > on have system load produced by tasks with default user space prio.
>
>
r priority
to tty processing by modifying the priority of the corresponding
kthread.
Signed-off-by: Steven Walter
Tested-by: Oleksij Rempel
---
drivers/tty/tty_buffer.c | 21 ++---
drivers/tty/tty_io.c | 1 +
include/linux/tty.h | 7 ---
3 files changed, 19 inserti
sched_priority = 1 is enough to dramatically reduce latency
on have system load produced by tasks with default user space prio.
Signed-off-by: Oleksij Rempel
---
drivers/tty/tty_buffer.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/tty_buffer.c b
: 0 transmissions
5000 ... < 1 usec : 0 transmissions
1 ... < 5 usec : 0 transmissions
5 ... < 100 usec : 0 transmissions
>= 100 usec : 0 transmissions
average no. of read calls to assemble the packet: 1
Usage of re
From: Steven Walter
Preparation for converting to kthread_worker
Signed-off-by: Steven Walter
Tested-by: Oleksij Rempel
---
drivers/tty/tty_buffer.c | 12 +---
include/linux/tty.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/tty/tty_buffer.c b
On Mon, Dec 17, 2018 at 04:02:06PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Get rid of some boilerplate driver removal code by using the newly added
> device-managed registration API.
>
> Cc: Oleksij Rempel
> Cc: Dong Aisheng
> Cc: Vladimir Zapolskiy
clk_enable(struct clk *clk)
It is ancient code... it just can't be correct.
--
Alexey
On 17.12.2018 9:01, Oleksij Rempel wrote:
Hi Alexey,
On Sun, Dec 16, 2018 at 02:01:44AM +0300, Alexey Khoroshilov wrote:
Handling of devm_clk_get() suggests that the driver should support
lack of priv->
Hi Alexey,
On Sun, Dec 16, 2018 at 02:01:44AM +0300, Alexey Khoroshilov wrote:
> Handling of devm_clk_get() suggests that the driver should support
> lack of priv->clk. But imx_mu_probe() fails on clk_prepare_enable(NULL)
> in that case.
>
> The patch removes the try to enable absent clk and
Am 06.12.18 um 10:19 schrieb Colin King:
> From: Colin Ian King
>
> There are spelling mistakes in a couple of dev_dbg messages, fix these.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Oleksij Rempel
thanks!
> ---
> drivers/misc/cardreader/alcor_pci.c | 4 ++--
Am 06.12.18 um 10:19 schrieb Colin King:
> From: Colin Ian King
>
> There are spelling mistakes in a couple of dev_dbg messages, fix these.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Oleksij Rempel
thanks!
> ---
> drivers/misc/cardreader/alcor_pci.c | 4 ++--
Am 02.12.18 um 11:30 schrieb Oleksij Rempel:
> This driver provides support for Alcor Micro AU6601 and AU6621
> card readers.
>
> This is single LUN HW and it is expected to work with following standards:
> - Support SDR104 / SDR50
> - MultiMedia Card (MMC)
> - Memory Stick
Am 02.12.18 um 11:30 schrieb Oleksij Rempel:
> This driver provides support for Alcor Micro AU6601 and AU6621
> card readers.
>
> This is single LUN HW and it is expected to work with following standards:
> - Support SDR104 / SDR50
> - MultiMedia Card (MMC)
> - Memory Stick
on any architecture
supporting PCIe. For now, it was developed and tested only on x86_64.
This driver is a result of RE work and was created without any
documentation or real knowledge of HW internals.
Signed-off-by: Oleksij Rempel
---
drivers/misc/Makefile | 2 +-
drivers/misc
on any architecture
supporting PCIe. For now, it was developed and tested only on x86_64.
This driver is a result of RE work and was created without any
documentation or real knowledge of HW internals.
Signed-off-by: Oleksij Rempel
---
drivers/misc/Makefile | 2 +-
drivers/misc
This driver provides support for Alcor Micro AU6601 and AU6621
SD/MMC controller.
Signed-off-by: Oleksij Rempel
---
drivers/mmc/host/Kconfig |7 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/alcor.c | 1165 +
3 files changed, 1173 insertions
This driver provides support for Alcor Micro AU6601 and AU6621
SD/MMC controller.
Signed-off-by: Oleksij Rempel
---
drivers/mmc/host/Kconfig |7 +
drivers/mmc/host/Makefile |1 +
drivers/mmc/host/alcor.c | 1165 +
3 files changed, 1173 insertions
with the time i had different email addresses
and different name which was changed after the marriage.
Signed-off-by: Oleksij Rempel
---
.mailmap | 5 +
1 file changed, 5 insertions(+)
diff --git a/.mailmap b/.mailmap
index 285e09645b31..368a634d2cf6 100644
--- a/.mailmap
+++ b/.mailmap
with the time i had different email addresses
and different name which was changed after the marriage.
Signed-off-by: Oleksij Rempel
---
.mailmap | 5 +
1 file changed, 5 insertions(+)
diff --git a/.mailmap b/.mailmap
index 285e09645b31..368a634d2cf6 100644
--- a/.mailmap
+++ b/.mailmap
Hi Shawn,
On 11.09.2018 03:53, Shawn Guo wrote:
> On Mon, Sep 10, 2018 at 04:19:26PM +0100, Mark Brown wrote:
>> On Sun, Sep 09, 2018 at 10:00:23AM +0800, Shawn Guo wrote:
>>> On Thu, Sep 06, 2018 at 11:15:17AM +0100, Mark Brown wrote:
>>
I was expecting to get a pull request with the
Hi Shawn,
On 11.09.2018 03:53, Shawn Guo wrote:
> On Mon, Sep 10, 2018 at 04:19:26PM +0100, Mark Brown wrote:
>> On Sun, Sep 09, 2018 at 10:00:23AM +0800, Shawn Guo wrote:
>>> On Thu, Sep 06, 2018 at 11:15:17AM +0100, Mark Brown wrote:
>>
I was expecting to get a pull request with the
Hi Mark,
On Thu, Sep 06, 2018 at 11:15:17AM +0100, Mark Brown wrote:
> On Mon, Aug 27, 2018 at 09:48:16AM +0800, Shawn Guo wrote:
>
> > Can you ACK on those two regulator patches, so that I can queue this
> > series up on IMX tree?
>
> I was expecting to get a pull request with the precursor
Hi Mark,
On Thu, Sep 06, 2018 at 11:15:17AM +0100, Mark Brown wrote:
> On Mon, Aug 27, 2018 at 09:48:16AM +0800, Shawn Guo wrote:
>
> > Can you ACK on those two regulator patches, so that I can queue this
> > series up on IMX tree?
>
> I was expecting to get a pull request with the precursor
On 02.08.2018 12:44, Mark Brown wrote:
> On Thu, Aug 02, 2018 at 12:34:22PM +0200, Oleksij Rempel wrote:
>> Export pm_power_off_prepare. It is needed to implement power off on
>> Freescale/NXP iMX6 based boards with external power management
>> integrated circuit (PMIC).
&g
On 02.08.2018 12:44, Mark Brown wrote:
> On Thu, Aug 02, 2018 at 12:34:22PM +0200, Oleksij Rempel wrote:
>> Export pm_power_off_prepare. It is needed to implement power off on
>> Freescale/NXP iMX6 based boards with external power management
>> integrated circuit (PMIC).
&g
-manuals/IMX6DQRM.pdf
page 5083
This patch implements step 4. of this sequence.
Signed-off-by: Oleksij Rempel
---
arch/arm/mach-imx/pm-imx6.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 017539dd712b
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index
40 mA
Signed-off-by: Oleksij Rempel
---
drivers/regulator/pfuze100-regulator.c | 91 ++
1 file changed, 91 insertions(+)
diff --git a/drivers/regulator/pfuze100-regulator.c
b/drivers/regulator/pfuze100-regulator.c
index 31c3a236120a..1e43a9de3bd5 100644
--- a/drivers
part which didn't receive an ACK is regulator stuff. So I would
hope that Mark Brown can ACK it.
Kind regards,
Oleksij Rempel
2017.12.06:
Adding Linus. Probably there is no maintainer for this patch set.
No changes are made, tested on v4.15-rc1.
2017.10.27:
Last version of this patch set was send at 2
-manuals/IMX6DQRM.pdf
page 5083
This patch implements step 4. of this sequence.
Signed-off-by: Oleksij Rempel
---
arch/arm/mach-imx/pm-imx6.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/mach-imx/pm-imx6.c b/arch/arm/mach-imx/pm-imx6.c
index 017539dd712b
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/imx6q-clock.txt | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index
40 mA
Signed-off-by: Oleksij Rempel
---
drivers/regulator/pfuze100-regulator.c | 91 ++
1 file changed, 91 insertions(+)
diff --git a/drivers/regulator/pfuze100-regulator.c
b/drivers/regulator/pfuze100-regulator.c
index 31c3a236120a..1e43a9de3bd5 100644
--- a/drivers
part which didn't receive an ACK is regulator stuff. So I would
hope that Mark Brown can ACK it.
Kind regards,
Oleksij Rempel
2017.12.06:
Adding Linus. Probably there is no maintainer for this patch set.
No changes are made, tested on v4.15-rc1.
2017.10.27:
Last version of this patch set was send at 2
Document the new optional "fsl,pmic-stby-poweroff" property.
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/regulator/pfuze100.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/pfuze
Export pm_power_off_prepare. It is needed to implement power off on
Freescale/NXP iMX6 based boards with external power management
integrated circuit (PMIC).
Signed-off-by: Oleksij Rempel
---
kernel/reboot.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/reboot.c b/kernel/reboot.c
off modes.
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/imx6dl-riotboard.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts
b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2e98c92adff7..a0e9753ee767 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard
Document the new optional "fsl,pmic-stby-poweroff" property.
Signed-off-by: Oleksij Rempel
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/regulator/pfuze100.txt | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/pfuze
Export pm_power_off_prepare. It is needed to implement power off on
Freescale/NXP iMX6 based boards with external power management
integrated circuit (PMIC).
Signed-off-by: Oleksij Rempel
---
kernel/reboot.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/kernel/reboot.c b/kernel/reboot.c
off modes.
Signed-off-by: Oleksij Rempel
---
arch/arm/boot/dts/imx6dl-riotboard.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts
b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2e98c92adff7..a0e9753ee767 100644
--- a/arch/arm/boot/dts/imx6dl-riotboard
On 27.07.2018 11:33, Robin Gong wrote:
>
>
>> -Original Message-----
>> From: Oleksij Rempel [mailto:o.rem...@pengutronix.de]
>> Sent: 2018年7月26日 17:22
>> To: Shawn Guo ; Mark Brown ;
>> Rafael J. Wysocki
>> Cc: Oleksij Rempel ; ker...@pengutroni
On 27.07.2018 11:33, Robin Gong wrote:
>
>
>> -Original Message-----
>> From: Oleksij Rempel [mailto:o.rem...@pengutronix.de]
>> Sent: 2018年7月26日 17:22
>> To: Shawn Guo ; Mark Brown ;
>> Rafael J. Wysocki
>> Cc: Oleksij Rempel ; ker...@pengutroni
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