On Thu, Dec 13, 2018 at 08:22:18PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:21:21PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
Geert Uytterhoeven
> ---
> To be queued as a fix in sh-pfc-for-v4.21.
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:21:03PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
in a similar fashion to what was done for the
> r8a77990.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Fri, Dec 14, 2018 at 09:10:04AM +, Fabrizio Castro wrote:
> Dear All,
>
> this series adds a basic dtsi for the RZ/G2E (a.k.a. r8a774c0).
Thanks Fabrizio,
This series looks fine to me but I will wait to see if there are other
reviews before applying.
Reviewed-by: Sim
On Thu, Dec 13, 2018 at 08:19:48PM +, Fabrizio Castro wrote:
> Document RZ/G2E SoC (a.k.a. r8a774c0) bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:18:14PM +, Fabrizio Castro wrote:
> Document Renesas' RZ/G2E (R8A774C0) GPIO blocks compatibility within the
> relevant dt-bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:19:28PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:19:38PM +, Fabrizio Castro wrote:
> Document RZ/G2E (r8a774c0) SoC specific bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:18:53PM +, Fabrizio Castro wrote:
> RZ/G2E (R8A774C0) watchdog implementation is compatible with R-Car
> Gen3, therefore add relevant documentation.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:18:04PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:17:43PM +, Fabrizio Castro wrote:
> Renesas' RZ/G2E (R8A774C0) SoC has DMA controllers compatible
> with this driver, therefore document RZ/G2E specific bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:20:15PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:21:11PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:21:31PM +, Fabrizio Castro wrote:
> This patch adds bindings for the r8a774c0 (RZ/G2E).
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:17:54PM +, Fabrizio Castro wrote:
> RZ/G2E (R8A774C0) SoC also has the R-Car Gen3 compatible SCIF and
> HSCIF ports, so document the SoC specific bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:19:02PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) I2C compatibility with the relevant driver
> dt-bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
: Biju Das
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:22:09PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Fri, Dec 14, 2018 at 08:41:47AM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
allow for later
> support for automatic transmission.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:22:44PM +, Fabrizio Castro wrote:
> Support RZ/G2E (a.k.a. R8A774C0) IPMMU.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:23:10PM +, Fabrizio Castro wrote:
> Add thermal support for the RZ/G2E SoC (a.k.a. R8A774C0).
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Thu, Dec 13, 2018 at 08:18:34PM +, Fabrizio Castro wrote:
> Document RZ/G2E (R8A774C0) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
Reviewed-by: Simon Horman
On Tue, Dec 11, 2018 at 09:58:05AM +0100, Geert Uytterhoeven wrote:
> Hi Arnd,
>
> On Mon, Dec 10, 2018 at 10:00 PM Arnd Bergmann wrote:
> > A number of Kconfig options have become available now to random ARM
> > platforms outside of ARCH_MULTIPLATFORM, which now causes Kconfig
> > warnings, and
On Thu, Dec 06, 2018 at 10:02:07AM +0100, Geert Uytterhoeven wrote:
> On Wed, Dec 5, 2018 at 4:39 PM Geert Uytterhoeven
> wrote:
> > This series (against renesas-devel-20181204-v4.20-rc5) contains
> > miscellaneous fixes and cleanups for the R-Car SYSC driver.
> >
> > This has been tested on
On Thu, Dec 06, 2018 at 09:22:24AM +0100, Geert Uytterhoeven wrote:
> Hi Simon,
>
> On Wed, Dec 5, 2018 at 10:21 PM Simon Horman wrote:
> > On Wed, Dec 05, 2018 at 04:39:45PM +0100, Geert Uytterhoeven wrote:
> > > To control power to a power domain, the System
On Thu, Dec 06, 2018 at 01:38:42PM -0600, Rob Herring wrote:
> On Wed, Dec 5, 2018 at 1:44 PM Simon Horman wrote:
> >
> > On Tue, Dec 04, 2018 at 09:08:57AM -0600, Rob Herring wrote:
> > > On Tue, Dec 4, 2018 at 8:57 AM Geert Uytterhoeven
> > >
On Tue, Dec 04, 2018 at 09:08:57AM -0600, Rob Herring wrote:
> On Tue, Dec 4, 2018 at 8:57 AM Geert Uytterhoeven
> wrote:
> >
> > Hi Simon,
> >
> > On Tue, Dec 4, 2018 at 3:48 PM Simon Horman wrote:
> > > On Mon, Dec 03, 2018 at 03:32:15PM -0600, Rob Her
On Tue, Dec 04, 2018 at 09:08:57AM -0600, Rob Herring wrote:
> On Tue, Dec 4, 2018 at 8:57 AM Geert Uytterhoeven
> wrote:
> >
> > Hi Simon,
> >
> > On Tue, Dec 4, 2018 at 3:48 PM Simon Horman wrote:
> > > On Mon, Dec 03, 2018 at 03:32:15PM -0600, Rob Her
On Fri, Nov 16, 2018 at 03:34:31PM +0530, Viresh Kumar wrote:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of
On Fri, Nov 16, 2018 at 03:34:31PM +0530, Viresh Kumar wrote:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of
On Fri, Sep 21, 2018 at 08:53:17PM +0900, Yoshihiro Shimoda wrote:
> This patch adds a new optional property "renesas,no-otg-pins" which
> a board does not provide proper otg pins.
>
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Simon Horman
On Fri, Sep 21, 2018 at 08:53:17PM +0900, Yoshihiro Shimoda wrote:
> This patch adds a new optional property "renesas,no-otg-pins" which
> a board does not provide proper otg pins.
>
> Signed-off-by: Yoshihiro Shimoda
Reviewed-by: Simon Horman
On Tue, Aug 28, 2018 at 05:10:11PM +0200, Geert Uytterhoeven wrote:
> The Kconfig symbol for Renesas 64-bit ARM SoCs has always been
> ARCH_RENESAS, with ARCH_SHMOBILE being selected to reuse drivers shared
> with Renesas 32-bit ARM and/or Renesas SuperH SH-Mobile SoCs.
>
> Commit
On Tue, Aug 28, 2018 at 05:10:11PM +0200, Geert Uytterhoeven wrote:
> The Kconfig symbol for Renesas 64-bit ARM SoCs has always been
> ARCH_RENESAS, with ARCH_SHMOBILE being selected to reuse drivers shared
> with Renesas 32-bit ARM and/or Renesas SuperH SH-Mobile SoCs.
>
> Commit
On Wed, Aug 22, 2018 at 12:02:16AM +0200, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang
Reviewed-by: Simon Horman
On Wed, Aug 22, 2018 at 12:02:16AM +0200, Wolfram Sang wrote:
> Signed-off-by: Wolfram Sang
Reviewed-by: Simon Horman
On Tue, Aug 14, 2018 at 01:32:15PM +0100, Fabrizio Castro wrote:
> Renesas' RZ/G2M (R8A774A1) SoC has DMA controllers compatible
> with this driver, therefore document RZ/G2M specific bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Simon Horman
On Tue, Aug 14, 2018 at 01:32:15PM +0100, Fabrizio Castro wrote:
> Renesas' RZ/G2M (R8A774A1) SoC has DMA controllers compatible
> with this driver, therefore document RZ/G2M specific bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
Reviewed-by: Simon Horman
On Mon, Aug 06, 2018 at 12:49:28PM +1000, Stephen Rothwell wrote:
> Hi Simon,
>
> The ipvs-next tree appears to contain a set of patches that have been
> merged into the net-next tree as different commits (some of them
> slightly different). This is just causing conflicts.
Thanks Stephen, I'll
On Mon, Aug 06, 2018 at 12:49:28PM +1000, Stephen Rothwell wrote:
> Hi Simon,
>
> The ipvs-next tree appears to contain a set of patches that have been
> merged into the net-next tree as different commits (some of them
> slightly different). This is just causing conflicts.
Thanks Stephen, I'll
On Tue, Jul 10, 2018 at 07:44:33AM +1000, Stephen Rothwell wrote:
> Hi Simon,
>
> Commit
>
> 19145e19bb08 ("ARM: shmobile: defconfig: Drop NET_VENDOR_=n")
>
> is missing a Signed-off-by from its committer.
Thanks Stephen,
I'll fix that in my next push.
On Tue, Jul 10, 2018 at 07:44:33AM +1000, Stephen Rothwell wrote:
> Hi Simon,
>
> Commit
>
> 19145e19bb08 ("ARM: shmobile: defconfig: Drop NET_VENDOR_=n")
>
> is missing a Signed-off-by from its committer.
Thanks Stephen,
I'll fix that in my next push.
On Thu, Jun 21, 2018 at 05:59:06PM +0200, Geert Uytterhoeven wrote:
> "ARM multiplatform" has actually two meanings:
> 1. It groups platforms that follow the "ARM multiplatform" software
> framework,
> 2. It allows to build a single kernel that can be booted on multiple
> platforms.
On Thu, Jun 21, 2018 at 05:59:06PM +0200, Geert Uytterhoeven wrote:
> "ARM multiplatform" has actually two meanings:
> 1. It groups platforms that follow the "ARM multiplatform" software
> framework,
> 2. It allows to build a single kernel that can be booted on multiple
> platforms.
On Mon, Jun 04, 2018 at 02:40:31PM +0800, nixiaoming wrote:
> After commit 1a4240f4764a ("DNS: Separate out CIFS DNS Resolver code")
> a dead code exists in function dns_query
>
> code show as below:
> if (!name || namelen == 0)
> return -EINVAL;
> /*Now the value of
On Mon, Jun 04, 2018 at 02:40:31PM +0800, nixiaoming wrote:
> After commit 1a4240f4764a ("DNS: Separate out CIFS DNS Resolver code")
> a dead code exists in function dns_query
>
> code show as below:
> if (!name || namelen == 0)
> return -EINVAL;
> /*Now the value of
On Mon, May 28, 2018 at 04:28:31PM +0530, Viresh Kumar wrote:
> On 28-05-18, 11:23, Simon Horman wrote:
> > [Cc Biju Das]
> >
> > On Fri, May 25, 2018 at 04:01:59PM +0530, Viresh Kumar wrote:
> > > The OPP properties, like "operating-points", should
On Mon, May 28, 2018 at 04:28:31PM +0530, Viresh Kumar wrote:
> On 28-05-18, 11:23, Simon Horman wrote:
> > [Cc Biju Das]
> >
> > On Fri, May 25, 2018 at 04:01:59PM +0530, Viresh Kumar wrote:
> > > The OPP properties, like "operating-points", should
[Cc Biju Das]
On Fri, May 25, 2018 at 04:01:59PM +0530, Viresh Kumar wrote:
> The OPP properties, like "operating-points", should either be present
> for all the CPUs of a cluster or none. If these are present only for a
> subset of CPUs of a cluster then things will start falling apart as soon
>
[Cc Biju Das]
On Fri, May 25, 2018 at 04:01:59PM +0530, Viresh Kumar wrote:
> The OPP properties, like "operating-points", should either be present
> for all the CPUs of a cluster or none. If these are present only for a
> subset of CPUs of a cluster then things will start falling apart as soon
>
On Fri, May 25, 2018 at 11:27:46AM +0200, Geert Uytterhoeven wrote:
> Hi Michel,
>
> On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
> wrote:
> > This adds the Renesas R9A06G032 bare bone support.
> >
> > This currently only handles generic parts (gic, architected
On Fri, May 25, 2018 at 11:27:46AM +0200, Geert Uytterhoeven wrote:
> Hi Michel,
>
> On Thu, May 24, 2018 at 11:28 AM, Michel Pollet
> wrote:
> > This adds the Renesas R9A06G032 bare bone support.
> >
> > This currently only handles generic parts (gic, architected timer)
> > and a UART.
> >
> >
On Wed, May 23, 2018 at 11:03:56AM +0200, Geert Uytterhoeven wrote:
> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet
> wrote:
> > This documents the RZ/N1 bindings for the RZN1D-DB board.
> >
> > Signed-off-by: Michel Pollet
> >
On Wed, May 23, 2018 at 11:03:56AM +0200, Geert Uytterhoeven wrote:
> On Tue, May 22, 2018 at 12:01 PM, Michel Pollet
> wrote:
> > This documents the RZ/N1 bindings for the RZN1D-DB board.
> >
> > Signed-off-by: Michel Pollet
> > Reviewed-by: Rob Herring
>
> Reviewed-by: Geert Uytterhoeven
On Wed, May 23, 2018 at 09:52:44AM +0100, Phil Edworthy wrote:
> Treat DT and ACPI the same as much as possible. Note that we can't use
> platform_get_irq() to get the DT interrupts as they are in the port
> sub-node and hence do not have an associated platform device.
>
> This also fixes a
On Wed, May 23, 2018 at 09:52:44AM +0100, Phil Edworthy wrote:
> Treat DT and ACPI the same as much as possible. Note that we can't use
> platform_get_irq() to get the DT interrupts as they are in the port
> sub-node and hence do not have an associated platform device.
>
> This also fixes a
On Tue, May 22, 2018 at 11:01:24AM +0100, Michel Pollet wrote:
> This adds the Renesas RZ/N1D (Part #R9A06G032) SoC bare
> bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> For simplicity sake, this also relies on the bootloader to set the
>
On Tue, May 22, 2018 at 11:01:24AM +0100, Michel Pollet wrote:
> This adds the Renesas RZ/N1D (Part #R9A06G032) SoC bare
> bone support.
>
> This currently only handles generic parts (gic, architected timer)
> and a UART.
> For simplicity sake, this also relies on the bootloader to set the
>
o see if there are other reviews before
applying.
Reviewed-by: Simon Horman <horms+rene...@verge.net.au>
On Tue, May 22, 2018 at 11:01:21AM +0100, Michel Pollet wrote:
> This documents the RZ/N1 bindings for the RZN1D-DB board.
>
> Signed-off-by: Michel Pollet
> Reviewed-by: Rob Herring
This looks fine but I will wait to see if there are other reviews before
applying.
Reviewed-by: Simon Horman
On Tue, May 22, 2018 at 03:29:25PM +0200, Geert Uytterhoeven wrote:
> According to Documentation/devicetree/bindings/arm/cpus.txt, the
> "enable-method" property should be a property of the individual CPU
> nodes, not of the parent "cpus" node. However, on R-Car M2-W (and on
> several other arm32
On Tue, May 22, 2018 at 03:29:25PM +0200, Geert Uytterhoeven wrote:
> According to Documentation/devicetree/bindings/arm/cpus.txt, the
> "enable-method" property should be a property of the individual CPU
> nodes, not of the parent "cpus" node. However, on R-Car M2-W (and on
> several other arm32
On Tue, May 22, 2018 at 03:24:13PM +0200, Simon Horman wrote:
> On Mon, May 21, 2018 at 05:50:50PM +0300, Laurent Pinchart wrote:
> > Hi Jacopo,
> >
> > Thank you for the patch.
> >
> > On Monday, 21 May 2018 17:45:41 EEST Jacopo Mondi wrote:
> > > Desc
On Tue, May 22, 2018 at 03:24:13PM +0200, Simon Horman wrote:
> On Mon, May 21, 2018 at 05:50:50PM +0300, Laurent Pinchart wrote:
> > Hi Jacopo,
> >
> > Thank you for the patch.
> >
> > On Monday, 21 May 2018 17:45:41 EEST Jacopo Mondi wrote:
> > > Desc
On Mon, May 21, 2018 at 04:45:42PM +0200, Jacopo Mondi wrote:
> Describe HDMI input connector and ADV7612 HDMI decoder installed on
> R-Car Gen3 Draak board.
>
> The video signal routing to the HDMI decoder to the video input interface
> VIN4 is multiplexed with CVBS input path, and
On Mon, May 21, 2018 at 04:45:42PM +0200, Jacopo Mondi wrote:
> Describe HDMI input connector and ADV7612 HDMI decoder installed on
> R-Car Gen3 Draak board.
>
> The video signal routing to the HDMI decoder to the video input interface
> VIN4 is multiplexed with CVBS input path, and
On Mon, May 21, 2018 at 05:50:50PM +0300, Laurent Pinchart wrote:
> Hi Jacopo,
>
> Thank you for the patch.
>
> On Monday, 21 May 2018 17:45:41 EEST Jacopo Mondi wrote:
> > Describe CVBS video input through analog video decoder ADV7180
> > connected to video input interface VIN4.
> >
> > The
On Mon, May 21, 2018 at 05:50:50PM +0300, Laurent Pinchart wrote:
> Hi Jacopo,
>
> Thank you for the patch.
>
> On Monday, 21 May 2018 17:45:41 EEST Jacopo Mondi wrote:
> > Describe CVBS video input through analog video decoder ADV7180
> > connected to video input interface VIN4.
> >
> > The
On Thu, May 17, 2018 at 04:12:23PM +0300, Gilad Ben-Yossef wrote:
> On Thu, May 17, 2018 at 12:04 PM, Simon Horman <ho...@verge.net.au> wrote:
> > On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote:
> >> On Wed, May 16, 2018 at 10:43 AM, Simon Horman &l
On Thu, May 17, 2018 at 04:12:23PM +0300, Gilad Ben-Yossef wrote:
> On Thu, May 17, 2018 at 12:04 PM, Simon Horman wrote:
> > On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote:
> >> On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote:
> >> > On T
On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote:
> On Wed, May 16, 2018 at 10:43 AM, Simon Horman <ho...@verge.net.au> wrote:
> > On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> >> Hi Gilad,
> >>
> >> On Tue, May
On Thu, May 17, 2018 at 11:01:57AM +0300, Gilad Ben-Yossef wrote:
> On Wed, May 16, 2018 at 10:43 AM, Simon Horman wrote:
> > On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> >> Hi Gilad,
> >>
> >> On Tue, May 15, 2018 at 2:29 PM, Gilad
On Thu, May 17, 2018 at 09:14:56AM +0200, jacopo mondi wrote:
> Hi Niklas,
>
> On Thu, May 17, 2018 at 12:23:18AM +0200, Niklas Söderlund wrote:
> > Hi Jacopo,
> >
> > Thanks for your patch.
> >
> > On 2018-05-16 15:42:09 +0200, Jacopo Mondi wrote:
> > > Describe HDMI input connector and ADV7612
On Thu, May 17, 2018 at 09:14:56AM +0200, jacopo mondi wrote:
> Hi Niklas,
>
> On Thu, May 17, 2018 at 12:23:18AM +0200, Niklas Söderlund wrote:
> > Hi Jacopo,
> >
> > Thanks for your patch.
> >
> > On 2018-05-16 15:42:09 +0200, Jacopo Mondi wrote:
> > > Describe HDMI input connector and ADV7612
On Wed, May 16, 2018 at 09:40:09AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Apr 26, 2018 at 8:24 PM, Jacopo Mondi
> wrote:
> > Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
> >
> > Reported-by: Geert Uytterhoeven
> >
On Wed, May 16, 2018 at 09:40:09AM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Thu, Apr 26, 2018 at 8:24 PM, Jacopo Mondi
> wrote:
> > Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
> >
> > Reported-by: Geert Uytterhoeven
> > Signed-off-by: Jacopo Mondi
>
> Thanks for
On Tue, May 15, 2018 at 10:36:27AM +0200, jacopo mondi wrote:
> Hi Simon,
>
> On Fri, May 11, 2018 at 03:35:14PM +0200, Simon Horman wrote:
> > On Fri, May 11, 2018 at 12:00:00PM +0200, Jacopo Mondi wrote:
> > > Add compatible string for R-Car D3 R8A7795 to list of SoCs
On Tue, May 15, 2018 at 10:36:27AM +0200, jacopo mondi wrote:
> Hi Simon,
>
> On Fri, May 11, 2018 at 03:35:14PM +0200, Simon Horman wrote:
> > On Fri, May 11, 2018 at 12:00:00PM +0200, Jacopo Mondi wrote:
> > > Add compatible string for R-Car D3 R8A7795 to list of SoCs
On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
>
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef
>
> Thanks for
On Tue, May 15, 2018 at 04:50:44PM +0200, Geert Uytterhoeven wrote:
> Hi Gilad,
>
> On Tue, May 15, 2018 at 2:29 PM, Gilad Ben-Yossef wrote:
> > Add bindings for CryptoCell instance in the SoC.
> >
> > Signed-off-by: Gilad Ben-Yossef
>
> Thanks for your patch!
>
> > ---
Thanks Stephen,
On Wed, May 16, 2018 at 11:39:18AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> On Thu, 3 May 2018 08:36:54 +1000 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the rockchip tree got a conflict in:
> >
> > arch/arm64/configs/defconfig
>
Thanks Stephen,
On Wed, May 16, 2018 at 11:39:18AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> On Thu, 3 May 2018 08:36:54 +1000 Stephen Rothwell
> wrote:
> >
> > Today's linux-next merge of the rockchip tree got a conflict in:
> >
> > arch/arm64/configs/defconfig
> >
> > between commits:
GPIO pins. When specifying multiple interrupts, if any are
> unconnected,
> + use the interrupts-extended property to specify the interrupts and set the
> + interrupt controller handle for unused interrupts to 0.
> - snps,nr-gpios : The number of pins in the port, a single cell.
> - resets : Reset line for the controller.
An enhanced example might be helpful.
That not withstanding:
Reviewed-by: Simon Horman <horms+rene...@verge.net.au>
se the interrupts-extended property to specify the interrupts and set the
> + interrupt controller handle for unused interrupts to 0.
> - snps,nr-gpios : The number of pins in the port, a single cell.
> - resets : Reset line for the controller.
An enhanced example might be helpful.
That not withstanding:
Reviewed-by: Simon Horman
On Mon, May 14, 2018 at 10:33:44PM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Fri, May 11, 2018 at 11:59 AM, Jacopo Mondi
> wrote:
> >this series enables HDMI input and VIN4 on R-Car D3 Draak board.
> >
> > The Draak board has an HDMI input connected to
On Mon, May 14, 2018 at 10:33:44PM +0200, Geert Uytterhoeven wrote:
> Hi Jacopo,
>
> On Fri, May 11, 2018 at 11:59 AM, Jacopo Mondi
> wrote:
> >this series enables HDMI input and VIN4 on R-Car D3 Draak board.
> >
> > The Draak board has an HDMI input connected to an HDMI decoder that feeds
>
On Mon, May 14, 2018 at 05:36:41AM +0300, Laurent Pinchart wrote:
> Hello,
>
> On Friday, 11 May 2018 16:45:16 EEST Simon Horman wrote:
> > On Fri, May 11, 2018 at 01:25:23PM +0200, Niklas Söderlund wrote:
> > > Hi Jacopo,
> > >
> > > Thanks for your
On Mon, May 14, 2018 at 05:36:41AM +0300, Laurent Pinchart wrote:
> Hello,
>
> On Friday, 11 May 2018 16:45:16 EEST Simon Horman wrote:
> > On Fri, May 11, 2018 at 01:25:23PM +0200, Niklas Söderlund wrote:
> > > Hi Jacopo,
> > >
> > > Thanks for your
On Fri, May 11, 2018 at 12:00:02PM +0200, Jacopo Mondi wrote:
> Describe HDMI input connected to VIN4 interface for R-Car D3 Draak
> development board.
>
> Signed-off-by: Jacopo Mondi
Hi Niklas,
As you reviewed the rest of the series I'm wondering if you're planning
On Fri, May 11, 2018 at 12:00:02PM +0200, Jacopo Mondi wrote:
> Describe HDMI input connected to VIN4 interface for R-Car D3 Draak
> development board.
>
> Signed-off-by: Jacopo Mondi
Hi Niklas,
As you reviewed the rest of the series I'm wondering if you're planning
to review this patch too.
disabled";
> > + };
> > };
Thanks, I have moved the new node to preserve sorting of nodes by bus
address and applied the result. It is as follows:
From: Jacopo Mondi <jacopo+rene...@jmondi.org>
Subject: [PATCH] arm64: dts: renesas: r8a77995: Add VIN4
Descri
d the new node to preserve sorting of nodes by bus
address and applied the result. It is as follows:
From: Jacopo Mondi
Subject: [PATCH] arm64: dts: renesas: r8a77995: Add VIN4
Describe VIN4 interface for R-Car D3 R8A77995 SoC.
Signed-off-by: Jacopo Mondi
Acked-by: Niklas Söderlund
[simon: sorted n
On Fri, May 11, 2018 at 12:00:00PM +0200, Jacopo Mondi wrote:
> Add compatible string for R-Car D3 R8A7795 to list of SoCs supported by
> rcar-vin driver.
>
> Signed-off-by: Jacopo Mondi <jacopo+rene...@jmondi.org>
Reviewed-by: Simon Horman <horms+rene...@verge.net.au>
On Fri, May 11, 2018 at 12:00:00PM +0200, Jacopo Mondi wrote:
> Add compatible string for R-Car D3 R8A7795 to list of SoCs supported by
> rcar-vin driver.
>
> Signed-off-by: Jacopo Mondi
Reviewed-by: Simon Horman
On Thu, Apr 26, 2018 at 08:24:43PM +0200, Jacopo Mondi wrote:
> Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
>
> Reported-by: Geert Uytterhoeven
> Signed-off-by: Jacopo Mondi
Thanks, applied.
On Thu, Apr 26, 2018 at 08:24:43PM +0200, Jacopo Mondi wrote:
> Describe CEU0 peripheral for Renesas R-Mobile A1 R8A7740 Soc.
>
> Reported-by: Geert Uytterhoeven
> Signed-off-by: Jacopo Mondi
Thanks, applied.
[CC Arnd, Olof, Kevin, Linux-Renesas-SoC ML]
Thanks Stephen,
the resolution seems correct to me.
Arnd, Olof, Kevin, how would you like to handle this?
I'd be quite happy for the commits in my tree, the first two mentioned
below to be merged elsewhere or deferred until the next release if
it
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