The Low Power Audio subsystem clocks are required for Audio client
to be able to request for the clocks and power domains.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile | 1 +
drivers/clk/qcom/lpasscorecc-sc7180.c | 479
[v2]
* Update retention macro name.
* Update the register description in the documentation.
[v1]
* Add support for Retention of GDSCR.
* Add YAML schema for LPASS clocks and clock IDs for LPASS.
* Add clock driver for LPASS core clocks and GCC LPASS clock.
Taniya Das (4):
clk: qcom: gdsc
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for GCC
LPASS and LPASS Core clock IDs for LPASS client to request for the clocks.
Signed-off-by: Taniya Das
---
.../bindings/clock/qcom,sc7180
Hello Rob,
Thanks for the review.
On 4/5/2020 7:39 AM, Rob Herring wrote:
+
+ reg:
+minItems: 1
+maxItems: 2
Need to define what each one is when there are 2.
Yes will define them in the next patch.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ -
Hello Stephen,
Thanks for the review.
On 4/10/2020 1:36 AM, Stephen Boyd wrote:
Quoting Taniya Das (2020-03-27 12:48:02)
diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index a250f59..cfe908f 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -28,6 +28,7
Add support for clock RPMh driver to vote for ARC and VRM managed
clock resources.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rpmh.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 96a36f6..7301c77
Add compatible for SC7180 RPMHCC.
Signed-off-by: Taniya Das
---
Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index
The RPMHCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,rpmh-clk.txt| 27
.../devicetree/bindings/clock/qcom,rpmhcc.yaml | 49
Update the Documentation binding of RPMHCC to YAML schemas.
Add RPMH clocks required to be supported on SC7180.
Taniya Das (3):
dt-bindings: clock: Add YAML schemas for the QCOM RPMHCC clock
bindings
dt-bindings: clock: Introduce RPMHCC bindings for SC7180
clk: qcom: clk-rpmh: Add
Hi Jeffrey,
On 10/2/2019 6:46 AM, Jeffrey Hugo wrote:
The GPUCC manages the clocks for the Adreno GPU found on MSM8998.
Signed-off-by: Jeffrey Hugo
---
drivers/clk/qcom/Kconfig | 9 +
drivers/clk/qcom/Makefile| 1 +
drivers/clk/qcom/gpucc-msm8998.c | 346
On 10/17/2019 5:57 PM, Amit Kucheria wrote:
Allow qcom-hw driver to initialise right after the cpufreq and thermal
subsystems are initialised in core_initcall so we get earlier access to
thermal mitigation.
Signed-off-by: Amit Kucheria
Acked-by: Daniel Lezcano
---
Acked-by: Taniya Das
+ xo_board: xo-board {
+ compatible = "fixed-clock";
+ clock-frequency = <3840>;
+ clock-output-names = "xo_board";
+ #clock-cells = <0>;
+ };
+
+ sleep_clk:
Hi Vinod,
On 10/16/2019 10:55 AM, Vinod Koul wrote:
On 15-10-19, 16:03, Rajendra Nayak wrote:
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+,
+,
+;
+ };
Update the init data name for each of the dynamic frequency switch
controlled clock associated with the RCG clock name, so that it can be
generated as per the hardware plan. Thus update the macro accordingly.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h| 2 +-
drivers/clk/qcom
Return NULL in the cases where the clk_hw is not registered with the
clock provider, but the clock consumer still requests for a clock id.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/common.c b
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc
Add device tree bindings for Global clock subsystem clock
controller for Qualcomm Technology Inc's SC7180 SoCs.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.yaml | 14 ++
include/dt-bindings/clock/qcom,gcc-sc7180.h | 155 ++
2 files changed, 169
[v1]
* Add driver support for Global Clock controller for SC7180 and also
update device tree bindings for the various clocks supported in the
clock controller.
Taniya Das (5):
clk: qcom: rcg: update the DFS macro for RCG
clk: qcom: common: Return NULL from clk_hw OF provider
dt-bind
The GCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt| 94 --
.../devicetree/bindings/clock/qcom,gcc.yaml | 174 ++
2 files
Hi Stephen,
Thanks for your review.
On 9/19/2019 2:56 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-18 02:50:17)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
new file mode 100644
index
Hi Rob,
Thanks for your comments.
On 9/27/2019 10:57 PM, Rob Herring wrote:
On Wed, Sep 18, 2019 at 03:20:17PM +0530, Taniya Das wrote:
The GCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those. Also update
the compatible
Hi Stephen,
On 10/10/2019 9:46 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-10-09 02:19:39)
Hi Stephen,
On 10/5/2019 4:50 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-10-04 10:39:31)
Could you please confirm if you are referring to update the below?
I wasn't suggesting
Hi Stephen,
On 10/5/2019 4:50 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-10-04 10:39:31)
Hi Stephen,
On 10/3/2019 9:31 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-10-03 03:31:15)
Hi Stephen,
On 10/1/2019 8:08 PM, Stephen Boyd wrote:
Why do you want to keep them critical
Hi Stephen,
On 10/3/2019 9:31 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-10-03 03:31:15)
Hi Stephen,
On 10/1/2019 8:08 PM, Stephen Boyd wrote:
Why do you want to keep them critical and registered? I'm suggesting
that any clk that is marked critical and doesn't have a parent should
Hi Stephen,
On 10/1/2019 8:08 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-27 00:37:57)
Hi Stephen,
On 9/25/2019 6:33 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-25 04:20:07)
Hi Stephen,
Please find my comments.
On 9/25/2019 4:42 AM, Stephen Boyd wrote:
Quoting Taniya Das
Hi Stephen,
On 9/25/2019 6:33 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-25 04:20:07)
Hi Stephen,
Please find my comments.
On 9/25/2019 4:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-23 01:01:11)
Hi Stephen,
Thanks for your comments.
On 9/19/2019 3:09 AM, Stephen Boyd
Hi Stephen,
Please find my comments.
On 9/25/2019 4:42 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-23 01:01:11)
Hi Stephen,
Thanks for your comments.
On 9/19/2019 3:09 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-18 02:50:18)
diff --git a/drivers/clk/qcom/gcc-sc7180.c b
Hi Stephen,
Thanks for your comments.
On 9/19/2019 3:09 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-18 02:50:18)
diff --git a/drivers/clk/qcom/gcc-sc7180.c b/drivers/clk/qcom/gcc-sc7180.c
new file mode 100644
index ..d47865d5408f
--- /dev/null
+++ b/drivers/clk/qcom/gcc
Hi Matthias,
Thank you for your review.
On 9/18/2019 11:22 PM, Matthias Kaehlcke wrote:
Hi Taniya,
not a full review, just a couple of things I noticed, comments inline.
On Wed, Sep 18, 2019 at 03:20:17PM +0530, Taniya Das wrote:
The GCC clock provider have a bunch of generic properties
Hi Rajendra,
Please pick the patch in the series :
https://patchwork.kernel.org/patch/11150013/
On 9/19/2019 4:38 PM, Rajendra Nayak wrote:
[]..
+static struct clk_rcg_dfs_data gcc_dfs_clocks[] = {
+ DEFINE_RCG_DFS(gcc_qupv3_wrap0_s0_clk_src),
+
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc
Update the init data name for each of the dynamic frequency switch
controlled clock associated with the RCG clock name, so that it can be
generated as per the hardware plan. Thus update the macro accordingly.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h| 2 +-
drivers/clk/qcom
The GCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those. Also update
the compatible for SC7180 along with example for clocks & clock-names.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt|
ller.
Taniya Das (3):
clk: qcom: rcg: update the DFS macro for RCG
dt-bindings: clk: qcom: Add YAML schemas for the GCC clock bindings
clk: qcom: Add Global Clock controller (GCC) driver for SC7180
.../devicetree/bindings/clock/qcom,gcc.txt| 94 -
.../devicetree/bindings/clock/qcom,gcc.
Hi Stephen,
Thanks for your review.
On 8/21/2019 11:31 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-08-19 09:37:48)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index e1ff83cc361e..ebd4902afd9f 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
Hello Rob,
Thank you for your review comments.
On 8/20/2019 12:44 AM, Rob Herring wrote:
On Mon, Aug 19, 2019 at 11:38 AM Taniya Das wrote:
The GCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those. Also update
the compatible
Hi Stephen, Vinod,
On 9/7/2019 2:08 AM, Stephen Boyd wrote:
Quoting Vinod Koul (2019-09-05 21:56:59)
Update the gcc qcs404 clock driver to use floor ops for sdcc clocks. As
disuccsed in [1] it is good idea to use floor ops for sdcc clocks as we
dont want the clock rates to do round up.
[1]:
Update global clock controller SDCC2/4 clocks to use the floor rcg ops,
so as to use the rounded down clock rates for these clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/gcc-ipq8074.c | 2 +-
drivers/clk/qcom/gcc-msm8998.c | 4 ++--
drivers/clk/qcom/gcc-qcs404.c | 2 +-
drivers/clk
On 9/4/2019 4:17 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-03 08:52:12)
Hi,
On 8/31/2019 3:04 AM, Doug Anderson wrote:
Hi,
On Fri, Aug 30, 2019 at 12:51 PM Stephen Boyd wrote:
Some MMC cards fail to enumerate properly when inserted into an MMC slot
on sdm845 devices
.
Fixes: 06391eddb60a ("clk: qcom: Add Global Clock controller (GCC) driver for
SDM845")
Reported-by: Douglas Anderson
Cc: Taniya Das
Signed-off-by: Stephen Boyd
---
I suppose we need to do this for all the sdc clks in qcom driver?
Seems like a good idea to me.
drivers/clk/q
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig | 10 +-
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc
The GCC clock provider have a bunch of generic properties that
are needed in a device tree. Add a YAML schemas for those. Also update
the compatible for SC7180 along with example for clocks & clock-names.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.yaml |
Update the init data name for each of the dynamic frequency switch
controlled clock associated with the RCG clock name, so that it can be
generated as per the hardware plan. Thus update the macro accordingly.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h| 2 +-
drivers/clk/qcom
controller for SC7180 and also
update device tree bindings for the various clocks supported in the
clock controller.
Taniya Das (3):
clk: qcom: rcg: update the DFS macro for RCG
dt-bindings: clk: qcom: Add YAML schemas for the GCC clock bindings
clk: qcom: Add Global Clock controller (GCC
Hello Stephen,
On 8/8/2019 3:54 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-08-07 11:13:01)
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
On 8/8/2019 3:44 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-08-07 11:13:00)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.txt
b/Documentation/devicetree/bindings/clock/qcom,gcc.txt
index 8661c3cd3ccf..18d95467cb36 100644
--- a/Documentation/devicetree/bindings/clock
the new
style of parent mapping without having to also update their DT at the
same time. This patch is based on an earlier patch from Taniya Das which
checked for -EINVAL in addition to -ENOENT return values from
clk_core_get().
Fixes: 601b6e93304a ("clk: Allow parents to be specified via cl
On 8/15/2019 9:30 PM, Stephen Boyd wrote:
These aren't useful and they reference the init structure name. Let's
just drop them.
Cc: Taniya Das
Signed-off-by: Stephen Boyd
---
Acked-by: Taniya Das
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc
Add compatible string and the include file for gcc clock
controller for SC7180.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt| 1 +
include/dt-bindings/clock/qcom,gcc-sc7180.h | 155 ++
2 files changed, 156 insertions(+)
create mode 100644
Add driver support for Global Clock controller for SC7180 and also update
device tree bindings for the various clocks supported in the clock controller.
Taniya Das (2):
clk: qcom: Add DT bindings for SC7180 gcc clock controller
clk: qcom: Add Global Clock controller (GCC) driver for SC7180
On 8/1/2019 1:05 AM, Stephen Boyd wrote:
A future patch is going to change semantics of clk_register() so that
clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
referencing this member here so that we don't run into NULL pointer
exceptions.
Cc: Taniya Das
Cc: Andy Gross
New display port clock ops supported for display port clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig| 1 +
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 77 +
3 files changed, 79 insertions(+)
diff --git a/drivers/clk
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/dispcc-sdm845.c | 214 +-
.../dt-bindings/clock/qcom,dispcc-sdm845.h| 13 +-
2 files changed, 225 insertions(+), 2 deletions
related branches and RCGs.
Taniya Das (2):
clk: qcom: rcg2: Add support for display port clock ops
clk: qcom : dispcc: Add support for display port clocks
drivers/clk/qcom/Kconfig | 1 +
drivers/clk/qcom/clk-rcg.h| 1 +
drivers/clk/qcom/clk-rcg2.c
Hi Stephen,
Thanks for your comments.
On 7/16/2019 4:07 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-14 21:20:39)
@@ -128,6 +144,82 @@ enum {
},
};
+static const struct freq_tbl ftbl_disp_cc_mdss_dp_aux_clk_src[] = {
+ F(1920, P_BI_TCXO, 1, 0, 0
Hello Stephen,
Thanks for your review.
On 7/16/2019 4:13 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-14 21:20:38)
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 18bdf34..0de080f 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -15,6 +15,7
On 7/17/2019 4:52 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-07-15 21:22:02)
Hello Stephen,
Thanks for the review.
On 7/16/2019 4:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-12 20:44:46)
On 5/10/2019 11:24 PM, Stephen Boyd wrote:
Why is the clk name changing to not have
Hello Stephen,
On 7/17/2019 4:48 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-07-15 21:19:02)
Hello Stephen,
Thanks for your review.
On 7/16/2019 4:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-08 11:24:54)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
Hello Stephen,
Thanks for the review.
On 7/16/2019 4:14 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-12 20:44:46)
On 5/10/2019 11:24 PM, Stephen Boyd wrote:
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index 5562f38..e40e8f8 100644
--- a/drivers/clk/qcom/clk
Hello Stephen,
Thanks for your review.
On 7/16/2019 4:22 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-08 11:24:54)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 57dbac9..5bb6d45 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
New display port clock ops supported for display port clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig| 1 +
drivers/clk/qcom/clk-rcg.h | 1 +
drivers/clk/qcom/clk-rcg2.c | 81 -
3 files changed, 82 insertions(+), 1 deletion
SDM845 dispcc supports RCG and CBCRs for display port, so add support for
the same.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/dispcc-sdm845.c | 216 -
include/dt-bindings/clock/qcom,dispcc-sdm845.h | 13 +-
2 files changed, 227 insertions(+), 2
]
* New display port clock ops supported for display port clocks.
* Also add support for the display port related branches and RCGs.
Taniya Das (2):
clk: qcom: rcg2: Add support for display port clock ops
clk: qcom : dispcc: Add support for display port clocks
drivers/clk/qcom/Kconfig
Hello Stephen,
On 5/10/2019 11:24 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-09 19:58:39)
Hello Stephen,
Thanks for the review.
On 5/9/2019 10:57 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-08 11:24:55)
Update the init data name for each of the dynamic frequency switch
Hello Stephen,
Thanks for the review.
On 5/9/2019 10:57 PM, Stephen Boyd wrote:
Quoting Taniya Das (2019-05-08 11:24:55)
Update the init data name for each of the dynamic frequency switch
controlled clock associated with the RCG clock name, so that it can be
generated as per the hardware plan
In case of update config failure, return -EBUSY, so that consumers could
handle the failure gracefully.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index
Update the init data name for each of the dynamic frequency switch
controlled clock associated with the RCG clock name, so that it can be
generated as per the hardware plan. Thus update the macro accordingly.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h| 2 +-
drivers/clk/qcom
Add a flag to indicate to support and enable hardware control mode
of an RCG.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/clk-rcg.h | 3 +++
drivers/clk/qcom/clk-rcg2.c | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h
index
require
the hardware control mode to be enabled explicitly.
3) Update the DFS macro as per the hardware plans.
Taniya Das (3):
clk: qcom: rcg: Return failure for RCG update
clk: qcom: rcg2: Add support for hardware control mode
clk: qcom: rcg: update the DFS macro for RCG
drivers/clk/qcom
Hello Bjorn,
I believe on few board variants these clocks could be protected and
would be added to protected-clocks list?
On 3/6/2019 11:21 AM, Bjorn Andersson wrote:
Add the clocks and resets need in order to control the Turing
remoteproc.
Signed-off-by: Bjorn Andersson
---
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 46 +++
1 file changed, 37 insertions(+), 9 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufreq-hw.c
index d83939a..b8383fe 100644
--- a/drivers/cpufreq
On 1/23/2019 11:50 PM, Matthias Kaehlcke wrote:
Hi Taniya,
On Wed, Jan 23, 2019 at 04:52:00PM +0530, Taniya Das wrote:
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS for consumers like the energy model could use the
frequency and voltage from
I have updated with the latest patch series v5.
On 1/18/2019 2:34 AM, Matthias Kaehlcke wrote:
Hi Tanyia,
On Thu, Jan 17, 2019 at 04:29:58PM +0530, Taniya Das wrote:
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS for consumers like the energy model
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 46 +++
1 file changed, 37 insertions(+), 9 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufreq-hw.c
index d83939a..402ce81 100644
--- a/drivers/cpufreq
Hello Stephen,
On 1/19/2019 12:31 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-01-17 03:19:22)
On 1/15/2019 3:55 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-01-13 22:12:39)
On 1/8/2019 2:34 AM, Stephen Boyd wrote:
As far as I know, I'm not suggesting the use of CLK_IS_CRITICAL
On 1/15/2019 3:55 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-01-13 22:12:39)
On 1/8/2019 2:34 AM, Stephen Boyd wrote:
As far as I know, I'm not suggesting the use of CLK_IS_CRITICAL here.
But removing CLK_IS_CRITICAL and relying on some random bootloader
behavior also looks wrong
On 1/17/2019 12:57 PM, Viresh Kumar wrote:
On 17-01-19, 12:38, Taniya Das wrote:
@@ -159,10 +170,18 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy
*policy)
struct device *dev = _pdev->dev;
struct of_phandle_args args;
struct device_node *cpu
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 41 ---
1 file changed, 34 insertions(+), 7 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufreq-hw.c
index d83939a..e006938 100644
--- a/drivers/cpufreq
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 43 +++
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufreq-hw.c
index d83939a..8da5576 100644
--- a/drivers/cpufreq
Hello Viresh,
On 1/9/2019 2:24 PM, Viresh Kumar wrote:
On 09-01-19, 13:37, Taniya Das wrote:
@@ -98,6 +107,8 @@ static int qcom_cpufreq_hw_read_lut(struct device *dev,
You are only using this "dev" parameter for dev_dbg(), instead of that
pass cpu_dev pointer.
Sure, will c
Thanks for the patch, would incorporate in the next patch series.
On 1/15/2019 5:59 AM, Matthias Kaehlcke wrote:
Hi Taniya,
On Wed, Jan 09, 2019 at 01:37:28PM +0530, Taniya Das wrote:
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS for consumers like
On 1/8/2019 2:34 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-01-06 22:26:00)
Hello Stephen,
On 12/21/2018 2:34 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-12-20 03:46:25)
The LPASS clocks has a dependency on the GCC lpass clocks to be enabled
before accessing them
On 1/8/2019 5:32 AM, Matthias Kaehlcke wrote:
Hi Taniya.
On Mon, Dec 24, 2018 at 12:29:18AM +0530, Taniya Das wrote:
Could you help validating with the patch below?
...
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b/drivers/cpufreq/qcom-cpufreq-hw.c
index 7559b87..23338b2 100644
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS for consumers like the energy model could use the
frequency and voltage from the OPP tables.
Tested-by: Matthias Kaehlcke
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 33
On 12/22/2018 3:15 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-12-21 10:06:48)
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS.
Yes, but why? Please specify the motivations in the commit text.
Sure, would update in the next patch
On 12/27/2018 1:02 AM, Matthias Kaehlcke wrote:
Hi Taniya,
On Mon, Dec 24, 2018 at 12:29:18AM +0530, Taniya Das wrote:
Hello Matthias,
Thanks for your review comments.
On 12/22/2018 2:27 AM, Matthias Kaehlcke wrote:
Hi Taniya,
On Fri, Dec 21, 2018 at 11:36:48PM +0530, Taniya Das wrote
Hello Stephen,
On 12/21/2018 2:34 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-12-20 03:46:25)
The LPASS clocks has a dependency on the GCC lpass clocks to be enabled
before accessing them and that was the reason to mark the gcc lpass clocks
as critical. But in the case where the lpass
Hello Matthias,
Thanks for your review comments.
On 12/22/2018 2:27 AM, Matthias Kaehlcke wrote:
Hi Taniya,
On Fri, Dec 21, 2018 at 11:36:48PM +0530, Taniya Das wrote:
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS.
Signed-off-by: Taniya Das
Hello Matthias,
On 12/21/2018 1:20 AM, Matthias Kaehlcke wrote:
Hi Taniya,
On Fri, Dec 21, 2018 at 12:48:50AM +0530, Taniya Das wrote:
This change adds the cpufreq node as per the bindings example for SDM845.
Signed-off-by: Taniya Das
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19
This change adds the cpufreq node as per the bindings example for SDM845.
Signed-off-by: Taniya Das
Tested-by: Matthias Kaehlcke
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64
Add support to read the voltage look up table and populate OPP for all
corresponding CPUS.
Signed-off-by: Taniya Das
---
drivers/cpufreq/qcom-cpufreq-hw.c | 32 ++--
1 file changed, 30 insertions(+), 2 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c
b
Hello,
On 12/21/2018 6:06 PM, Jorge Ramirez wrote:
On 12/21/18 12:19, Taniya Das wrote:
On 12/17/2018 3:16 PM, Jorge Ramirez-Ortiz wrote:
Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed
On 12/17/2018 3:16 PM, Jorge Ramirez-Ortiz wrote:
Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/clk/qcom/gcc-qcs404.c | 6 ++
1 file
This change adds the cpufreq node as per the bindings example for SDM845.
Signed-off-by: Taniya Das
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
of the GCC lpass clocks. Thus the next time bringing up the lpass subsystem
out of reset would fail.
Allow the lpass clock driver to enable/disable the gcc lpass clocks and
mark the lpass clocks not be accessed during late_init if no client vote.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/gcc
The clocks of the CPUSS such as "gcc_cpuss_ahb_clk_src" is a CRITICAL
clock and needs to vote on the active only source of XO, so as to keep the
vote as long as CPUSS is active. Similar rbcpr_clk_src is also has the same
requirement.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/gc
com_cpu_resources_init function
* Remove initialization of 'index'
* Check for valid 'c'
* Removed initialization of 'prev_cc' from 'qcom_read_lut'.
Taniya Das (2):
dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
cpufreq: qcom-hw: Add support for QCOM cpufreq
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Stephen Boyd
Signed-off-by: Taniya Das
---
drivers/cpufreq
Hello Stephen, Viresh,
On 12/13/2018 3:28 PM, Stephen Boyd wrote:
Quoting Taniya Das (2018-12-12 23:49:54)
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine
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