From: Nicolas Ferre
Fix the etm node hex address to lower case for matching regexp
specification and removing the additional warning that looks like:
arch/arm/boot/dts/at91-sama5d2_ptc_ek.dt.yaml: /: 'etm@73C000' does not
match any of the regexes: '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$',
From: Nicolas Ferre
Arnd, Olof,
Here is first batch of dt changes for 5.13. Please pull.
Thanks, best regards,
Nicolas
The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15:
Linux 5.12-rc2 (2021-03-05 17:33:41 -0800)
are available in the Git repository at:
From: Nicolas Ferre
Add unit address to the ETB and ETM nodes.
It also allow us to get rid of the warnings:
../arch/arm/boot/dts/sama5d2.dtsi:43.6-57.4: Warning
(unit_address_vs_reg): /etb: node has a reg or ranges property, but no
unit name
../arch/arm/boot/dts/sama5d2.dtsi:59.6-73.4: Warning
From: Ludovic Desroches
Having a button code and not a key code causes issues with libinput.
udev won't set ID_INPUT_KEY. If it is forced, then it causes a bug
within libinput.
Signed-off-by: Ludovic Desroches
Signed-off-by: Nicolas Ferre
---
arch/arm/boot/dts/at91-sam9x60ek.dts | 3
From: Nicolas Ferre
Arnd, Olof,
Here are the defconfig changes for 5.13 which is bigger than usual for aligning
with options that we use frequently and some changes which will be beneficial
for CI.
There is an update with savedefconfig included, tell me if you prefer the PR
without this first
From: Nicolas Ferre
Arnd, Olof,
One single patch for now on our SoC branch. Stakeholders agreed to make it
travel with at91 -> arm-soc.
Thanks, best regards,
Nicolas
The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15:
Linux 5.12-rc2 (2021-03-05 17:33:41 -0800)
From: Nicolas Ferre
UBI_GLUEBI is not so common and UBI_FASTMAP is used for several years.
Make them part of a modernization of UBI defconfig options.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/at91_dt_defconfig | 2 +-
arch/arm/configs/sama5_defconfig | 2 +-
2 files changed, 2
From: Nicolas Ferre
USB webcams are used during validation process, add them as modules.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/at91_dt_defconfig | 2 ++
arch/arm/configs/sama5_defconfig | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
From: Nicolas Ferre
Add MTD tests as they are used in CI and for validation plan.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/at91_dt_defconfig | 1 +
arch/arm/configs/sama5_defconfig | 1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/configs/at91_dt_defconfig
From: Razvan Stefanescu
Include this driver as the USB-Ethernet chip is present on SAMA5D2-ICP
board.
Signed-off-by: Razvan Stefanescu
[nicolas.fe...@microchip.com: update commit subject and message]
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 1 +
1 file changed, 1
From: Codrin Ciubotariu
Add this board as a module as it's useful for testing audio on multiple
AT91 boards.
Signed-off-by: Codrin Ciubotariu
[nicolas.fe...@microchip.com: adap to newer kernel]
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 1 +
1 file changed, 1
From: Razvan Stefanescu
Include as built-in as it's used by multiple boards.
Signed-off-by: Razvan Stefanescu
[nicolas.fe...@microchip.com: adap to newer kernel]
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Nicolas Ferre
Hi,
I collected some of the defconfig modifications that we carry in our vendor
tree for some time. They are interesting for both users and validation process
as
most are part of validation plans or CI.
Don't hesitate to indicate missing pieces to add to this serries.
The
From: Nicolas Ferre
This regulator is needed by several SoC or external peripherals on
different boards, providing required power rails. Make it built-in
to match usual use-cases.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 2 +-
1 file changed, 1 insertion(+), 1
From: Nicolas Ferre
Arnd, Olof,
Here are some fixes for 5.12. It's not regression vs. previous revision, this
is why I send them early in the cycle.
I based my branch on top of 5.12-rc2 because I noticed that your "master"
branch was pointing to it (and of course the "-dontuse" suffix from
From: Nicolas Ferre
Fix the whole mux-mask table according to datasheet for the sam9x60
product. Too much functions for pins were disabled leading to
misunderstandings when enabling more peripherals or taking this table
as an example for another board.
Take advantage of this fix to move the
From: Nicolas Ferre
Fix the whole mux-mask table according to datasheet for the sam9x60
product. Too much functions for pins were disabled leading to
misunderstandings when enabling more peripherals or taking this table
as an example for another board.
Signed-off-by: Nicolas Ferre
Fixes:
From: Federico Pellegrin
According to the datasheet PA7 can be set to either function A, B or
C (see table 6-2 of DS60001579D). The previous value would permit just
configuring with function C.
Signed-off-by: Federico Pellegrin
Fixes: 1e5f532c2737 ("ARM: dts: at91: sam9x60: add device tree for
From: Claudiu Beznea
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.
The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at
reset, connected to PD09
From: Nicolas Ferre
Arnd, Olof,
Here is the second batch of defconfig changes for 5.12.
Thanks, best regards,
Nicolas
The following changes since commit 00a1aa475f507454fab82f02c6230c8fb2312a12:
ARM: configs: multi_{v5,v7}: remove ATMEL_TCLIB (2021-01-02 14:06:48 +0100)
are available in
From: Nicolas Ferre
Add Quad SPI driver to the sama5 defconfig. This driver is needed for
sama5d2 SoC.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
From: Nicolas Ferre
Add OV7740 as a module as it's useful testing camera sensors on
sam9x60ek for instance. Unify with sama5_defconfig as well.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/at91_dt_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Nicolas Ferre
Kconfig options are not present anymore or selected by default: remove
them from sama5_defconfig.
No change to kernel compilation expected.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/sama5_defconfig | 11 ---
1 file changed, 11 deletions(-)
diff --git
From: Nicolas Ferre
Add GPIO, SPI and I2C options that were missing from the
at91_dt_defconfig whereas they were in sama5_defconfig. It unifies all
AT91 defconfigs with same set of useful options.
Signed-off-by: Nicolas Ferre
---
arch/arm/configs/at91_dt_defconfig | 3 +++
1 file changed, 3
From: Nicolas Ferre
As all AT91 platforms are converted to DT for a long time, adapt the
defconfigs by:
- removing legacy CONFIG_ATAGS as a DT will always be provided;
- removing the CONFIG_ARM_APPENDED_DTB option on SAMA5 devices as the
vast majority of systems will use a DT-aware bootloader
From: Nicolas Ferre
Arnd, Olof,
Here is the first batch of dt changes for 5.12. As for the SoC PR, I plan to do
another one by mid-next-week. Tell me if it's fine with you.
Thanks, best regards,
The following changes since commit 5c8fe583cce542aa0b84adc939ce85293de36e5e:
Linux 5.11-rc1
From: Nicolas Ferre
Arnd, Olof,
Here are the defconfig changes for 5.12 which contains the removal of old
wrapper code that we called tclib. No such config option to be used anymore in
next kernel.
Thanks, best regards,
The following changes since commit
From: Nicolas Ferre
Arnd, Olof,
I'm taking back the lead on sending the pull-requests for AT91 and hope that I
didn't loose the knowledge in the meantime. Tell me if there's something I'm
missing. Thanks a lot to Alexandre who kept our flow steady and very
predictable during all those years!
From: Nicolas Ferre
Add the i2c gpio pinctrls to support the i2c bus recovery on this board.
Signed-off-by: Nicolas Ferre
Reviewed-by: Codrin Ciubotariu
---
arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi | 22 +++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git
From: Nicolas Ferre
CAN0 and CAN1 instances share the same message ram configured
at 0x21 on sama5d2 Linux systems.
According to current configuration of CAN0, we need 0x1c00 bytes
so that the CAN1 don't overlap its message ram:
64 x RX FIFO0 elements => 64 x 72 bytes
32 x TXE (TX Event
On 21/11/2020 at 19:58, William Breathitt Gray wrote:
> Acked-by: Kamel Bouhara
> Signed-off-by: William Breathitt Gray
> ---
> Changes in v3:
>- Reorder entries to match preferred MAINTAINERS ordering
>
> MAINTAINERS | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git
Hi,
Heads-up on this kernel Oops that happened and has been observed on
linux-next since 20201103 and was not existing in 20201030.
I didn't went further until now but wanted to report it
as soon as possible.
Could it be related to newly included patch
e4e143e26ce8 ("net: macb: add support for
From: Kai Stuhlemmer
Adding SAM9X60 SIP variants to the soc description list.
Signed-off-by: Kai Stuhlemmer
Signed-off-by: Nicolas Ferre
---
drivers/soc/atmel/soc.c | 6 ++
drivers/soc/atmel/soc.h | 3 +++
2 files changed, 9 insertions(+)
diff --git a/drivers/soc/atmel/soc.c
On 17/09/2020 at 15:12, Eugen Hristev wrote:
> Add compatible string for microchip sama7g5 SoC.
>
> Signed-off-by: Eugen Hristev
Reviewed-by: Nicolas Ferre
> ---
> .../devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
>
Joe,
Please drop this chunk: it's a successive controller version number
which are all backward compatible with "fallthrough" on each case so
removing from this last one makes it inconsistent.
In sort: NACK for atmel-mci.
Best regards,
Nicolas
On 09/09/2020 at 22:06, Joe Perches wrote:
>
On 31/08/2020 at 19:11, Alexandre Belloni wrote:
> Hi,
>
> This series fixes some of the dtbs_check warnings. The remaining ones
> are mainly missing documentation or the documentation has not been
> converted to yaml.
>
> Alexandre Belloni (5):
>ARM: dts: at91: fix cpu node
>ARM: dts:
From: Nicolas Ferre
Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller.
This controller has different register layout and cannot be handled by
previous code.
We disable completely interrupts on all the queues but the queue 0.
Handling of WoL interrupt is done in another
From: Nicolas Ferre
Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet
controller.
As we do for the GEM version, we handle of WoL interrupt in a
specialized interrupt handler for MACB version that is positionned
just between suspend() and resume() calls.
Cc: Claudiu Beznea
Cc:
From: Nicolas Ferre
Hi,
Here is the second part of support for WoL magic-packet on the current macb
driver. This one
is addressing the bulk of the feature and is based on current net-next/master.
MACB and GEM code must co-exist and as they don't share exactly the same
register layout, I had to
On 17/07/2020 at 14:05, Kalle Valo wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Stephen Rothwell writes:
>
>> Today's linux-next merge of the dmaengine tree got a conflict in:
>>
>>MAINTAINERS
>>
>> between commit:
>>
>>
On 13/07/2020 at 17:45, Claudiu Beznea - M18063 wrote:
> Hi Nicolas,
>
>
> On 13.07.2020 13:05, nicolas.fe...@microchip.com wrote:
>> From: Nicolas Ferre
>>
>> Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller.
>> This controller has different register layout and cannot be
From: Nicolas Ferre
Hi,
Here is the second part of support for WoL magic-packet on the current macb
driver. This one
is addressing the bulk of the feature and is based on current net-next/master.
MACB and GEM code must co-exist and as they don't share exactly the same
register layout, I had
From: Nicolas Ferre
Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet
controller.
As we do for the GEM version, we handle of WoL interrupt in a
specialized interrupt handler for MACB version that is positionned
just between suspend() and resume() calls.
Cc: Claudiu Beznea
Cc:
From: Nicolas Ferre
Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller.
This controller has different register layout and cannot be handled by
previous code.
We disable completely interrupts on all the queues but the queue 0.
Handling of WoL interrupt is done in another
From: Nicolas Ferre
The calls to pm_runtime_force_suspend/resume() functions are only
relevant if the device is not configured to act as a WoL wakeup source.
Add the device_may_wakeup() test before calling them.
Fixes: 3e2a5e153906 ("net: macb: add wake-on-lan support via magic packet")
Cc:
From: Nicolas Ferre
Change the way the "magic-packet" DT property is handled in the
macb_probe() function, matching DT binding documentation.
Now we mark the device as "wakeup capable" instead of calling the
device_init_wakeup() function that would enable the wakeup source.
For Ethernet WoL,
From: Nicolas Ferre
As we now use the phylink call to phylink_stop() in the non-WoL path,
there is no need for this call to netif_carrier_off() anymore. It can
disturb the underlying phylink FSM.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Cc: Claudiu Beznea
Cc: Harini Katakam
Cc:
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is not enough to figure out if Ethernet driver
supports Wake-on-Lan.
Initialization of "supported" and "wolopts" members is done in phylink
function, no need to keep them in calling
From: Nicolas Ferre
Hi,
Here is a split series to fix WoL magic-packet on the current macb driver. Only
fixes in this one based on current net/master.
Best regards,
Nicolas
Changes in v5:
- Addressed the error code returned by phylink_ethtool_set_wol() as suggested
by Russell.
If PHY
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
and wakeup source are positioned.
Use the one passed by function call which is equivalent to
>dev->dev.parent.
It's preventing the trigger of a spurious interrupt in case the
Wake-on-Lan feature is used.
From: Nicolas Ferre
I hand over the maintenance of these drivers to my colleagues. Claudiu,
Codrin and Tudor already have experience with these controllers and
sub-systems.
Signed-off-by: Nicolas Ferre
---
Mark, Sebastian,
I kept these entries together as it may generate conflicts if handled
From: Nicolas Ferre
I would like that Claudiu becomes co-maintainer of the Cadence macb
driver. He's already participating to lots of reviews and enhancements
to this driver and knows the different versions of this controller.
Signed-off-by: Nicolas Ferre
---
MAINTAINERS | 1 +
1 file
Luc,
Thanks for your patch...
On 28/06/2020 at 20:32, Luc Van Oostenryck wrote:
> The method ndo_start_xmit() is defined as returning an 'netdev_tx_t',
> which is a typedef for an enum type defining 'NETDEV_TX_OK' but this
> driver returns '0' instead of 'NETDEV_TX_OK'.
>
> Fix this by
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is not enough to figure out if Ethernet driver
supports Wake-on-Lan.
Initialization of "supported" and "wolopts" members is done in phylink
function, no need to keep them in calling
From: Nicolas Ferre
Change the way the "magic-packet" DT property is handled in the
macb_probe() function, matching DT binding documentation.
Now we mark the device as "wakeup capable" instead of calling the
device_init_wakeup() function that would enable the wakeup source.
For Ethernet WoL,
From: Nicolas Ferre
The calls to pm_runtime_force_suspend/resume() functions are only
relevant if the device is not configured to act as a WoL wakeup source.
Add the device_may_wakeup() test before calling them.
Fixes: 3e2a5e153906 ("net: macb: add wake-on-lan support via magic packet")
From: Nicolas Ferre
As we now use the phylink call to phylink_stop() in the non-WoL path,
there is no need for this call to netif_carrier_off() anymore. It can
disturb the underlying phylink FSM.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Nicolas Ferre
Reviewed-by:
From: Nicolas Ferre
Hi,
Here is a split series to fix WoL magic-packet on the current macb driver. Only
fixes in this one based on current net/master.
Best regards,
Nicolas
Changes in v4:
- Pure bug fix series for 'net'. GEM addition and MACB update removed: will be
sent later.
Changes in
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
and wakeup source are positioned.
Use the one passed by function call which is equivalent to
>dev->dev.parent.
It's preventing the trigger of a spurious interrupt in case the
Wake-on-Lan feature is used.
From: Nicolas Ferre
The calls to pm_runtime_force_suspend/resume() functions are only
relevant if the device is not configured to act as a WoL wakeup source.
Add the device_may_wakeup() test before calling them.
Fixes: 3e2a5e153906 ("net: macb: add wake-on-lan support via magic packet")
Cc:
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
and wakeup source are positioned.
Use the one passed by function call which is equivalent to
>dev->dev.parent.
It's preventing the trigger of a spurious interrupt in case the
Wake-on-Lan feature is used.
From: Nicolas Ferre
Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet
controller.
As we do for the GEM version, we handle of WoL interrupt in a
specialized interrupt handler for MACB version that is positionned
just between suspend() and resume() calls.
Cc: Claudiu Beznea
Cc:
From: Nicolas Ferre
Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller.
This controller has different register layout and cannot be handled by
previous code.
We disable completely interrupts on all the queues but the queue 0.
Handling of WoL interrupt is done in another
From: Nicolas Ferre
As we now use the phylink call to phylink_stop() in the non-WoL path,
there is no need for this call to netif_carrier_off() anymore. It can
disturb the underlying phylink FSM.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Cc: Claudiu Beznea
Cc: Harini Katakam
Cc:
From: Nicolas Ferre
Hi,
Here is the 3rd series to fix WoL magic-packet on the current macb driver.
I also add, in the second part of this series the feature to GEM types of IPs.
Please tell me if they should be separated; but the two last patches cannot go
without the 5 fixes first ones.
MACB
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is not enough to figure out if Ethernet driver
supports Wake-on-Lan.
Initialization of "supported" and "wolopts" members is done in phylink
function, no need to keep them in calling
From: Nicolas Ferre
Change the way the "magic-packet" DT property is handled in the
macb_probe() function, matching DT binding documentation.
Now we mark the device as "wakeup capable" instead of calling the
device_init_wakeup() function that would enable the wakeup source.
For Ethernet WoL,
On 03/05/2020 at 14:32, Dejin Zheng wrote:
> A call of the function macb_init() can fail in the function
> fu540_c000_init. The related system resources were not released
> then. use devm_platform_ioremap_resource() to replace ioremap()
> to fix it.
>
> Fixes: c218ad559020ff9 ("macb: Add support
On 11/10/2019 at 20:59, Nathan Chancellor wrote:
> drivers/usb/host/ohci-at91.c:118:28: warning: unused variable 'regs'
> [-Wunused-variable]
> struct ohci_regs __iomem *regs = hcd->regs;
>^
> 1 warning generated.
>
> Fixes: 9c4567fa0a44 ("USB: host:
On 09/10/2019 at 21:48, Alexandre Belloni wrote:
> The PIT is not required anymore to successfully boot and may actually harm
> in case preempt-rt is used because the PIT interrupt is shared.
> Disable it so the TCB clocksource is used.
>
> Signed-off-by: Alexandre Belloni
Acked-by: Nicolas
On 24/09/2019 at 12:39, Eugen Hristev - M18282 wrote:
> From: Eugen Hristev
>
> The prescaler mask for sam9x60 must be 0xff (8 bits).
> Being set to 0, means that we cannot set any prescaler, thus the
> programmable clocks do not work (except the case with prescaler 0)
> Set the mask accordingly
On 11/09/2019 at 08:39, Eugen Hristev - M18282 wrote:
> From: Eugen Hristev
>
> The PLL input range needs to be able to allow 24 Mhz crystal as input
> Update the range accordingly in plla characteristics struct
>
> Signed-off-by: Eugen Hristev
Acked-by: Nicolas Ferre
Thanks Eugen!
Best
Sebastian,
On 20/08/2019 at 15:27, Sebastian Duda wrote:
> Hello Andrei,
>
> in my master thesis, I'm using the association of subsystems to
> maintainers/reviewers and its status given in the MAINTAINERS file.
> During the research I noticed that there are several subsystems without
> a status
On 14/08/2019 at 11:08, Alexandre Belloni wrote:
> External E-Mail
>
>
> On 13/08/2019 08:11:23+, Nicolas Ferre wrote:
>> On 13/08/2019 at 08:10, Denis Efremov wrote:
>>> Update MAINTAINERS record to reflect the filename change
>>> from tcb_clksrc.c to timer-atmel-tcb.c
>>>
>>> Cc: Nicolas
On 20/08/2019 at 11:10, Andreas Schwab wrote:
> External E-Mail
>
>
> On Aug 13 2019, Paul Walmsley wrote:
>
>> Dave, Nicolas,
>>
>> On Mon, 22 Jul 2019, Yash Shah wrote:
>>
>>> On Fri, Jul 19, 2019 at 5:36 PM wrote:
On 19/07/2019 at 13:10, Yash Shah wrote:
> Update the
On 13/08/2019 at 08:10, Denis Efremov wrote:
> Update MAINTAINERS record to reflect the filename change
> from tcb_clksrc.c to timer-atmel-tcb.c
>
> Cc: Nicolas Ferre
Acked-by: Nicolas Ferre
But, while you're at it, I would add another line: see below...
> Cc: Alexandre Belloni
> Cc:
On 19/07/2019 at 13:10, Yash Shah wrote:
> Update the compatibility string for SiFive FU540-C000 as per the new
> string updated in the binding doc.
> Reference: https://lkml.org/lkml/2019/7/17/200
Maybe referring to lore.kernel.org is better:
On 19/07/2019 at 13:10, Yash Shah wrote:
> As per the discussion with Nicolas Ferre, rename the compatible property
> to a more appropriate and specific string.
> LINK: https://lkml.org/lkml/2019/7/17/200
>
> Signed-off-by: Yash Shah
Acked-by: Nicolas Ferre
> ---
>
On 25/06/2019 at 11:10, Codrin Ciubotariu wrote:
> In clk_generated_determine_rate(), if the divisor is greater than
> GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> If clk_generated_set_rate() will be called later with this wrong
> rate, it will return -EINVAL, so the
On 25/06/2019 at 10:48, Palmer Dabbelt wrote:
> The help text makes it look like NET_VENDOR_CADENCE enables support for
> Atmel devices, when in reality it's a driver written by Atmel that
> supports Cadence devices. This may confuse users that have this device
> on a non-Atmel SoC.
>
> The fix
On 25/06/2019 at 10:48, Palmer Dabbelt wrote:
> commit c218ad559020 ("macb: Add support for SiFive FU540-C000") added a
> dependency on the common clock framework to the macb driver, but didn't
> express that dependency in Kconfig. As a result macb now fails to
> compile on systems without
On 21/06/2019 at 17:28, Antoine Tenart wrote:
> Use NAPI_POLL_WEIGHT, the default NAPI poll() weight instead of
> redefining our own value (which turns out to be 64 as well).
>
> Signed-off-by: Antoine Tenart
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/cadence/macb_main.c | 2 +-
>
On 21/06/2019 at 17:26, Antoine Tenart wrote:
> This patch fixes the MAC address setup in the probe. The MAC address
> retrieved using of_get_mac_address was checked for not containing an
> error, but it may also be NULL which wasn't tested. Fix it by replacing
> IS_ERR with IS_ERR_OR_NULL.
>
>
On 24/06/2019 at 11:57, Palmer Dabbelt wrote:
> External E-Mail
>
>
> On Mon, 24 Jun 2019 02:49:16 PDT (-0700), nicolas.fe...@microchip.com wrote:
>> On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
>>> External E-Mail
>>>
>>>
>>> When touching the Kconfig for this driver I noticed that both the
On 23/05/2019 at 22:50, Rob Herring wrote:
> On Thu, May 23, 2019 at 6:46 AM Yash Shah wrote:
>>
>> Add the compatibility string documentation for SiFive FU540-C
>> interface.
>> On the FU540, this driver also needs to read and write registers in a
>> management IP block that monitors or
On 24/06/2019 at 11:57, Palmer Dabbelt wrote:
> External E-Mail
>
>
> On Mon, 24 Jun 2019 02:40:21 PDT (-0700), nicolas.fe...@microchip.com wrote:
>> On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
>>> External E-Mail
>>>
>>>
>>> The patch to add support for the FU540-C000 added a dependency on
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
> External E-Mail
>
>
> When touching the Kconfig for this driver I noticed that both the
> Kconfig help text and a comment referred to this being an Atmel driver.
> As far as I know, this is a Cadence driver. The fix is just
Indeed: was written
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
> External E-Mail
>
>
> The patch to add support for the FU540-C000 added a dependency on
> COMMON_CLK, but didn't express that via Kconfig. This fixes the build
> failure by adding CONFIG_MACB_FU540, which depends on COMMON_CLK and
> conditionally
On 10/06/2019 at 17:20, Codrin Ciubotariu - M19940 wrote:
> From: Codrin Ciubotariu
>
> In clk_generated_determine_rate(), if the divisor is greater than
> GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> If clk_generated_set_rate() will be called later with this wrong
> rate,
On 11/06/2019 at 19:09, Colin King wrote:
> External E-Mail
>
>
> From: Colin Ian King
>
> Currently variable ret is being initialized with -ENOENT however that
> value is never read and ret is being re-assigned later on. Hence this
> assignment is redundant and can be removed.
>
>
On 04/06/2019 at 10:14, Krzysztof Kozlowski wrote:
> Remove the CONFIG_UEVENT_HELPER_PATH because:
> 1. It is disabled since commit 1be01d4a5714 ("driver: base: Disable
> CONFIG_UEVENT_HELPER by default") as its dependency (UEVENT_HELPER) was
> made default to 'n',
> 2. It is not
On 07/05/2019 at 16:29, Harini Katakam wrote:
> External E-Mail
>
>
> Current order in open:
> -> Enable interrupts (macb_init_hw)
> -> Enable NAPI
> -> Start PHY
>
> Sequence of RX handling:
> -> RX interrupt occurs
> -> Interrupt is cleared and interrupt bits disabled in handler
> -> NAPI is
On 03/04/2019 at 22:52, Alexandre Belloni wrote:
> External E-Mail
>
>
> The X11 license text [1] is explicitly for the X Consortium and has a
> couple of extra clauses. The MIT license text [2] is actually what the
> current DT files claim.
>
> [1] https://spdx.org/licenses/X11.html
> [2]
On 03/04/2019 at 18:22, Alexandre Belloni wrote:
> The X11 license text [1] is explicitly for the X Consortium and has a
> couple of extra clauses. The MIT license text [2] is actually what the
> current DT files claim.
>
> [1] https://spdx.org/licenses/X11.html
> [2]
Vinod,
Please disregard this series: I'm sending a v3 right now. Sorry for the
noise.
Best regards,
Nicolas
On 03/04/2019 at 12:09, Nicolas Ferre wrote:
> Even if this case shouldn't happen when controller is properly programmed,
> it's still better to avoid dumping a kernel Oops for this.
Vinod,
Thanks for your review, I'm preparing v2.
On 11/02/2019 at 12:58, Vinod Koul wrote:
> On 05-02-19, 12:03, Nicolas Ferre wrote:
>> Complement the identification of errors with stoping the channel and
>> dumping the descriptor that led to the error case.
>>
>> Signed-off-by: Nicolas Ferre
On 14/03/2019 at 17:26, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Change Microchip timers section name to be more generic.
>
> Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
On 14/03/2019 at 17:26, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Add timer-microchip-pit64b.c as maintained file.
>
> Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS
On 14/03/2019 at 17:26, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Add myself as maintainer for Microchip timers and clocksource
> drivers.
>
> Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
Thanks Claudiu!
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1
On 14/03/2019 at 17:26, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Add driver for Microchip PIT64B timer. Timer could be used in continuous
> mode or oneshot mode. The hardware has 2x32 bit registers for period
> emulating a 64 bit timer. The LSB_PR and MSB_PR registers are used
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