On 2017-07-14 23:00, Stephen Boyd wrote:
On 07/11, Kiran Gunda wrote:
@@ -420,7 +440,8 @@ static int pmic_arb_write_cmd(struct
spmi_controller *ctrl, u8 opc, u8 sid,
Mostly style nitpicks!
Will check and address in the next patch.
/* Start the transaction */
On 2017-07-14 23:00, Stephen Boyd wrote:
On 07/11, Kiran Gunda wrote:
@@ -420,7 +440,8 @@ static int pmic_arb_write_cmd(struct
spmi_controller *ctrl, u8 opc, u8 sid,
Mostly style nitpicks!
Will check and address in the next patch.
/* Start the transaction */
On 07/11, Kiran Gunda wrote:
> @@ -420,7 +440,8 @@ static int pmic_arb_write_cmd(struct spmi_controller
> *ctrl, u8 opc, u8 sid,
>
Mostly style nitpicks!
> /* Start the transaction */
> pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd);
> - rc =
On 07/11, Kiran Gunda wrote:
> @@ -420,7 +440,8 @@ static int pmic_arb_write_cmd(struct spmi_controller
> *ctrl, u8 opc, u8 sid,
>
Mostly style nitpicks!
> /* Start the transaction */
> pmic_arb_base_write(pmic_arb, offset + PMIC_ARB_CMD, cmd);
> - rc =
From: David Collins
Add support for version 5 of the SPMI PMIC arbiter. It utilizes
different offsets for registers than those found on version 3.
Also, the procedure to determine if writing and IRQ access is
allowed for a given PPID changes for version 5.
From: David Collins
Add support for version 5 of the SPMI PMIC arbiter. It utilizes
different offsets for registers than those found on version 3.
Also, the procedure to determine if writing and IRQ access is
allowed for a given PPID changes for version 5.
Signed-off-by: David Collins
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