On Mon, Apr 14, 2014 at 09:43:31PM +0100, Mark Brown wrote:
> On Wed, Apr 02, 2014 at 06:10:19PM +0800, Nicolin Chen wrote:
>
> > -- clock-names : Must include the "sai" entry.
> > +- clock-names : Must include the "bus" for register access and "mclk1"
> > "mclk2"
> > + "mclk3" for bit clock
On Wed, Apr 02, 2014 at 06:10:19PM +0800, Nicolin Chen wrote:
> -- clock-names : Must include the "sai" entry.
> +- clock-names : Must include the "bus" for register access and "mclk1"
> "mclk2"
> + "mclk3" for bit clock and frame clock providing.
This breaks compatibilty with old DTs - it
On Mon, Apr 14, 2014 at 09:43:31PM +0100, Mark Brown wrote:
On Wed, Apr 02, 2014 at 06:10:19PM +0800, Nicolin Chen wrote:
-- clock-names : Must include the sai entry.
+- clock-names : Must include the bus for register access and mclk1
mclk2
+ mclk3 for bit clock and frame clock
On Wed, Apr 02, 2014 at 06:10:19PM +0800, Nicolin Chen wrote:
-- clock-names : Must include the sai entry.
+- clock-names : Must include the bus for register access and mclk1
mclk2
+ mclk3 for bit clock and frame clock providing.
This breaks compatibilty with old DTs - it just removes the
The SAI mainly has the following clocks:
bus clock
control and configuration registers and to generate synchronous
interrupts and DMA requests.
mclk1, mclk2, mclk3
to generate the bit clock when the receiver or transmitter is
configured for an internally generated bit clock.
The SAI mainly has the following clocks:
bus clock
control and configuration registers and to generate synchronous
interrupts and DMA requests.
mclk1, mclk2, mclk3
to generate the bit clock when the receiver or transmitter is
configured for an internally generated bit clock.
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