Hi Philipp,
On 10/8/2019 11:56 PM, Philipp Zabel wrote:
Hi Martin,
On Mon, 2019-10-07 at 21:53 +0200, Martin Blumenstingl wrote:
Hi Philipp,
On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel wrote:
[...]
because the register layout was greatly simplified for the newer SoCs
(for which there is
Hi Martin,
On Mon, 2019-10-07 at 21:53 +0200, Martin Blumenstingl wrote:
> Hi Philipp,
>
> On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel wrote:
> [...]
> > > because the register layout was greatly simplified for the newer SoCs
> > > (for which there is reset-intel) compared to the older ones
>
Hi Martin,Philipp,
On 10/8/2019 3:53 AM, Martin Blumenstingl wrote:
Hi Philipp,
On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel wrote:
[...]
because the register layout was greatly simplified for the newer SoCs
(for which there is reset-intel) compared to the older ones
(reset-lantiq).
Dilip's
Hi Philipp,
On Thu, Oct 3, 2019 at 4:19 PM Philipp Zabel wrote:
[...]
> > because the register layout was greatly simplified for the newer SoCs
> > (for which there is reset-intel) compared to the older ones
> > (reset-lantiq).
> > Dilip's suggestion (in my own words) is that you take his new
>
Hi Martin, Dilip,
On Thu, Sep 19, 2019 at 09:51:48PM +0200, Martin Blumenstingl wrote:
> Hi Dilip,
>
> (sorry for the late reply)
Same, sorry for the delay.
> On Thu, Sep 12, 2019 at 8:38 AM Dilip Kota
> wrote:
> [...]
> > The major difference between the vrx200 and lgm is:
> > 1.) RCU in
Hi Martin and Philipp,
On 20/9/2019 10:47 AM, Dilip Kota wrote:
Hi Martin,
On 9/20/2019 3:51 AM, Martin Blumenstingl wrote:
Hi Dilip,
(sorry for the late reply)
On Thu, Sep 12, 2019 at 8:38 AM Dilip Kota
wrote:
[...]
The major difference between the vrx200 and lgm is:
1.) RCU in vrx200
Hi Martin,
On 9/20/2019 3:51 AM, Martin Blumenstingl wrote:
Hi Dilip,
(sorry for the late reply)
On Thu, Sep 12, 2019 at 8:38 AM Dilip Kota wrote:
[...]
The major difference between the vrx200 and lgm is:
1.) RCU in vrx200 is having multiple register regions wheres RCU in lgm
has one single
Hi Dilip,
(sorry for the late reply)
On Thu, Sep 12, 2019 at 8:38 AM Dilip Kota wrote:
[...]
> The major difference between the vrx200 and lgm is:
> 1.) RCU in vrx200 is having multiple register regions wheres RCU in lgm
> has one single register region.
> 2.) Register offsets and bit offsets
; linux-
ker...@vger.kernel.org; p.za...@pengutronix.de; Wu, Qiming ; r...@kernel.org; Hauke Mehrtens
Subject: Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM
SoC
Hi Martin,
On 9/12/2019 2:38 PM, Dilip Kota wrote:
Re-sending the mail, because of delivery failure.
sorry for the spam
nel.org; linux-
> ker...@vger.kernel.org; p.za...@pengutronix.de; Wu, Qiming ming...@intel.com>; r...@kernel.org; Hauke Mehrtens
> Subject: Re: [PATCH v2 2/2] reset: Reset controller driver for Intel LGM
> SoC
>
> Hi Martin,
>
> On 9/12/2019 2:38 PM, Dilip Kota wrote:
> &g
Hi Martin,
On 9/12/2019 2:38 PM, Dilip Kota wrote:
Re-sending the mail, because of delivery failure.
sorry for the spam.
Hi Martin,
On 9/6/2019 4:53 AM, Martin Blumenstingl wrote:
Hi,
On Thu, Sep 5, 2019 at 4:38 AM Chuan Hua, Lei
wrote:
[...]
I'm not surprised that we got some of the IP
Re-sending the mail, because of delivery failure.
sorry for the spam.
Hi Martin,
On 9/6/2019 4:53 AM, Martin Blumenstingl wrote:
Hi,
On Thu, Sep 5, 2019 at 4:38 AM Chuan Hua, Lei
wrote:
[...]
I'm not surprised that we got some of the IP block layout for the
VRX200 RCU "wrong" - all
Hi,
On Thu, Sep 5, 2019 at 4:38 AM Chuan Hua, Lei
wrote:
[...]
> >>> I'm not surprised that we got some of the IP block layout for the
> >>> VRX200 RCU "wrong" - all "documentation" we have is the old Lantiq UGW
> >>> (BSP).
> >>> with proper documentation (as in a "public
Hi Martin,
On 9/3/2019 6:04 AM, Martin Blumenstingl wrote:
Hi,
On Mon, Sep 2, 2019 at 11:45 AM Chuan Hua, Lei
wrote:
Hi Martin,
On 9/2/2019 5:38 AM, Martin Blumenstingl wrote:
Hi,
On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei
wrote:
Hi Martin,
On 8/30/2019 5:40 AM, Martin
Hi,
On Mon, Sep 2, 2019 at 11:45 AM Chuan Hua, Lei
wrote:
>
> Hi Martin,
>
>
> On 9/2/2019 5:38 AM, Martin Blumenstingl wrote:
> > Hi,
> >
> > On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei
> > wrote:
> >> Hi Martin,
> >>
> >> On 8/30/2019 5:40 AM, Martin Blumenstingl wrote:
> >>> Hi,
> >>>
>
Hi Martin,
On 9/2/2019 5:38 AM, Martin Blumenstingl wrote:
Hi,
On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei
wrote:
Hi Martin,
On 8/30/2019 5:40 AM, Martin Blumenstingl wrote:
Hi,
On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei
wrote:
I'm not surprised that we got some of the IP block
Hi,
On Fri, Aug 30, 2019 at 5:02 AM Chuan Hua, Lei
wrote:
>
> Hi Martin,
>
> On 8/30/2019 5:40 AM, Martin Blumenstingl wrote:
> > Hi,
> >
> > On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei
> > wrote:
> >
> >>> I'm not surprised that we got some of the IP block layout for the
> >>> VRX200 RCU
Hi Martin,
On 8/30/2019 5:40 AM, Martin Blumenstingl wrote:
Hi,
On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei
wrote:
I'm not surprised that we got some of the IP block layout for the
VRX200 RCU "wrong" - all "documentation" we have is the old Lantiq UGW
(BSP).
with proper documentation (as
Hi,
On Thu, Aug 29, 2019 at 4:51 AM Chuan Hua, Lei
wrote:
> >
> > I'm not surprised that we got some of the IP block layout for the
> > VRX200 RCU "wrong" - all "documentation" we have is the old Lantiq UGW
> > (BSP).
> > with proper documentation (as in a "public datasheet for the SoC") it
> >
On 8/29/2019 4:01 AM, Martin Blumenstingl wrote:
Hi,
On Wed, Aug 28, 2019 at 3:53 AM Chuan Hua, Lei
wrote:
[...]
1. reset-lantiq.c use index instead of register offset + bit position.
index reset is good for a small system (< 64). However, it will become very
difficult to use if you have >
Hi,
On Wed, Aug 28, 2019 at 3:53 AM Chuan Hua, Lei
wrote:
[...]
> 1. reset-lantiq.c use index instead of register offset + bit position.
> index reset is good for a small system (< 64). However, it will become
> very
> difficult to use if you have > 100 reset. So we use
Hi Martin,
On 8/28/2019 5:15 AM, Martin Blumenstingl wrote:
Hi,
On Tue, Aug 27, 2019 at 4:23 AM Chuan Hua, Lei
wrote:
[...]
1. reset-lantiq.c use index instead of register offset + bit position.
index reset is good for a small system (< 64). However, it will become very
difficult to use if
Hi,
On Tue, Aug 27, 2019 at 4:23 AM Chuan Hua, Lei
wrote:
[...]
> >> 1. reset-lantiq.c use index instead of register offset + bit position.
> >> index reset is good for a small system (< 64). However, it will become very
> >> difficult to use if you have > 100 reset. So we use register offset +
Hi Martin,
Please check the reply below.
On 8/27/2019 5:49 AM, Martin Blumenstingl wrote:
Hi,
On Mon, Aug 26, 2019 at 6:01 AM Chuan Hua, Lei
wrote:
Hi Martin,
Thanks for your comment.
thank you for the quick reply
On 8/25/2019 5:11 AM, Martin Blumenstingl wrote:
Hi Dilip,
Add driver
Hi,
On Mon, Aug 26, 2019 at 6:01 AM Chuan Hua, Lei
wrote:
>
> Hi Martin,
>
> Thanks for your comment.
thank you for the quick reply
> On 8/25/2019 5:11 AM, Martin Blumenstingl wrote:
> > Hi Dilip,
> >
> >> Add driver for the reset controller present on Intel
> >> Lightening Mountain (LGM) SoC
On 8/23/2019 6:09 PM, Philipp Zabel wrote:
On Fri, 2019-08-23 at 17:47 +0800, Dilip Kota wrote:
[...]
Thanks for pointing it out.
Reset is not supported on LGM platform.
I will update the reset_device() definition to "return -EOPNOTSUPP"
In that case you can just drop intel_reset_device()
Hi Martin,
Thanks for your comment.
On 8/25/2019 5:11 AM, Martin Blumenstingl wrote:
Hi Dilip,
Add driver for the reset controller present on Intel
Lightening Mountain (LGM) SoC for performing reset
management of the devices present on the SoC. Driver also
registers a reset handler to peform
Hi Dilip,
> Add driver for the reset controller present on Intel
> Lightening Mountain (LGM) SoC for performing reset
> management of the devices present on the SoC. Driver also
> registers a reset handler to peform the entire device reset.
[...]
> +static const struct of_device_id
On Fri, 2019-08-23 at 17:47 +0800, Dilip Kota wrote:
[...]
> Thanks for pointing it out.
> Reset is not supported on LGM platform.
> I will update the reset_device() definition to "return -EOPNOTSUPP"
In that case you can just drop intel_reset_device() completely,
the core checks whether
Hi Philipp,
On 8/23/2019 4:43 PM, Philipp Zabel wrote:
Hi Dilip,
On Fri, 2019-08-23 at 13:28 +0800, Dilip Kota wrote:
Add driver for the reset controller present on Intel
Lightening Mountain (LGM) SoC for performing reset
management of the devices present on the SoC. Driver also
registers a
Hi Dilip,
On Fri, 2019-08-23 at 13:28 +0800, Dilip Kota wrote:
> Add driver for the reset controller present on Intel
> Lightening Mountain (LGM) SoC for performing reset
> management of the devices present on the SoC. Driver also
> registers a reset handler to peform the entire device reset.
>
Add driver for the reset controller present on Intel
Lightening Mountain (LGM) SoC for performing reset
management of the devices present on the SoC. Driver also
registers a reset handler to peform the entire device reset.
Signed-off-by: Dilip Kota
---
Changes on v2:
No changes
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