Hi Mark,
On Tue, Apr 15, 2014 at 1:31 AM, Mark Brown wrote:
> On Mon, Apr 14, 2014 at 02:36:53PM +0530, Harini Katakam wrote:
>> Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
>
> Applied both, thanks. Please use subject lines consistent with the
> style for the subsystem.
On Mon, Apr 14, 2014 at 02:36:53PM +0530, Harini Katakam wrote:
> Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Applied both, thanks. Please use subject lines consistent with the
style for the subsystem.
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Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Signed-off-by: Harini Katakam
---
v4 changes:
- Use clk_disable_unprepare and clk_prepare_enable in suspend and resume
respectively.
v3 changes:
- Remove setup function.
Make clock CPOL/CPHA setup a separate funtion and
Hi Mark,
On Tue, Apr 15, 2014 at 1:31 AM, Mark Brown broo...@kernel.org wrote:
On Mon, Apr 14, 2014 at 02:36:53PM +0530, Harini Katakam wrote:
Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Applied both, thanks. Please use subject lines consistent with the
style for the
Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Signed-off-by: Harini Katakam hari...@xilinx.com
---
v4 changes:
- Use clk_disable_unprepare and clk_prepare_enable in suspend and resume
respectively.
v3 changes:
- Remove setup function.
Make clock CPOL/CPHA setup a
On Mon, Apr 14, 2014 at 02:36:53PM +0530, Harini Katakam wrote:
Add driver for Cadence SPI controller. This is used in Xilinx Zynq.
Applied both, thanks. Please use subject lines consistent with the
style for the subsystem.
signature.asc
Description: Digital signature
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