Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread Sekhar Nori
On Friday 19 January 2018 12:19 AM, David Lechner wrote: >> > > or to avoid defining a new macro? > > >> regmap_write_bits(clk->regmap, CFGCHIP(2), >>   CFGCHIP2_USB1PHYCLKMUX, >>   index ? CFGCHIP2_USB1PHYCLKMUX : 0); Looks good as well! Regards, Sekhar

Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread Sekhar Nori
On Friday 19 January 2018 12:19 AM, David Lechner wrote: >> > > or to avoid defining a new macro? > > >> regmap_write_bits(clk->regmap, CFGCHIP(2), >>   CFGCHIP2_USB1PHYCLKMUX, >>   index ? CFGCHIP2_USB1PHYCLKMUX : 0); Looks good as well! Regards, Sekhar

Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread David Lechner
On 01/18/2018 07:05 AM, Sekhar Nori wrote: On Monday 08 January 2018 07:47 AM, David Lechner wrote: +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index) +{ + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw); + unsigned int mask, val; + + /* Set the

Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread David Lechner
On 01/18/2018 07:05 AM, Sekhar Nori wrote: On Monday 08 January 2018 07:47 AM, David Lechner wrote: +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index) +{ + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw); + unsigned int mask, val; + + /* Set the

Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread Sekhar Nori
On Monday 08 January 2018 07:47 AM, David Lechner wrote: > +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index) > +{ > + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw); > + unsigned int mask, val; > + > + /* Set the USB 1.1 PHY clock mux based on the

Re: [PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-18 Thread Sekhar Nori
On Monday 08 January 2018 07:47 AM, David Lechner wrote: > +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index) > +{ > + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw); > + unsigned int mask, val; > + > + /* Set the USB 1.1 PHY clock mux based on the

[PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-07 Thread David Lechner
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon register on TI DA8XX-type SoCs. The USB0 (USB 2.0) PHY clock is an interesting case because it calls clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled temporarily while we are locking the PLL, which takes

[PATCH v5 21/44] clk: davinci: New driver for TI DA8XX USB PHY clocks

2018-01-07 Thread David Lechner
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon register on TI DA8XX-type SoCs. The USB0 (USB 2.0) PHY clock is an interesting case because it calls clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled temporarily while we are locking the PLL, which takes