On Friday 19 January 2018 12:19 AM, David Lechner wrote:
>>
>
> or to avoid defining a new macro?
>
>
>> regmap_write_bits(clk->regmap, CFGCHIP(2),
>> CFGCHIP2_USB1PHYCLKMUX,
>> index ? CFGCHIP2_USB1PHYCLKMUX : 0);
Looks good as well!
Regards,
Sekhar
On Friday 19 January 2018 12:19 AM, David Lechner wrote:
>>
>
> or to avoid defining a new macro?
>
>
>> regmap_write_bits(clk->regmap, CFGCHIP(2),
>> CFGCHIP2_USB1PHYCLKMUX,
>> index ? CFGCHIP2_USB1PHYCLKMUX : 0);
Looks good as well!
Regards,
Sekhar
On 01/18/2018 07:05 AM, Sekhar Nori wrote:
On Monday 08 January 2018 07:47 AM, David Lechner wrote:
+static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw);
+ unsigned int mask, val;
+
+ /* Set the
On 01/18/2018 07:05 AM, Sekhar Nori wrote:
On Monday 08 January 2018 07:47 AM, David Lechner wrote:
+static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index)
+{
+ struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw);
+ unsigned int mask, val;
+
+ /* Set the
On Monday 08 January 2018 07:47 AM, David Lechner wrote:
> +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index)
> +{
> + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw);
> + unsigned int mask, val;
> +
> + /* Set the USB 1.1 PHY clock mux based on the
On Monday 08 January 2018 07:47 AM, David Lechner wrote:
> +static int da8xx_usb1_phy_clk_set_parent(struct clk_hw *hw, u8 index)
> +{
> + struct da8xx_usb1_phy_clk *clk = to_da8xx_usb1_phy_clk(hw);
> + unsigned int mask, val;
> +
> + /* Set the USB 1.1 PHY clock mux based on the
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
register on TI DA8XX-type SoCs.
The USB0 (USB 2.0) PHY clock is an interesting case because it calls
clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
temporarily while we are locking the PLL, which takes
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
register on TI DA8XX-type SoCs.
The USB0 (USB 2.0) PHY clock is an interesting case because it calls
clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
temporarily while we are locking the PLL, which takes
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