On Tue, 26 Mar 2019, Andi Kleen wrote:
> As long as everything is cache hot it's likely only a couple
> of cycles difference (as Intel CPUs are very good executing
> crappy code too), but if it's not then you end up with a huge cache miss
> cost, causing jitter. That's a problem for real time for
>
> If you want to advocate the more complex design of mixed SWAPGS/FSGSBASE
> then provide numbers and not hand-waving. Numbers of real-world workloads,
> not numbers of artificial test cases which exercise the rare worst case.
Well you're proposing the much more complicated solution, not me.
Andi,
On Mon, 25 Mar 2019, Andi Kleen wrote:
> >So on user space to kernel space transitions swapping in kernel GS should
> >simply do:
> > userGS = RDGSBASE()
> > WRGSBASE(kernelGS)
>
> This would also need to find kernelGS first, by doing RDPID and then
> reading it from
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