On Fri, Apr 09, 2021 at 08:33:23AM +0200, Greg KH wrote:
> On Fri, Apr 09, 2021 at 01:45:27AM +0200, Sergei Krainov wrote:
> > Function r8712_find_network() were returning wlan_network even if it
> > didn't match required address. This happened due to not checking if
> > list end was reached and
Add sama7g5 SoC debug uart on Flexcom3. This is the UART that the
ROM bootloader uses.
Signed-off-by: Eugen Hristev
---
arch/arm/Kconfig.debug | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 9e0b5e7f12af..7598624ce6dd 100644
On Fri, Apr 9, 2021 at 2:37 PM Wolfram Sang wrote:
>
>
> > Can we add this later if needed?
> > Because in such case additionally printing bus_freq_hz will be fine, no?
>
> Yes, we can do that.
>
> > But putting max to each frequency representation in the list of strings
> > sounds
> > good to
This allows us to shut down the mipi power domain on the imx8. The
alternative would be to drop the dphy from the mipi power domain in the
SOCs device tree and only have the DSI host controller visible there but
since the PD is mostly about the PHY that would defeat it's purpose.
This allows to
This allows us to shut down the mipi power domain on the imx8. The alternative
would be to drop the dphy from the mipi power domain in the SOCs device tree
and only have the DSI host controller visible there but since the PD is mostly
about the PHY that would defeat it's purpose.
This allows to
The phy's configure phase usually needs register access so taking the
device out of pm_runtime suspend looks useful.
There's currently two in tree drivers using runtime pm and .configure
(qualcomm/phy-qcom-qmp.c, rockchip/phy-rockchip-inno-dsidphy.c) but both
don't use the phy layers
Removed and moved statement in line in long(multi-line) comments and
added '*' before it to meet linux kernel coding style for long (multi-line)
comments
Signed-off-by: Mitali Borkar
---
Changes from v2:- made style changes in code according to linux kernel
coding style for long comments.
Moved the statement to next line and added '*' before it to meet
linux kernel coding style for long(multi-line) comments.
Signed-off-by: Mitali Borkar
---
Changes from v1:- made style changes according to linux kernel coding style
for long comments.
drivers/staging/media/zoran/zr36060.c | 3
Hi David,
Le 4/9/21 à 4:23 AM, David Hildenbrand a écrit :
On 09.04.21 09:14, Alex Ghiti wrote:
Le 4/9/21 à 2:51 AM, Alexandre Ghiti a écrit :
From: Vitaly Wool
Introduce XIP (eXecute In Place) support for RISC-V platforms.
It allows code to be executed directly from non-volatile storage
> Can we add this later if needed?
> Because in such case additionally printing bus_freq_hz will be fine, no?
Yes, we can do that.
> But putting max to each frequency representation in the list of strings sounds
> good to me.
It is not important to me if we are going to change that later
On Thu, Apr 08, 2021 at 11:08:49PM +0800, Xuezhi zhang wrote:
> On Thu, 8 Apr 2021 15:14:04 +0200
> Thierry Reding wrote:
>
> > On Thu, Apr 08, 2021 at 08:52:57AM +, Carlis wrote:
> > > From: Xuezhi Zhang
> > >
> > > Fix the following coccicheck warning:
> > >
On Fri, Apr 09, 2021 at 11:08:19AM +0200, Nicolas Saenz Julienne wrote:
> For testing purposes this driver might be built on big-endian
> architectures. So make sure we take that into account when populating
> structures that are to be passed to RPi4's mailbox.
>
> Reported-by: kernel test robot
On Fri, Apr 09, 2021 at 04:28:05PM +0800, Dinghao Liu wrote:
> pm_runtime_get_sync() will increase the runtime PM counter
> even it returns an error. Thus a pairing decrement is needed
> to prevent refcount leak. Fix this by replacing this API with
> pm_runtime_resume_and_get(), which will not
On Fri, Apr 09, 2021 at 12:49:03PM +0800, Yang Yingliang wrote:
> Add the missing iounmap() before return from tegra_init_fuse()
> in the error handling case.
>
> Fixes: 9f94fadd75d3 ("soc/tegra: fuse: Register cell lookups for
> compatibility")
> Reported-by: Hulk Robot
> Signed-off-by: Yang
Add new SoC from at91 family : sama7g5
Signed-off-by: Eugen Hristev
[claudiu.bez...@microchip.com: Select PLL, generic clock and UTMI support]
Signed-off-by: Claudiu Beznea
---
Changes in v2:
- squash previous patch
[PATCH 3/3] ARM: at91: Kconfig: select PLL, generic clock and utmi support
On Fri, Apr 9, 2021 at 1:10 PM Piotr Gorski wrote:
>
> I originally posted the patch in a different form [1] even before Masahiro's
> changes.
> I've been testing this solution since December last year and posted it in
> March this year,
> after I made sure everything was working fine. This
On Thu, Apr 08, 2021 at 02:23:39PM -0500, Madhavan T. Venkataraman wrote:
> On 4/8/21 11:58 AM, Mark Brown wrote:
> > This looks good to me however I'd really like someone who has a firmer
> > understanding of what ftrace is doing to double check as it is entirely
> > likely that I am missing
As the subject states this series is an attempt to harmonize the xHCI,
EHCI, OHCI and DWC USB3 DT nodes with the DT schema introduced in the
framework of the patchset [1].
Firstly as Krzysztof suggested we've deprecated a support of DWC USB3
controllers with "synopsys,"-vendor prefix compatible
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named despite of the warning
In accordance with the USB HCD/DRD schema all the USB controllers are
supposed to have DT-nodes named with prefix "^usb(@.*)?". Since the
existing DT-nodes will be renamed in a subsequent patch let's fix the DWC3
Qcom-specific code to detect the DWC3 sub-node just by checking its
compatible string
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are
The following commit has been merged into the locking/core branch of tip:
Commit-ID: 9432bbd969c667fc9c4b1c140c5a745ff2a7b540
Gitweb:
https://git.kernel.org/tip/9432bbd969c667fc9c4b1c140c5a745ff2a7b540
Author:Peter Zijlstra
AuthorDate:Tue, 23 Mar 2021 16:49:03 +01:00
The following commit has been merged into the locking/core branch of tip:
Commit-ID: 7d95f22798ecea513f37b792b39fec4bcf20fec3
Gitweb:
https://git.kernel.org/tip/7d95f22798ecea513f37b792b39fec4bcf20fec3
Author:Matthieu Baerts
AuthorDate:Fri, 26 Mar 2021 11:50:23 +01:00
On 21/04/09 12:18PM, Jan Kara wrote:
> On Fri 09-04-21 11:17:33, riteshh wrote:
> > On 21/04/09 02:50AM, Wen Yang wrote:
> > > > On Apr 7, 2021, at 5:16 AM, riteshh wrote:
> > > >>
> > > >> On 21/04/07 03:01PM, Wen Yang wrote:
> > > >>> From: Wen Yang
> > > >>>
> > > >>> The kworker has occupied
On Fri, Apr 09, 2021 at 11:59:29AM +0100, David Howells wrote:
> diff --git a/fs/iomap/buffered-io.c b/fs/iomap/buffered-io.c
> index 414769a6ad11..9c89db033548 100644
> --- a/fs/iomap/buffered-io.c
> +++ b/fs/iomap/buffered-io.c
> @@ -41,7 +41,7 @@ static inline struct iomap_page
On Thu, Apr 08, 2021 at 01:55:15PM -0700, Sowjanya Komatineni wrote:
> This patch adds check to call legacy power domain API
> tegra_powergate_power_off() only when PM domain is not present.
>
> This is a follow-up patch to Tegra186 AHCI support patch series.
> ---
> drivers/ata/ahci_tegra.c | 6
On Thu, Apr 08, 2021 at 07:36:37PM +0200, Uwe Kleine-König wrote:
> On Thu, Apr 08, 2021 at 05:51:36PM +0200, Clemens Gruber wrote:
> > On Thu, Apr 08, 2021 at 02:50:40PM +0200, Thierry Reding wrote:
> > > Yes, I think that's basically what this is saying. I think we're perhaps
> > > getting hung
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 6db12ee0456d0e369c7b59788d46e15a56ad0294
Gitweb:
https://git.kernel.org/tip/6db12ee0456d0e369c7b59788d46e15a56ad0294
Author:Josh Hunt
AuthorDate:Thu, 01 Apr 2021 22:58:33 -04:00
Committer:
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 6bcd3e21ba278098920d26d4888f5e6f4087c61d
Gitweb:
https://git.kernel.org/tip/6bcd3e21ba278098920d26d4888f5e6f4087c61d
Author:Rik van Riel
AuthorDate:Fri, 26 Mar 2021 15:19:32 -04:00
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 47a861395636ff9477d0d737856f87bd86793ae5
Gitweb:
https://git.kernel.org/tip/47a861395636ff9477d0d737856f87bd86793ae5
Author:Valentin Schneider
AuthorDate:Wed, 07 Apr 2021 23:06:28 +01:00
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 29b628b521119c0dfe151da302e11018cb32db4f
Gitweb:
https://git.kernel.org/tip/29b628b521119c0dfe151da302e11018cb32db4f
Author:Lingutla Chandrasekhar
AuthorDate:Wed, 07 Apr 2021 23:06:26
The following commit has been merged into the sched/core branch of tip:
Commit-ID: 91771246031b9196279c8c6c2d43bbb433324eab
Gitweb:
https://git.kernel.org/tip/91771246031b9196279c8c6c2d43bbb433324eab
Author:Valentin Schneider
AuthorDate:Wed, 07 Apr 2021 23:06:27 +01:00
Random drivers should not override a user configuration of core knobs
(e.g., CONFIG_DMA_CMA=n). Applicable drivers would like to use DMA_CMA,
which depends on CMA, if possible; however, these drivers also have to
tolerate if DMA_CMA is not available/functioning, for example, if no CMA
area for
There is a standard idiom for "if 'ret' holds an error, return it":
return ret < 0 ? ret : 0;
Developers prefer to keep the things as they are because stylistic
change to "return min(ret, 0);" breaks readability.
Let's suppress automatic generation for this type of patches.
config: powerpc-randconfig-r003-20210409 (attached as .config)
compiler: clang version 13.0.0 (https://github.com/llvm/llvm-project
dd453a1389b6a7e6d9214b449d3c54981b1a89b6)
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
Add SAMA7G5 SHDWC.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 24d5fd06d487..d6cfe7c4bb00 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -794,6 +794,7
From: Eugen Hristev
Introduce new family of SoCs, sama7, and first SoC, sama7g5.
Signed-off-by: Eugen Hristev
[claudiu.bez...@microchip.com: keep only the sama7_dt]
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/Makefile | 1 +
arch/arm/mach-at91/sama7.c | 32
On Fri, Apr 09, 2021 at 11:59:17AM +0100, David Howells wrote:
> Make functions that test page bits return a bool, not an int. This means
> that the value is definitely 0 or 1 if they're used in arithmetic, rather
> than rely on test_bit() and friends to return this (though they probably
>
Add support for SAMA7G5 power management modes: standby, ulp0, ulp1, backup.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/generic.h | 2 ++
arch/arm/mach-at91/pm.c | 37
arch/arm/mach-at91/sama7.c | 1 +
3 files changed, 40 insertions(+)
Add SAMA7G5's PMC to compatible list.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index fcb20272d65d..f4e66a7c7d18 100644
--- a/arch/arm/mach-at91/pm.c
+++
On Fri, Apr 09, 2021 at 12:55:18PM +0200, Florian Weimer wrote:
> * Ard Biesheuvel:
>
> > Wouldn't that require the compiler to interpret the contents of the
> > asm() block?
>
> Yes and no. It would require proper toolchain support, so in this case
> a new ELF relocation type, with compiler,
Adapt at91_pm_backup_init() to work for SAMA7G5. Also, set the LPM pin
to shutdown controller. This will signal to PMIC that it needs to switch
to the state corresponding to backup mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 3 ++-
arch/arm/mach-at91/pm_suspend.S |
The resuming from backup mode is done with the help of bootloader.
The bootloader reconfigure the DDR controller and DDR PHY controller.
To speed-up the resuming process save the PHY calibration data into
SECURAM before suspending (securam is powered on backup mode).
This data will be later used
SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
in case it is mandatory.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 27 +--
1 file changed, 21 insertions(+), 6
Add SAMA7G5 DDR controller to the list of DDR controller compatibles.
At the moment there is no standby support. Adapt the code for this.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git
Add RAM controller and RAM PHY controller DT bindings.
Signed-off-by: Claudiu Beznea
---
.../devicetree/bindings/arm/atmel-sysregs.txt | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
Wait for DDR power mode off before shutting down the core.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index 9c9e08fd8300..7396e18dd7e5 100644
---
Add support to disable/enable 2.5V LDO regulator when entering/exiting
any ULP mode.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 1 +
arch/arm/mach-at91/pm_suspend.S | 29 +
2 files changed, 30 insertions(+)
diff --git
Add support for MCK1..4 save restore for ULP modes.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 126
1 file changed, 126 insertions(+)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index
Add self-refresh support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.h | 2 +
arch/arm/mach-at91/pm_data-offsets.c | 2 +
arch/arm/mach-at91/pm_suspend.S | 199 +++
3 files changed, 203 insertions(+)
diff --git
Add registers and bits definitions for SAMA7G5's UDDRC and DDR3PHY.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-ddr.h | 80
1 file changed, 80 insertions(+)
create mode 100644 include/soc/at91/sama7-ddr.h
diff --git
Replace CONFIG_SOC_SAM9X60 with CONFIG_HAVE_AT91_SAM9X60_PLL as the
SAM9X60's PLL is also present on SAMA7G5.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S
SAMA7G5 has 5 master clocks 0..4. MCK0 is controlled differently than
MCK 1..4. MCK 1..4 should also be saved/restored in the last phase of
suspend/resume. Thus, adapt wait_mckrdy to support also MCK1..4.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 48
Add SFRBU registers definitions for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
include/soc/at91/sama7-sfrbu.h | 34 ++
1 file changed, 34 insertions(+)
create mode 100644 include/soc/at91/sama7-sfrbu.h
diff --git a/include/soc/at91/sama7-sfrbu.h
For the previous AT91 RAM controller and self-refresh procedure this
had no side effects. However, for SAMA7G5 the self-refresh procedure
doesn't allow this anymore as the RAM controller ports are closed
before switching it to self-refresh. This commits prepares the code
for the following ones
Use r7 instead of tmp1 in macros. This prepares the filed for
next commits.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm_suspend.S | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
There is no need to initialize pdev.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 5a6ce1d88971..65e13769cf50 100644
--- a/arch/arm/mach-at91/pm.c
+++
at91_pm_modes_init() checks for proper nodes in device tree and maps
them accordingly. Up to SAMA7G5 all AT91 SoCs had the same mapping
b/w power saving modes and different controllers needed in the
final/first steps of suspend/resume. SAMA7G5 is not aligned with the
old SoCs thus the code is
Add my kernel.org address for old email address.
Signed-off-by: Nicolas Saenz Julienne
---
.mailmap | 2 ++
1 file changed, 2 insertions(+)
diff --git a/.mailmap b/.mailmap
index 78835e80214a..b407e1192fb3 100644
--- a/.mailmap
+++ b/.mailmap
@@ -260,6 +260,8 @@ Nguyen Anh Quynh
Nicolas
On Fri, Apr 9, 2021 at 10:36 AM Chunfeng Yun wrote:
>
> On Fri, 2021-04-09 at 08:39 +0300, Tony Lindgren wrote:
> > * Chunfeng Yun [210409 01:54]:
> > > On Thu, 2021-04-08 at 19:41 +0200, Rafael J. Wysocki wrote:
> > > > On Thu, Apr 8, 2021 at 11:35 AM Chunfeng Yun
> > > > wrote:
> > > > >
> >
Document at91_soc_pm structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 3742a1fb76db..3029351ec78e 100644
--- a/arch/arm/mach-at91/pm.c
+++
Move the setup of soc_pm.bu->suspended in platform_suspend::begin
function so that the PMC code in charge with clocks suspend/resume
to differentiate b/w standard PM mode and backup mode.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
arch/arm/mach-at91/pm.c | 15
Hi Mauro,
On 4/8/21 10:40 AM, Mauro Carvalho Chehab wrote:
> Smatch is warning that:
> drivers/media/platform/qcom/venus/hfi_venus.c:1100 venus_isr() warn:
> variable dereferenced before check 'hdev' (see line 1097)
>
> The logic basically does:
> hdev = to_hfi_priv(core);
>
> with
Hi Mauro,
On 4/8/21 10:40 AM, Mauro Carvalho Chehab wrote:
> As reported by sparse:
>
> drivers/media/platform/qcom/venus/core.c:227:41: warning: Using plain
> integer as NULL pointer
> drivers/media/platform/qcom/venus/core.c:228:34: warning: Using plain
> integer as NULL pointer
Move pm_bu to soc_pm data structure.
Signed-off-by: Claudiu Beznea
---
arch/arm/mach-at91/pm.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index 90dcdfe3b3d0..e13ceef7ac9a 100644
---
Hi,
This series adds PM support for SAMA7G5. The standby, ulp0, ulp1, and
backup modes are supported.
Thank you,
Claudiu Beznea
Changes in v2:
- keep only the generic sama7_dt in patch 22/24 and adapt patch 23/24
- collected tags
Claudiu Beznea (23):
ARM: at91: pm: move pm_bu to soc_pm data
On Fri, Apr 09, 2021 at 11:57:22AM +0200, Ard Biesheuvel wrote:
> On Thu, 8 Apr 2021 at 18:53, Peter Zijlstra wrote:
> > Is there *any* way in which we can have the compiler recognise that the
> > asm_goto only depends on its arguments and have it merge the branches
> > itself?
> >
> > I do
I originally posted the patch in a different form [1] even before Masahiro's
changes.
I've been testing this solution since December last year and posted it in March
this year,
after I made sure everything was working fine. This patch was tested by
Oleksandr and he also didn't report any
On Thu, Apr 08, 2021 at 05:51:36PM +0200, Clemens Gruber wrote:
> On Thu, Apr 08, 2021 at 02:50:40PM +0200, Thierry Reding wrote:
> > On Wed, Apr 07, 2021 at 11:34:03PM +0200, Uwe Kleine-König wrote:
> > > On Wed, Apr 07, 2021 at 10:21:10PM +0200, Clemens Gruber wrote:
> > > > On Wed, Apr 07, 2021
From: Colin Ian King
The shifting of the u8 integers f->fs.nat_lip[] by 24 bits to
the left will be promoted to a 32 bit signed int and then
sign-extended to a u64. In the event that the top bit of the u8
is set then all then all the upper 32 bits of the u64 end up as
also being set because of
If some of the allocations fail between the dev_set_name() and the
device_register() then the name will not be freed. Fix this by
moving dev_set_name() directly in front of the call to device_register().
Fixes: a2aa24734d9d ("HSI: Add common DT binding for HSI client devices")
Signed-off-by: Dan
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Reported-by: Hulk Robot
Signed-off-by: Qiheng Lin
---
drivers/mailbox/arm_mhu_db.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
Am 01.04.21 um 03:59 schrieb Bernard:
From: "Christian König"
Date: 2021-03-31 21:15:22
To: Bernard Zhao ,Huang Rui ,David Airlie
,Daniel Vetter
,dri-de...@lists.freedesktop.org,linux-kernel@vger.kernel.org
Cc: opensource.ker...@vivo.com
Subject: Re: [PATCH] drm/ttm: cleanup coding style a
Am 09.04.21 um 13:00 schrieb Vlastimil Babka:
On 4/9/21 9:17 AM, Christian König wrote:
To be able to switch to a spinlock and reduce lock contention in the TTM
shrinker we don't want to hold a mutex while unmapping and freeing pages
from the pool.
Does using spinlock instead of mutex really
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Reported-by: Hulk Robot
Signed-off-by: Qiheng Lin
---
sound/soc/sunxi/sun4i-codec.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Reported-by: Hulk Robot
Signed-off-by: Qiheng Lin
---
drivers/soc/amlogic/meson-clk-measure.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git
We can't use kfree() to free device managed resources so the kfree(dev)
is against the rules.
It's easier to write this code if we open code the device_register() as
a device_initialize() and device_add(). That way if dev_set_name() set
name fails we can call put_device() and it will clean up
On 4/9/21 9:17 AM, Christian König wrote:
> To be able to switch to a spinlock and reduce lock contention in the TTM
> shrinker we don't want to hold a mutex while unmapping and freeing pages
> from the pool.
Does using spinlock instead of mutex really reduce lock contention?
> But then we
Split page_has_private() into two functions:
(1) page_needs_cleanup() to find out if a page needs the ->releasepage(),
->invalidatepage(), etc. address space ops calling upon it.
This returns true when either PG_private or PG_private_2 are set.
(2) page_private_count() which returns
Make functions that test page bits return a bool, not an int. This means
that the value is definitely 0 or 1 if they're used in arithmetic, rather
than rely on test_bit() and friends to return this (though they probably
should).
Signed-off-by: David Howells
cc: Linus Torvalds
cc: Matthew
Make the generic bitops return bool when returning the value of a tested
bit.
Signed-off-by: David Howells
cc: Linus Torvalds
cc: Matthew Wilcox
cc: Akinobu Mita
cc: Arnd Bergmann
cc: Will Deacon
---
include/asm-generic/bitops/atomic.h |6 +++---
include/asm-generic/bitops/le.h
On Tue, Mar 30, 2021 at 08:17:20AM -0700, Dan Sneddon wrote:
> The driver is capable of doing async page flips so we need to tell the
> core to allow them.
>
> Signed-off-by: Dan Sneddon
Tested-by: Ludovic Desroches
Thanks,
Ludovic
> ---
>
> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 1
Hi Stephen,
On 09/04/2021 19.13, Stephen Rothwell wrote:
Hi all,
After merging the arm-soc tree, today's linux-next build (powerpc
allnoconfig) failed like this:
[...]
Caused by commits
7c566bb5e4d5 ("asm-generic/io.h: Add a non-posted variant of ioremap()")
89897f739d7b
* Ard Biesheuvel:
> Wouldn't that require the compiler to interpret the contents of the
> asm() block?
Yes and no. It would require proper toolchain support, so in this case
a new ELF relocation type, with compiler, assembler, and linker support
to generate those relocations and process them.
Hi again,
On Wed, 2021-04-07 at 16:37 -0400, Alan Cooper wrote:
> Nicolas,
>
> I got a better description of the failure and it looks like the bus
> clock needs to be limited to 300KHz for a 500MHz core clock.
> What's happening is that an internal reset sequence is needed after a
> command
On 09/04/2021 12:49, Mitali Borkar wrote:
> Added '*' before every line inside long(multi-line) comments. Removed
> '*/' from end of the comment line and added to next line as per linux
> kernel coding style. Aligned '*' accordingly to make code neater.
>
> Signed-off-by: Mitali Borkar
> ---
>
From: Gao Xiang
To deal the with the cases which inplace decompression is infeasible
for some inplace I/O. Per-CPU buffers was introduced to get rid of page
allocation latency and thrash for low-latency decompression algorithms
such as lz4.
For the big pcluster feature, introduce multipage
On 09.04.2021 0:52, Jiri Olsa wrote:
> On Tue, Apr 06, 2021 at 11:37:26AM +0300, Bayduraev, Alexey V wrote:
>>
>> Changes in v4:
>> - renamed 'comm' structure to 'pipes'
>> - moved thread fd/maps messages to verbose=2
>> - fixed leaks during allocation of thread_data structures
>> - fixed leaks
Added '*' before every line inside long(multi-line) comments. Removed
'*/' from end of the comment line and added to next line as per linux
kernel coding style. Aligned '*' accordingly to make code neater.
Signed-off-by: Mitali Borkar
---
Changes from v1:- Changes made in code according to
Hi!
> The XT digital calibration feature allows to improve the RTC accuracy,
> using a Distributed Digital Calibration function.
> See ch. 5.9.1 of AB08XX Series Ultra Low Power RTC IC User's Guide
> https://abracon.com/realtimeclock/AB08XX-Application-Manual.pdf
>
> Signed-off-by: Kirill
The @kernel.org e-mail address is likely to last longer than the current
one, so use it.
Signed-off-by: Nicolas Saenz Julienne
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index d269763af39d..c8f32b7c1e06 100644
--- a/MAINTAINERS
in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Luiz-Sampaio/w1-ds2438-fixed-a-coding-style-issue/20210409-121608
base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
17e7124aad766b3f158943acb51467f86220afe9
config: arm-randconfig
Greetings;
I sent you an email a couple of days ago and haven't heard from you.
Please confirm if you received my email?
Yours Sincerely,
Mr. Cosme Amossou (Lawyer)
E-mail:co...@cabinetcosme.com
On Fri, 09 Apr 2021 11:10:09 +0100,
414777...@qq.com wrote:
>
> From: Mengguang Peng
>
> On arm64 platform, found that the machine could not wake up after suspend,
> this patch updates the its suspend and resume handling code.
>
> - Add a variable named ctlr_save in struct rdists.
> - When
Adds documentation for the CoreSight System configuration manager.
Cc: Jonathan Corbet
Cc: linux-...@vger.kernel.org
Signed-off-by: Mike Leach
Reviewed-by: Mathieu Poirier
---
.../trace/coresight/coresight-config.rst | 244 ++
Documentation/trace/coresight/coresight.rst
Adds configfs subsystem and attributes to the configuration manager
to enable the listing of loaded configurations and features.
The default values of feature parameters can be accessed and altered
from these attributes to affect all installed devices using the feature.
Signed-off-by: Mike Leach
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